Lines Matching +full:imx7 +full:- +full:power
5 * SPDX-License-Identifier: GPL-2.0+
13 #include <usb/ehci-ci.h>
15 #include <asm/arch/imx-regs.h>
17 #include <asm/mach-imx/iomux-v3.h>
18 #include <asm/mach-imx/sys_proto.h>
20 #include <asm/mach-types.h>
21 #include <power/regulator.h>
60 #define UCTRL_PWR_POL (1 << 9) /* OTG Polarity of Power Pin */
99 &usbphy->usb1_chrg_detect); in usb_power_config()
112 chrg_detect = &anatop->usb1_chrg_detect; in usb_power_config()
113 pll_480_ctrl_clr = &anatop->usb1_pll_480_ctrl_clr; in usb_power_config()
114 pll_480_ctrl_set = &anatop->usb1_pll_480_ctrl_set; in usb_power_config()
117 chrg_detect = &anatop->usb2_chrg_detect; in usb_power_config()
118 pll_480_ctrl_clr = &anatop->usb2_pll_480_ctrl_clr; in usb_power_config()
119 pll_480_ctrl_set = &anatop->usb2_pll_480_ctrl_set; in usb_power_config()
125 * Some phy and power's special controls in usb_power_config()
128 * 2. The PLL's power and output to usb in usb_power_config()
160 usb_cmd = (void __iomem *)&ehci->usbcmd; in usb_phy_enable()
181 /* Power up the PHY */ in usb_phy_enable()
217 u32 ctrl[4]; /* otg/host1-3 */
244 void __iomem *phy_cfg2 = (void __iomem *)(&usbnc->phy_cfg2); in usb_power_config()
257 void __iomem *status = (void __iomem *)(&usbnc->phy_status); in usb_phy_mode()
274 void __iomem *ctrl = (void __iomem *)(&usbnc->ctrl[index]); in usb_oc_config()
278 void __iomem *ctrl = (void __iomem *)(&usbnc->ctrl1); in usb_oc_config()
290 /* Set power polarity to high active */ in usb_oc_config()
299 * board_usb_phy_mode - override usb phy mode
303 * When usb-otg is used as usb host port, iomux pad usb_otg_id can be
316 * board_ehci_hcd_init - set usb vbus voltage
330 * board_ehci_power - enables/disables usb vbus voltage
382 return -EINVAL; in ehci_hcd_init()
391 *hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength); in ehci_hcd_init()
393 HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase))); in ehci_hcd_init()
399 return -ENODEV; in ehci_hcd_init()
403 setbits_le32(&ehci->usbmode, CM_HOST); in ehci_hcd_init()
404 writel(CONFIG_MXC_USB_PORTSC, &ehci->portsc); in ehci_hcd_init()
405 setbits_le32(&ehci->portsc, USB_EN); in ehci_hcd_init()
427 struct ehci_mx6_priv_data *priv = dev->priv; in mx6_init_after_reset()
428 enum usb_init_type type = priv->init_type; in mx6_init_after_reset()
429 struct usb_ehci *ehci = priv->ehci; in mx6_init_after_reset()
432 ret = ehci_mx6_common_init(priv->ehci, priv->portnr); in mx6_init_after_reset()
437 if (priv->vbus_supply) { in mx6_init_after_reset()
438 ret = regulator_set_enable(priv->vbus_supply, in mx6_init_after_reset()
451 setbits_le32(&ehci->usbmode, CM_HOST); in mx6_init_after_reset()
452 writel(CONFIG_MXC_USB_PORTSC, &ehci->portsc); in mx6_init_after_reset()
453 setbits_le32(&ehci->portsc, USB_EN); in mx6_init_after_reset()
469 const void *blob = gd->fdt_blob; in ehci_usb_phy_mode()
475 * Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt. in ehci_usb_phy_mode()
482 return -EINVAL; in ehci_usb_phy_mode()
487 return -EINVAL; in ehci_usb_phy_mode()
493 plat->init_type = USB_INIT_DEVICE; in ehci_usb_phy_mode()
495 plat->init_type = USB_INIT_HOST; in ehci_usb_phy_mode()
502 plat->init_type = USB_INIT_DEVICE; in ehci_usb_phy_mode()
504 plat->init_type = USB_INIT_HOST; in ehci_usb_phy_mode()
506 return -EINVAL; in ehci_usb_phy_mode()
517 dr_mode = usb_get_dr_mode(dev->node); in ehci_usb_ofdata_to_platdata()
521 plat->init_type = USB_INIT_HOST; in ehci_usb_ofdata_to_platdata()
524 plat->init_type = USB_INIT_DEVICE; in ehci_usb_ofdata_to_platdata()
539 * a tremendous amount of hard-coded addresses. To make things worse, in ehci_usb_bind()
546 * and iMX7 their addresses are shifted by 0x10000. in ehci_usb_bind()
548 * iMX7) offset from the first controller address. in ehci_usb_bind()
552 * - DM clock framework support for iMX must be implemented in ehci_usb_bind()
553 * - usb_power_config() has to be converted to clock framework in ehci_usb_bind()
554 * -> Thus, the ad-hoc "index" variable goes away. in ehci_usb_bind()
555 * - USB PHY handling has to be factored out into separate driver in ehci_usb_bind()
556 * -> Thus, the ad-hoc "index" variable goes away from the PHY in ehci_usb_bind()
559 * -> usb_power_config() shall be moved to PHY driver in ehci_usb_bind()
560 * With these changes in place, the ad-hoc indexing goes away and in ehci_usb_bind()
566 dev->req_seq = (addr - USB_BASE_ADDR) / controller_spacing; in ehci_usb_bind()
576 enum usb_init_type type = plat->init_type; in ehci_usb_probe()
581 priv->ehci = ehci; in ehci_usb_probe()
582 priv->portnr = dev->seq; in ehci_usb_probe()
583 priv->init_type = type; in ehci_usb_probe()
586 ret = device_get_supply_regulator(dev, "vbus-supply", in ehci_usb_probe()
587 &priv->vbus_supply); in ehci_usb_probe()
589 debug("%s: No vbus supply\n", dev->name); in ehci_usb_probe()
591 ret = ehci_mx6_common_init(ehci, priv->portnr); in ehci_usb_probe()
596 if (priv->vbus_supply) { in ehci_usb_probe()
597 ret = regulator_set_enable(priv->vbus_supply, in ehci_usb_probe()
607 if (priv->init_type == USB_INIT_HOST) { in ehci_usb_probe()
608 setbits_le32(&ehci->usbmode, CM_HOST); in ehci_usb_probe()
609 writel(CONFIG_MXC_USB_PORTSC, &ehci->portsc); in ehci_usb_probe()
610 setbits_le32(&ehci->portsc, USB_EN); in ehci_usb_probe()
615 hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength); in ehci_usb_probe()
617 HC_LENGTH(ehci_readl(&(hccr)->cr_capbase))); in ehci_usb_probe()
619 return ehci_register(dev, hccr, hcor, &mx6_ehci_ops, 0, priv->init_type); in ehci_usb_probe()
623 { .compatible = "fsl,imx27-usb" },