291 		clrsetbits_le32(&regs->hc_regs[i].hcchar,  in dwc_otg_core_host_init()
297 		clrsetbits_le32(&regs->hc_regs[i].hcchar,  in dwc_otg_core_host_init()
300 		ret = wait_for_bit_le32(&regs->hc_regs[i].hcchar,  in dwc_otg_core_host_init()
488 	struct dwc2_hc_regs *hc_regs = &regs->hc_regs[hc_num];  in dwc_otg_hc_init()  local
502 	writel(hcchar, &hc_regs->hcchar);  in dwc_otg_hc_init()
505 	writel(0, &hc_regs->hcsplt);  in dwc_otg_hc_init()
508 static void dwc_otg_hc_init_split(struct dwc2_hc_regs *hc_regs,  in dwc_otg_hc_init_split()  argument
518 	writel(hcsplt, &hc_regs->hcsplt);  in dwc_otg_hc_init_split()
811 int wait_for_chhltd(struct dwc2_hc_regs *hc_regs, uint32_t *sub, u8 *toggle)  in wait_for_chhltd()  argument
816 	ret = wait_for_bit_le32(&hc_regs->hcint, DWC2_HCINT_CHHLTD, true,  in wait_for_chhltd()
821 	hcint = readl(&hc_regs->hcint);  in wait_for_chhltd()
822 	hctsiz = readl(&hc_regs->hctsiz);  in wait_for_chhltd()
847 static int transfer_chunk(struct dwc2_hc_regs *hc_regs, void *aligned_buffer,  in transfer_chunk()  argument
860 	       &hc_regs->hctsiz);  in transfer_chunk()
877 	writel(phys_to_bus((unsigned long)aligned_buffer), &hc_regs->hcdma);  in transfer_chunk()
880 	writel(0x3fff, &hc_regs->hcint);  in transfer_chunk()
883 	clrsetbits_le32(&hc_regs->hcchar, DWC2_HCCHAR_MULTICNT_MASK |  in transfer_chunk()
890 	ret = wait_for_chhltd(hc_regs, &sub, pid);  in transfer_chunk()
912 	struct dwc2_hc_regs *hc_regs = &regs->hc_regs[DWC2_HC_CHANNEL];  in chunk_msg()  local
954 			dwc_otg_hc_init_split(hc_regs, hub_addr, hub_port);  in chunk_msg()
976 			setbits_le32(&hc_regs->hcsplt, DWC2_HCSPLT_COMPSPLT);  in chunk_msg()
978 			clrbits_le32(&hc_regs->hcsplt, DWC2_HCSPLT_COMPSPLT);  in chunk_msg()
986 		ret = transfer_chunk(hc_regs, priv->aligned_buffer, pid,  in chunk_msg()
990 		hcint = readl(&hc_regs->hcint);  in chunk_msg()
1025 	writel(0, &hc_regs->hcintmsk);  in chunk_msg()
1026 	writel(0xFFFFFFFF, &hc_regs->hcint);  in chunk_msg()