22 #define RK806_BUCK_ON_VSEL(n)		(0x1a + n - 1)
23 #define RK806_BUCK_SLP_VSEL(n)		(0x24 + n - 1)
24 #define RK806_BUCK_CONFIG(n)		(0x10 + n - 1)
25 #define RK806_BUCK_VSEL_MASK		0xff
28 #define RK806_NLDO_ON_VSEL(n)		(0x43 + n - 1)
29 #define RK806_NLDO_SLP_VSEL(n)		(0x48 + n - 1)
30 #define RK806_NLDO_VSEL_MASK		0xff
31 #define RK806_PLDO_ON_VSEL(n)		(0x4e + n - 1)
32 #define RK806_PLDO_SLP_VSEL(n)		(0x54 + n - 1)
33 #define RK806_PLDO_VSEL_MASK		0xff
36 #define RK806_POWER_EN(n)		(0x00 + n)
37 #define RK806_NLDO_EN(n)		(0x03 + n)
38 #define RK806_PLDO_EN(n)		(0x04 + n)
40 #define RK806_BUCK_SUSPEND_EN		0x06
41 #define RK806_NLDO_SUSPEND_EN		0x07
42 #define RK806_PLDO_SUSPEND_EN		0x08
44 #define RK806_RAMP_RATE_MASK1		0xc0
45 #define RK806_RAMP_RATE_REG1(n)		(0x10 + n)
46 #define RK806_RAMP_RATE_REG1_8		0xeb
47 #define RK806_RAMP_RATE_REG9_10		0xea
49 #define RK806_RAMP_RATE_4LSB_PER_1CLK	0x00/* LDO 100mV/uS buck 50mV/us */
50 #define RK806_RAMP_RATE_2LSB_PER_1CLK	0x01/* LDO 50mV/uS buck 25mV/us */
51 #define RK806_RAMP_RATE_1LSB_PER_1CLK	0x02/* LDO 25mV/uS buck 12.5mV/us */
52 #define RK806_RAMP_RATE_1LSB_PER_2CLK	0x03/* LDO 12.5mV/uS buck 6.25mV/us */
54 #define RK806_RAMP_RATE_1LSB_PER_4CLK	0x04/* LDO 6.28/2mV/uS buck 3.125mV/us */
55 #define RK806_RAMP_RATE_1LSB_PER_8CLK	0x05/* LDO 3.12mV/uS buck 1.56mV/us */
56 #define RK806_RAMP_RATE_1LSB_PER_13CLK	0x06/* LDO 1.9mV/uS buck 961mV/us */
57 #define RK806_RAMP_RATE_1LSB_PER_32CLK	0x07/* LDO 0.78mV/uS buck 0.39mV/us */
78 …UCK_ON_VSEL(1), RK806_BUCK_SLP_VSEL(1), RK806_BUCK_CONFIG(1), RK806_BUCK_VSEL_MASK, 0x00, 0x9f, 3},
79 …UCK_ON_VSEL(1), RK806_BUCK_SLP_VSEL(1), RK806_BUCK_CONFIG(1), RK806_BUCK_VSEL_MASK, 0xa0, 0xec, 3},
80 …{  3400000,     0, RK806_BUCK_ON_VSEL(1), RK806_BUCK_SLP_VSEL(1), RK806_BUCK_CONFIG(1), RK806_BUCK…
82 …UCK_ON_VSEL(2), RK806_BUCK_SLP_VSEL(2), RK806_BUCK_CONFIG(2), RK806_BUCK_VSEL_MASK, 0x00, 0x9f, 3},
83 …UCK_ON_VSEL(2), RK806_BUCK_SLP_VSEL(2), RK806_BUCK_CONFIG(2), RK806_BUCK_VSEL_MASK, 0xa0, 0xed, 3},
84 …{  3400000,     0, RK806_BUCK_ON_VSEL(2), RK806_BUCK_SLP_VSEL(2), RK806_BUCK_CONFIG(2), RK806_BUCK…
86 …UCK_ON_VSEL(3), RK806_BUCK_SLP_VSEL(3), RK806_BUCK_CONFIG(3), RK806_BUCK_VSEL_MASK, 0x00, 0x9f, 3},
87 …UCK_ON_VSEL(3), RK806_BUCK_SLP_VSEL(3), RK806_BUCK_CONFIG(3), RK806_BUCK_VSEL_MASK, 0xa0, 0xed, 3},
88 …{  3400000,     0, RK806_BUCK_ON_VSEL(3), RK806_BUCK_SLP_VSEL(3), RK806_BUCK_CONFIG(3), RK806_BUCK…
90 …UCK_ON_VSEL(4), RK806_BUCK_SLP_VSEL(4), RK806_BUCK_CONFIG(4), RK806_BUCK_VSEL_MASK, 0x00, 0x9f, 3},
91 …UCK_ON_VSEL(4), RK806_BUCK_SLP_VSEL(4), RK806_BUCK_CONFIG(4), RK806_BUCK_VSEL_MASK, 0xa0, 0xed, 3},
92 …{  3400000,     0, RK806_BUCK_ON_VSEL(4), RK806_BUCK_SLP_VSEL(4), RK806_BUCK_CONFIG(4), RK806_BUCK…
94 …UCK_ON_VSEL(5), RK806_BUCK_SLP_VSEL(5), RK806_BUCK_CONFIG(5), RK806_BUCK_VSEL_MASK, 0x00, 0x9f, 3},
95 …UCK_ON_VSEL(5), RK806_BUCK_SLP_VSEL(5), RK806_BUCK_CONFIG(5), RK806_BUCK_VSEL_MASK, 0xa0, 0xed, 3},
96 …{  3400000,     0, RK806_BUCK_ON_VSEL(5), RK806_BUCK_SLP_VSEL(5), RK806_BUCK_CONFIG(5), RK806_BUCK…
98 …UCK_ON_VSEL(6), RK806_BUCK_SLP_VSEL(6), RK806_BUCK_CONFIG(6), RK806_BUCK_VSEL_MASK, 0x00, 0x9f, 3},
99 …UCK_ON_VSEL(6), RK806_BUCK_SLP_VSEL(6), RK806_BUCK_CONFIG(6), RK806_BUCK_VSEL_MASK, 0xa0, 0xed, 3},
100 …{  3400000,     0, RK806_BUCK_ON_VSEL(6), RK806_BUCK_SLP_VSEL(6), RK806_BUCK_CONFIG(6), RK806_BUCK…
102 …UCK_ON_VSEL(7), RK806_BUCK_SLP_VSEL(7), RK806_BUCK_CONFIG(7), RK806_BUCK_VSEL_MASK, 0x00, 0x9f, 3},
103 …UCK_ON_VSEL(7), RK806_BUCK_SLP_VSEL(7), RK806_BUCK_CONFIG(7), RK806_BUCK_VSEL_MASK, 0xa0, 0xed, 3},
104 …{  3400000,     0, RK806_BUCK_ON_VSEL(7), RK806_BUCK_SLP_VSEL(7), RK806_BUCK_CONFIG(7), RK806_BUCK…
106 …UCK_ON_VSEL(8), RK806_BUCK_SLP_VSEL(8), RK806_BUCK_CONFIG(8), RK806_BUCK_VSEL_MASK, 0x00, 0x9f, 3},
107 …UCK_ON_VSEL(8), RK806_BUCK_SLP_VSEL(8), RK806_BUCK_CONFIG(8), RK806_BUCK_VSEL_MASK, 0xa0, 0xed, 3},
108 …{  3400000,     0, RK806_BUCK_ON_VSEL(8), RK806_BUCK_SLP_VSEL(8), RK806_BUCK_CONFIG(8), RK806_BUCK…
110 …UCK_ON_VSEL(9), RK806_BUCK_SLP_VSEL(9), RK806_BUCK_CONFIG(9), RK806_BUCK_VSEL_MASK, 0x00, 0x9f, 3},
111 …UCK_ON_VSEL(9), RK806_BUCK_SLP_VSEL(9), RK806_BUCK_CONFIG(9), RK806_BUCK_VSEL_MASK, 0xa0, 0xed, 3},
112 …{  3400000,     0, RK806_BUCK_ON_VSEL(9), RK806_BUCK_SLP_VSEL(9), RK806_BUCK_CONFIG(9), RK806_BUCK…
114 …_ON_VSEL(10), RK806_BUCK_SLP_VSEL(10), RK806_BUCK_CONFIG(10), RK806_BUCK_VSEL_MASK, 0x00, 0x9f, 3},
115 …_ON_VSEL(10), RK806_BUCK_SLP_VSEL(10), RK806_BUCK_CONFIG(10), RK806_BUCK_VSEL_MASK, 0xa0, 0xed, 3},
116 …{  3400000,     0, RK806_BUCK_ON_VSEL(10), RK806_BUCK_SLP_VSEL(10), RK806_BUCK_CONFIG(10), RK806_B…
121 	{  500000, 12500, RK806_NLDO_ON_VSEL(1), RK806_NLDO_SLP_VSEL(1), NA, RK806_NLDO_VSEL_MASK, 0x00, },
122 	{  3400000,    0, RK806_NLDO_ON_VSEL(1), RK806_NLDO_SLP_VSEL(1), NA, RK806_NLDO_VSEL_MASK, 0xE8, },
124 	{  500000, 12500, RK806_NLDO_ON_VSEL(2), RK806_NLDO_SLP_VSEL(2), NA, RK806_NLDO_VSEL_MASK, 0x00, },
125 	{  3400000,    0, RK806_NLDO_ON_VSEL(2), RK806_NLDO_SLP_VSEL(2), NA, RK806_NLDO_VSEL_MASK, 0xE8, },
127 	{  500000, 12500, RK806_NLDO_ON_VSEL(3), RK806_NLDO_SLP_VSEL(3), NA, RK806_NLDO_VSEL_MASK, 0x00, },
128 	{  3400000,    0, RK806_NLDO_ON_VSEL(3), RK806_NLDO_SLP_VSEL(3), NA, RK806_NLDO_VSEL_MASK, 0xE8, },
130 	{  500000, 12500, RK806_NLDO_ON_VSEL(4), RK806_NLDO_SLP_VSEL(4), NA, RK806_NLDO_VSEL_MASK, 0x00, },
131 	{  3400000,    0, RK806_NLDO_ON_VSEL(4), RK806_NLDO_SLP_VSEL(4), NA, RK806_NLDO_VSEL_MASK, 0xE8, },
133 	{  500000, 12500, RK806_NLDO_ON_VSEL(5), RK806_NLDO_SLP_VSEL(5), NA, RK806_NLDO_VSEL_MASK, 0x00, },
134 	{  3400000,    0, RK806_NLDO_ON_VSEL(5), RK806_NLDO_SLP_VSEL(5), NA, RK806_NLDO_VSEL_MASK, 0xE8, },
139 	{  500000, 12500, RK806_PLDO_ON_VSEL(1), RK806_PLDO_SLP_VSEL(1), NA, RK806_PLDO_VSEL_MASK, 0x00, },
140 	{  3400000,    0, RK806_PLDO_ON_VSEL(1), RK806_PLDO_SLP_VSEL(1), NA, RK806_PLDO_VSEL_MASK, 0xE8, },
142 	{  500000, 12500, RK806_PLDO_ON_VSEL(2), RK806_PLDO_SLP_VSEL(2), NA, RK806_PLDO_VSEL_MASK, 0x00, },
143 	{  3400000,    0, RK806_PLDO_ON_VSEL(2), RK806_PLDO_SLP_VSEL(2), NA, RK806_PLDO_VSEL_MASK, 0xE8, },
145 	{  500000, 12500, RK806_PLDO_ON_VSEL(3), RK806_PLDO_SLP_VSEL(3), NA, RK806_PLDO_VSEL_MASK, 0x00, },
146 	{  3400000,    0, RK806_PLDO_ON_VSEL(3), RK806_PLDO_SLP_VSEL(3), NA, RK806_PLDO_VSEL_MASK, 0xE8, },
148 	{  500000, 12500, RK806_PLDO_ON_VSEL(4), RK806_PLDO_SLP_VSEL(4), NA, RK806_PLDO_VSEL_MASK, 0x00, },
149 	{  3400000,    0, RK806_PLDO_ON_VSEL(4), RK806_PLDO_SLP_VSEL(4), NA, RK806_PLDO_VSEL_MASK, 0xE8, },
151 	{  500000, 12500, RK806_PLDO_ON_VSEL(5), RK806_PLDO_SLP_VSEL(5), NA, RK806_PLDO_VSEL_MASK, 0x00, },
152 	{  3400000,    0, RK806_PLDO_ON_VSEL(5), RK806_PLDO_SLP_VSEL(5), NA, RK806_PLDO_VSEL_MASK, 0xE8, },
154 	{  500000, 12500, RK806_PLDO_ON_VSEL(6), RK806_PLDO_SLP_VSEL(6), NA, RK806_PLDO_VSEL_MASK, 0x00, },
155 	{  3400000,    0, RK806_PLDO_ON_VSEL(6), RK806_PLDO_SLP_VSEL(6), NA, RK806_PLDO_VSEL_MASK, 0xE8, },
166 		case 0 ... 9:  in get_buck_reg()
168 				return &rk806_buck[num * 3 + 0];  in get_buck_reg()
176 		return &rk806_buck[num * 3 + 0];  in get_buck_reg()
189 	if (info->step_uv == 0)	/* Fixed voltage */  in _buck_set_value()
194 	debug("%s: volt=%d, buck=%d, reg=0x%x, mask=0x%x, val=0x%x\n",  in _buck_set_value()
212 			value = ((0 << buck % 4) | (1 << (buck % 4 + 4)));  in _buck_set_enable()
233 	if (info->step_uv == 0)  in _buck_set_suspend_value()
238 	debug("%s: volt=%d, buck=%d, reg=0x%x, mask=0x%x, val=0x%x\n",  in _buck_set_suspend_value()
247 	uint mask = 0;  in _buck_get_enable()
248 	int ret = 0;  in _buck_get_enable()
256 		ret = 0;  in _buck_get_enable()
259 	if (ret < 0)  in _buck_get_enable()
267 	const struct rk8xx_reg_info *info = get_buck_reg(pmic, buck, 0);  in _buck_set_ramp_delay()
269 	int ramp_value = 0, reg_value;  in _buck_set_ramp_delay()
321 	if (reg_value < 0) {  in _buck_set_ramp_delay()
322 		printf("buck%d read ramp reg(0x%x) error: %d", buck, ramp_reg1, reg_value);  in _buck_set_ramp_delay()
325 	reg_value &= 0x3f;  in _buck_set_ramp_delay()
329 		       reg_value | (ramp_value & 0x03) << 0x06);  in _buck_set_ramp_delay()
332 	if (reg_value < 0) {  in _buck_set_ramp_delay()
333 		printf("buck%d read ramp reg(0x%x) error: %d", buck, ramp_reg2, reg_value);  in _buck_set_ramp_delay()
339 			      reg_value | (ramp_value & 0x04) << (buck % 8));  in _buck_set_ramp_delay()
350 				      enable ? mask : 0);  in _buck_set_suspend_enable()
353 			mask = 0x40;  in _buck_set_suspend_enable()
355 			mask = 0x80;  in _buck_set_suspend_enable()
357 				      enable ? mask : 0);  in _buck_set_suspend_enable()
376 	if (val < 0)  in _buck_get_suspend_enable()
378 	ret = val & mask ? 1 : 0;  in _buck_get_suspend_enable()
418 	uint mask = 0;  in _ldo_get_enable()
419 	int ret = 0;  in _ldo_get_enable()
435 	if (ret < 0)  in _ldo_get_enable()
445 	int ret = 0;  in _ldo_set_enable()
450 			en_reg = RK806_NLDO_EN(0);  in _ldo_set_enable()
454 				value = ((0 << ldo % 4) | (1 << (ldo % 4 + 4)));  in _ldo_set_enable()
459 				value = 0x44;  in _ldo_set_enable()
461 				value = 0x40;  in _ldo_set_enable()
475 	uint mask = 0, en_reg;  in _pldo_get_enable()
476 	int ret = 0;  in _pldo_get_enable()
481 			en_reg = RK806_PLDO_EN(0);  in _pldo_get_enable()
484 				mask = (1 << 0);  in _pldo_get_enable()
489 				mask = (1 << 0);  in _pldo_get_enable()
500 	if (ret < 0)  in _pldo_get_enable()
510 	int ret = 0;  in _pldo_set_enable()
515 			en_reg = RK806_PLDO_EN(0);  in _pldo_set_enable()
524 				value = ((1 << 0) | (1 << 4));  in _pldo_set_enable()
533 				value = ((0 << 1) | (1 << 5));  in _pldo_set_enable()
536 			en_reg = RK806_PLDO_EN(0);  in _pldo_set_enable()
538 				value = ((1 << 0) | (1 << 4));  in _pldo_set_enable()
540 				value = ((0 << 0) | (1 << 4));  in _pldo_set_enable()
559 			      enable ? mask : 0);  in _ldo_set_suspend_enable()
572 	if (val < 0)  in _ldo_get_suspend_enable()
574 	ret = val & mask ? 1 : 0;  in _ldo_get_suspend_enable()
582 	const struct rk8xx_reg_info *info = get_buck_reg(dev->parent, buck, 0);  in buck_get_value()
590 	if (ret < 0)  in buck_get_value()
618 	const struct rk8xx_reg_info *info = get_buck_reg(dev->parent, buck, 0);  in buck_get_suspend_value()
626 	if (ret < 0)  in buck_get_suspend_value()
689 	const struct rk8xx_reg_info *info = get_ldo_reg(dev->parent, ldo, 0);  in ldo_get_value()
697 	if (ret < 0)  in ldo_get_value()
714 	if (info->step_uv == 0)  in ldo_set_value()
719 	debug("%s: volt=%d, ldo=%d, reg=0x%x, mask=0x%x, val=0x%x\n",  in ldo_set_value()
728 	const struct rk8xx_reg_info *info = get_pldo_reg(dev->parent, ldo, 0);  in pldo_get_value()
736 	if (ret < 0)  in pldo_get_value()
753 	if (info->step_uv == 0)  in pldo_set_value()
758 	debug("%s: volt=%d, ldo=%d, reg=0x%x, mask=0x%x, val=0x%x\n",  in pldo_set_value()
774 	if (info->step_uv == 0)  in ldo_set_suspend_value()
779 	debug("%s: volt=%d, ldo=%d, reg=0x%x, mask=0x%x, val=0x%x\n",  in ldo_set_suspend_value()
788 	const struct rk8xx_reg_info *info = get_ldo_reg(dev->parent, ldo, 0);  in ldo_get_suspend_value()
796 	if (ret < 0)  in ldo_get_suspend_value()
856 	if (info->step_uv == 0)  in pldo_set_suspend_value()
867 	const struct rk8xx_reg_info *info = get_pldo_reg(dev->parent, ldo, 0);  in pldo_get_suspend_value()
875 	if (ret < 0)  in pldo_get_suspend_value()
893 			      enable ? mask : 0);  in _pldo_set_suspend_enable()
909 	if (val < 0)  in _pldo_get_suspend_enable()
911 	ret = val & mask ? 1 : 0;  in _pldo_get_suspend_enable()
936 	uc_pdata->mode_count = 0;  in rk8xx_buck_probe()
938 	return 0;  in rk8xx_buck_probe()
947 	uc_pdata->mode_count = 0;  in rk8xx_ldo_probe()
949 	return 0;  in rk8xx_ldo_probe()
958 	uc_pdata->mode_count = 0;  in rk8xx_pldo_probe()
960 	return 0;  in rk8xx_pldo_probe()