35 #define MHZ		1000000  macro
38 #define OSC_HZ			(24UL * MHZ)
39 #define VCO_MAX_HZ		(3200UL * MHZ)
40 #define VCO_MIN_HZ		(800UL * MHZ)
41 #define OUTPUT_MAX_HZ		(3200UL * MHZ)
42 #define OUTPUT_MIN_HZ		(24UL * MHZ)
43 #define MIN_FOUTVCO_FREQ	(800UL * MHZ)
44 #define MAX_FOUTVCO_FREQ	(2000UL * MHZ)
46 #define RK3588_VCO_MIN_HZ	(2250UL * MHZ)
47 #define RK3588_VCO_MAX_HZ	(4500UL * MHZ)
48 #define RK3588_FOUT_MIN_HZ	(37UL * MHZ)
49 #define RK3588_FOUT_MAX_HZ	(4500UL * MHZ)
128 	if (fin_hz / MHZ * MHZ == fin_hz && fout_hz / MHZ * MHZ == fout_hz) {  in rockchip_pll_clk_set_by_auto()
129 		fin_hz /= MHZ;  in rockchip_pll_clk_set_by_auto()
130 		foutvco /= MHZ;  in rockchip_pll_clk_set_by_auto()
148 		clk_gcd = gcd(fin_hz / MHZ, foutvco / MHZ);  in rockchip_pll_clk_set_by_auto()
149 		rate_table->refdiv = fin_hz / MHZ / clk_gcd;  in rockchip_pll_clk_set_by_auto()
150 		rate_table->fbdiv = foutvco / MHZ / clk_gcd;  in rockchip_pll_clk_set_by_auto()
156 		f_frac = (foutvco % MHZ);  in rockchip_pll_clk_set_by_auto()
183 	if (fin_hz / MHZ * MHZ == fin_hz && fout_hz / MHZ * MHZ == fout_hz) {  in rk3588_pll_clk_set_by_auto()
240 			return rk3588_pll_clk_set_by_auto(24 * MHZ, rate);  in rockchip_get_pll_settings()
242 			return rockchip_pll_clk_set_by_auto(24 * MHZ, rate);  in rockchip_get_pll_settings()