Lines Matching full:grf

378 	static struct rv1126_grf * const grf = (void *)GRF_BASE;  in board_debug_uart_init()  local
381 rk_clrsetreg(&grf->gpio1c_iomux_l, in board_debug_uart_init()
388 static struct rv1126_grf * const grf = (void *)GRF_BASE; in board_debug_uart_init()
406 rk_clrsetreg(&grf->gpio1d_iomux_l, in board_debug_uart_init()
413 static struct rv1126_grf * const grf = (void *)GRF_BASE; in board_debug_uart_init()
417 rk_clrsetreg(&grf->iofunc_con2, UART2_IO_SEL_MASK, in board_debug_uart_init()
421 rk_clrsetreg(&grf->gpio1a_iomux_h, in board_debug_uart_init()
427 rk_clrsetreg(&grf->iofunc_con2, UART2_IO_SEL_MASK, in board_debug_uart_init()
431 rk_clrsetreg(&grf->gpio3a_iomux_l, in board_debug_uart_init()
438 static struct rv1126_grf * const grf = (void *)GRF_BASE; in board_debug_uart_init()
442 rk_clrsetreg(&grf->iofunc_con2, UART3_IO_SEL_MASK, in board_debug_uart_init()
446 rk_clrsetreg(&grf->gpio3c_iomux_h, in board_debug_uart_init()
453 rk_clrsetreg(&grf->iofunc_con2, UART3_IO_SEL_MASK, in board_debug_uart_init()
457 rk_clrsetreg(&grf->gpio1a_iomux_h, in board_debug_uart_init()
463 rk_clrsetreg(&grf->iofunc_con2, UART3_IO_SEL_MASK, in board_debug_uart_init()
467 rk_clrsetreg(&grf->gpio3a_iomux_l, in board_debug_uart_init()
474 static struct rv1126_grf * const grf = (void *)GRF_BASE; in board_debug_uart_init()
478 rk_clrsetreg(&grf->iofunc_con2, UART4_IO_SEL_MASK, in board_debug_uart_init()
482 rk_clrsetreg(&grf->gpio3a_iomux_h, in board_debug_uart_init()
489 rk_clrsetreg(&grf->iofunc_con2, UART4_IO_SEL_MASK, in board_debug_uart_init()
493 rk_clrsetreg(&grf->gpio2a_iomux_h, in board_debug_uart_init()
499 rk_clrsetreg(&grf->iofunc_con2, UART4_IO_SEL_MASK, in board_debug_uart_init()
503 rk_clrsetreg(&grf->gpio1d_iomux_h, in board_debug_uart_init()
510 static struct rv1126_grf * const grf = (void *)GRF_BASE; in board_debug_uart_init()
514 rk_clrsetreg(&grf->iofunc_con2, UART5_IO_SEL_MASK, in board_debug_uart_init()
518 rk_clrsetreg(&grf->gpio3a_iomux_h, in board_debug_uart_init()
525 rk_clrsetreg(&grf->iofunc_con2, UART5_IO_SEL_MASK, in board_debug_uart_init()
529 rk_clrsetreg(&grf->gpio2b_iomux_l, in board_debug_uart_init()
535 rk_clrsetreg(&grf->iofunc_con2, UART5_IO_SEL_MASK, in board_debug_uart_init()
539 rk_clrsetreg(&grf->gpio2a_iomux_l, in board_debug_uart_init()
722 static struct rv1126_grf * const grf = (void *)GRF_BASE; in arch_cpu_init()
724 writel(0x0F0F0303, &grf->gpio0d_iomux_h); in arch_cpu_init()
725 writel(0xFFFF3333, &grf->gpio1a_iomux_l); in arch_cpu_init()
727 static struct rv1126_grf * const grf = (void *)GRF_BASE; in arch_cpu_init()
729 writel(0xFFFF2222, &grf->gpio0c_iomux_h); in arch_cpu_init()
730 writel(0xFFFF2222, &grf->gpio0d_iomux_l); in arch_cpu_init()
731 writel(0xF0F02020, &grf->gpio0d_iomux_h); in arch_cpu_init()
733 static struct rv1126_grf * const grf = (void *)GRF_BASE; in arch_cpu_init()
735 writel(0xFFFF1111, &grf->gpio0c_iomux_h); in arch_cpu_init()
736 writel(0xFFFF1111, &grf->gpio0d_iomux_l); in arch_cpu_init()
737 writel(0xF0FF1011, &grf->gpio0d_iomux_h); in arch_cpu_init()
738 writel(0xFFFF1111, &grf->gpio1a_iomux_l); in arch_cpu_init()