4  * SPDX-License-Identifier:     GPL-2.0+
83 	struct rk3399_grf_regs * const grf = (void *)GRF_BASE;  in arch_cpu_init()  local
99 	rk_clrsetreg(&sgrf->ddr_rgn_con[16], 0x1ff, 0);  in arch_cpu_init()
100 	rk_clrreg(&sgrf->slv_secure_con4, 0x2000);  in arch_cpu_init()
104 	rk_clrreg(&grf->emmccore_con[11], 0x0ff);  in arch_cpu_init()
107 	rk_clrreg(&pmugrf->soc_con0, 1 << 5);  in arch_cpu_init()
113 	writel(0x7f002000, &pmucru->pmucru_clksel[1]);  in arch_cpu_init()
114 	writel(0x01000100, &pmucru->pmucru_clkgate_con[0]);  in arch_cpu_init()
127 	struct rk3399_grf_regs * const grf = (void *)GRF_BASE;  in board_debug_uart_init()  local
130 	/* Enable early UART0 on the RK3399 */  in board_debug_uart_init()
131 	rk_clrsetreg(&grf->gpio2c_iomux,  in board_debug_uart_init()
134 	rk_clrsetreg(&grf->gpio2c_iomux,  in board_debug_uart_init()
138 	/* Enable early UART2 channel on the RK3399/RK3399PRO */  in board_debug_uart_init()
139 	rk_clrsetreg(&grf->gpio4c_iomux,  in board_debug_uart_init()
142 	rk_clrsetreg(&grf->gpio4c_iomux,  in board_debug_uart_init()
147 	rk_clrsetreg(&grf->soc_con7,  in board_debug_uart_init()
152 	rk_clrsetreg(&grf->soc_con7,  in board_debug_uart_init()