522 static void dram_all_config(const struct dram_info *dram,  in dram_all_config()  argument
544 		dram_cfg_rbc(&dram->chan[chan], chan, sdram_params);  in dram_all_config()
547 		ddr_rank_2_row15en(dram->grf, 0);  in dram_all_config()
549 		ddr_rank_2_row15en(dram->grf, 1);  in dram_all_config()
551 	writel(sys_reg, &dram->pmu->sys_reg[2]);  in dram_all_config()
554 static int sdram_rank_bw_detect(struct dram_info *dram, int channel,  in sdram_rank_bw_detect()  argument
559 	const struct chan_info *chan = &dram->chan[channel];  in sdram_rank_bw_detect()
562 	ddr_rank_2_row15en(dram->grf, 0);  in sdram_rank_bw_detect()
585 					    dram->grf);  in sdram_rank_bw_detect()
595 			ddr_phy_ctl_reset(dram->cru, channel, 1);  in sdram_rank_bw_detect()
597 			ddr_phy_ctl_reset(dram->cru, channel, 0);  in sdram_rank_bw_detect()
615 static int sdram_col_row_detect(struct dram_info *dram, int channel,  in sdram_col_row_detect()  argument
620 	const struct chan_info *chan = &dram->chan[channel];  in sdram_col_row_detect()
643 	ddr_rank_2_row15en(dram->grf, 1);  in sdram_col_row_detect()
692 static int sdram_init(struct dram_info *dram,  in sdram_init()  argument
705 	ret = clk_set_rate(&dram->ddr_clk, sdram_params->base.ddr_freq);  in sdram_init()
712 		const struct chan_info *chan = &dram->chan[channel];  in sdram_init()
716 		phy_pctrl_reset(dram->cru, publ, channel);  in sdram_init()
721 		pctl_cfg(channel, pctl, sdram_params, dram->grf);  in sdram_init()
737 				    sdram_params->ch[channel].bw, dram->grf);  in sdram_init()
757 		sdram_rank_bw_detect(dram, channel, sdram_params);  in sdram_init()
770 		ret = sdram_col_row_detect(dram, channel, sdram_params);  in sdram_init()
779 	dram_all_config(dram, sdram_params);  in sdram_init()