Lines Matching +full:- +full:pinmux
1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
10 pinctrl: pin-controller@50002000 {
11 #address-cells = <1>;
12 #size-cells = <1>;
13 compatible = "st,stm32mp157-pinctrl";
15 interrupt-parent = <&exti>;
17 pins-are-numbered;
20 gpio-controller;
21 #gpio-cells = <2>;
22 interrupt-controller;
23 #interrupt-cells = <2>;
26 st,bank-name = "GPIOA";
28 gpio-ranges = <&pinctrl 0 0 16>;
32 gpio-controller;
33 #gpio-cells = <2>;
34 interrupt-controller;
35 #interrupt-cells = <2>;
38 st,bank-name = "GPIOB";
40 gpio-ranges = <&pinctrl 0 16 16>;
44 gpio-controller;
45 #gpio-cells = <2>;
46 interrupt-controller;
47 #interrupt-cells = <2>;
50 st,bank-name = "GPIOC";
52 gpio-ranges = <&pinctrl 0 32 16>;
56 gpio-controller;
57 #gpio-cells = <2>;
58 interrupt-controller;
59 #interrupt-cells = <2>;
62 st,bank-name = "GPIOD";
64 gpio-ranges = <&pinctrl 0 48 16>;
68 gpio-controller;
69 #gpio-cells = <2>;
70 interrupt-controller;
71 #interrupt-cells = <2>;
74 st,bank-name = "GPIOE";
76 gpio-ranges = <&pinctrl 0 64 16>;
80 gpio-controller;
81 #gpio-cells = <2>;
82 interrupt-controller;
83 #interrupt-cells = <2>;
86 st,bank-name = "GPIOF";
88 gpio-ranges = <&pinctrl 0 80 16>;
92 gpio-controller;
93 #gpio-cells = <2>;
94 interrupt-controller;
95 #interrupt-cells = <2>;
98 st,bank-name = "GPIOG";
100 gpio-ranges = <&pinctrl 0 96 16>;
104 gpio-controller;
105 #gpio-cells = <2>;
106 interrupt-controller;
107 #interrupt-cells = <2>;
110 st,bank-name = "GPIOH";
112 gpio-ranges = <&pinctrl 0 112 16>;
116 gpio-controller;
117 #gpio-cells = <2>;
118 interrupt-controller;
119 #interrupt-cells = <2>;
122 st,bank-name = "GPIOI";
124 gpio-ranges = <&pinctrl 0 128 16>;
128 gpio-controller;
129 #gpio-cells = <2>;
130 interrupt-controller;
131 #interrupt-cells = <2>;
134 st,bank-name = "GPIOJ";
136 gpio-ranges = <&pinctrl 0 144 16>;
140 gpio-controller;
141 #gpio-cells = <2>;
142 interrupt-controller;
143 #interrupt-cells = <2>;
146 st,bank-name = "GPIOK";
148 gpio-ranges = <&pinctrl 0 160 8>;
151 adc12_usb_pwr_pins_a: adc12-usb-pwr-pins-0 {
153 pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* ADC12 in18 */
158 cec_pins_a: cec-0 {
160 pinmux = <STM32_PINMUX('A', 15, AF4)>;
161 bias-disable;
162 drive-open-drain;
163 slew-rate = <0>;
167 ethernet0_rgmii_pins_a: rgmii-0 {
169 pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
178 bias-disable;
179 drive-push-pull;
180 slew-rate = <3>;
183 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
189 bias-disable;
193 ethernet0_rgmii_pins_sleep_a: rgmii-sleep-0 {
195 pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
213 i2c1_pins_a: i2c1-0 {
215 pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */
217 bias-disable;
218 drive-open-drain;
219 slew-rate = <0>;
223 i2c2_pins_a: i2c2-0 {
225 pinmux = <STM32_PINMUX('H', 4, AF4)>, /* I2C2_SCL */
227 bias-disable;
228 drive-open-drain;
229 slew-rate = <0>;
233 i2c5_pins_a: i2c5-0 {
235 pinmux = <STM32_PINMUX('A', 11, AF4)>, /* I2C5_SCL */
237 bias-disable;
238 drive-open-drain;
239 slew-rate = <0>;
243 m_can1_pins_a: m-can1-0 {
245 pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */
246 slew-rate = <1>;
247 drive-push-pull;
248 bias-disable;
251 pinmux = <STM32_PINMUX('I', 9, AF9)>; /* CAN1_RX */
252 bias-disable;
256 pwm2_pins_a: pwm2-0 {
258 pinmux = <STM32_PINMUX('A', 3, AF1)>; /* TIM2_CH4 */
259 bias-pull-down;
260 drive-push-pull;
261 slew-rate = <0>;
265 pwm8_pins_a: pwm8-0 {
267 pinmux = <STM32_PINMUX('I', 2, AF3)>; /* TIM8_CH4 */
268 bias-pull-down;
269 drive-push-pull;
270 slew-rate = <0>;
274 pwm12_pins_a: pwm12-0 {
276 pinmux = <STM32_PINMUX('H', 6, AF2)>; /* TIM12_CH1 */
277 bias-pull-down;
278 drive-push-pull;
279 slew-rate = <0>;
283 qspi_clk_pins_a: qspi-clk-0 {
285 pinmux = <STM32_PINMUX('F', 10, AF9)>; /* QSPI_CLK */
286 bias-disable;
287 drive-push-pull;
288 slew-rate = <3>;
292 qspi_bk1_pins_a: qspi-bk1-0 {
294 pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */
298 bias-disable;
299 drive-push-pull;
300 slew-rate = <3>;
303 pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QSPI_BK1_NCS */
304 bias-pull-up;
305 drive-push-pull;
306 slew-rate = <3>;
310 qspi_bk2_pins_a: qspi-bk2-0 {
312 pinmux = <STM32_PINMUX('H', 2, AF9)>, /* QSPI_BK2_IO0 */
316 bias-disable;
317 drive-push-pull;
318 slew-rate = <3>;
321 pinmux = <STM32_PINMUX('C', 0, AF10)>; /* QSPI_BK2_NCS */
322 bias-pull-up;
323 drive-push-pull;
324 slew-rate = <3>;
327 sdmmc1_b4_pins_a: sdmmc1-b4@0 {
329 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
335 slew-rate = <3>;
336 drive-push-pull;
337 bias-disable;
341 sdmmc1_dir_pins_a: sdmmc1-dir@0 {
343 pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
347 slew-rate = <3>;
348 drive-push-pull;
349 bias-pull-up;
352 sdmmc2_b4_pins_a: sdmmc2-b4@0 {
354 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
360 slew-rate = <3>;
361 drive-push-pull;
362 bias-pull-up;
366 sdmmc2_d47_pins_a: sdmmc2-d47@0 {
368 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
372 slew-rate = <3>;
373 drive-push-pull;
374 bias-pull-up;
378 stusb1600_pins_a: stusb1600-0 {
380 pinmux = <STM32_PINMUX('I', 11, ANALOG)>;
381 bias-pull-up;
385 uart4_pins_a: uart4-0 {
387 pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
388 bias-disable;
389 drive-push-pull;
390 slew-rate = <0>;
393 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
394 bias-disable;
398 usbotg_hs_pins_a: usbotg_hs-0 {
400 pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* OTG_ID */
405 pinctrl_z: pin-controller-z@54004000 {
406 #address-cells = <1>;
407 #size-cells = <1>;
408 compatible = "st,stm32mp157-z-pinctrl";
410 pins-are-numbered;
411 interrupt-parent = <&exti>;
415 gpio-controller;
416 #gpio-cells = <2>;
417 interrupt-controller;
418 #interrupt-cells = <2>;
421 st,bank-name = "GPIOZ";
422 st,bank-ioport = <11>;
424 gpio-ranges = <&pinctrl_z 0 400 8>;
427 i2c4_pins_a: i2c4-0 {
429 pinmux = <STM32_PINMUX('Z', 4, AF6)>, /* I2C4_SCL */
431 bias-disable;
432 drive-open-drain;
433 slew-rate = <0>;
437 spi1_pins_a: spi1-0 {
439 pinmux = <STM32_PINMUX('Z', 0, AF5)>, /* SPI1_SCK */
441 bias-disable;
442 drive-push-pull;
443 slew-rate = <1>;
447 pinmux = <STM32_PINMUX('Z', 1, AF5)>; /* SPI1_MISO */
448 bias-disable;