arm/dts/rv1108.dtsi

32 		#size-cells = <0>;
37 			reg = <0xf00>;
63 	mipi_dphy: mipi-dphy@0x20228000 {
65 		reg = <0x20228000 0x8000>;
67 		#clock-cells = <0>;
70 		#phy-cells = <0>;
76 		reg = <0x300e0000 0x10000>;
86 		#size-cells = <0>;
88 		pinctrl-0 = <&lcdc_mipi_data>;
93 			#size-cells = <0>;
95 			port@0 {
96 				reg = <0>;
99 				#size-cells = <0>;
101 				mipi_in_vop: endpoint@0 {
102 					reg = <0>;
121 		#clock-cells = <0>;
132 			reg = <0x102a0000 0x4000>;
133 			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
143 		reg = <0x10080000 0x2000>;
146 		ranges = <0 0x10080000 0x2000>;
151 		reg = <0x10210000 0x100>;
159 		pinctrl-0 = <&uart2m0_xfer>;
165 		reg = <0x10220000 0x100>;
173 		pinctrl-0 = <&uart1_xfer>;
179 		reg = <0x10230000 0x100>;
187 		pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
193 		reg = <0x10300000 0x1000>;
198 		reg = <0x100 0x0c>;
206 			#phy-cells = <0>;
213 			#phy-cells = <0>;
220 		reg = <0x1038c000 0x100>;
231 		reg = <0x20040000 0x10>;
235 		pinctrl-0 = <&pwm0_pin>;
243 		reg = <0x20060000 0x1000>;
248 		reg = <0x20200000 0x1000>;
255 		reg = <0x20000000 0x1000>;
259 		#size-cells = <0>;
263 		pinctrl-0 = <&i2c0_xfer>;
268 		reg = <0x202a0000 0x1000>;
273 		reg = <0x30100000 0x1000>;
275 		nandc_id = <0>;
287 		fifo-depth = <0x100>;
289 		reg = <0x30110000 0x4000>;
299 		fifo-depth = <0x100>;
301 		reg = <0x30120000 0x4000>;
312 		fifo-depth = <0x100>;
314 		reg = <0x30130000 0x4000>;
320 		reg = <0x30140000 0x20000>;
329 		reg = <0x30160000 0x20000>;
339 		reg = <0x30180000 0x40000>;
350 		reg = <0x301c0000 0x200>;
352 		#size-cells = <0>;
356 		pinctrl-0 = <&sfc_pins>;
363 		reg = <0x30200000 0x10000>;
376 		pinctrl-0 = <&rmii_pins>;
386 		#address-cells = <0>;
388 		reg = <0x32011000 0x1000>,
389 		      <0x32012000 0x1000>,
390 		      <0x32014000 0x2000>,
391 		      <0x32016000 0x2000>;
405 			reg = <0x20030000 0x100>;
418 			reg = <0x10310000 0x100>;
431 			reg = <0x10320000 0x100>;
444 			reg = <0x10330000 0x100>;
509 				rockchip,pins = <0 RK_PC5 RK_FUNC_1 &pcfg_pull_none>;
547 				rockchip,pins = <0 RK_PB1 RK_FUNC_1 &pcfg_pull_none_smt>,
548 						<0 RK_PB2 RK_FUNC_1 &pcfg_pull_none_smt>;
561 				rockchip,pins = <0 RK_PC2 RK_FUNC_2 &pcfg_pull_none>,
562 						<0 RK_PC6 RK_FUNC_3 &pcfg_pull_none>;
566 				rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>,
567 						<0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
585 				rockchip,pins = <0 RK_PB6 RK_FUNC_1 &pcfg_pull_none>,
586 						<0 RK_PC4 RK_FUNC_2 &pcfg_pull_none>;
611 				rockchip,pins = <0 RK_PA1 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
687                 reg = <0x202b0000 0x400
688 		       0x20210000 0x400
689 		       0x31070000 0x40
690 		       0x10300000 0xf94
691 		       0x20060000 0x38c
692 		       0x20200000 0x1f0
693 		       0x20010000 0x78>;
698 		reg = <0x30040000 0xe00>;
708 			#size-cells = <0>;
710 			vop_out_mipi: endpoint@0 {
711 				reg = <0>;