1 // SPDX-License-Identifier: GPL-2.0-only
4  * ALSA SoC Audio Layer - Rockchip I2S Controller driver
7  * Author: Jianqun <jay.xu@rock-chips.com>
39  * CS5: |                                   |   CGMS-A  |
64 	{ .compatible = "rockchip,rk3066-spdif",
66 	{ .compatible = "rockchip,rk3188-spdif",
68 	{ .compatible = "rockchip,rk3228-spdif",
70 	{ .compatible = "rockchip,rk3288-spdif",
72 	{ .compatible = "rockchip,rk3328-spdif",
74 	{ .compatible = "rockchip,rk3366-spdif",
76 	{ .compatible = "rockchip,rk3368-spdif",
78 	{ .compatible = "rockchip,rk3399-spdif",
80 	{ .compatible = "rockchip,rk3568-spdif",
82 	{ .compatible = "rockchip,rk3588-spdif",
90 	struct rk_spdif_dev *spdif = dev_get_drvdata(dev);  in rk_spdif_runtime_suspend()  local
92 	regcache_cache_only(spdif->regmap, true);  in rk_spdif_runtime_suspend()
93 	clk_disable_unprepare(spdif->mclk);  in rk_spdif_runtime_suspend()
94 	clk_disable_unprepare(spdif->hclk);  in rk_spdif_runtime_suspend()
101 	struct rk_spdif_dev *spdif = dev_get_drvdata(dev);  in rk_spdif_runtime_resume()  local
104 	ret = clk_prepare_enable(spdif->mclk);  in rk_spdif_runtime_resume()
106 		dev_err(spdif->dev, "mclk clock enable failed %d\n", ret);  in rk_spdif_runtime_resume()
110 	ret = clk_prepare_enable(spdif->hclk);  in rk_spdif_runtime_resume()
112 		dev_err(spdif->dev, "hclk clock enable failed %d\n", ret);  in rk_spdif_runtime_resume()
116 	regcache_cache_only(spdif->regmap, false);  in rk_spdif_runtime_resume()
117 	regcache_mark_dirty(spdif->regmap);  in rk_spdif_runtime_resume()
119 	ret = regcache_sync(spdif->regmap);  in rk_spdif_runtime_resume()
121 		clk_disable_unprepare(spdif->mclk);  in rk_spdif_runtime_resume()
122 		clk_disable_unprepare(spdif->hclk);  in rk_spdif_runtime_resume()
132 	struct rk_spdif_dev *spdif = snd_soc_dai_get_drvdata(dai);  in rk_spdif_hw_params()  local
134 	unsigned int mclk_rate = clk_get_rate(spdif->mclk);  in rk_spdif_hw_params()
144 		regmap_write(spdif->regmap, SPDIF_CHNSRn(i), CS_FRAME(fc[i]));  in rk_spdif_hw_params()
146 	regmap_update_bits(spdif->regmap, SPDIF_CFGR, SPDIF_CFGR_CSE_MASK,  in rk_spdif_hw_params()
170 		return -EINVAL;  in rk_spdif_hw_params()
173 	regmap_update_bits(spdif->regmap, SPDIF_CFGR, SPDIF_CFGR_CLR_MASK,  in rk_spdif_hw_params()
177 	ret = regmap_update_bits(spdif->regmap, SPDIF_CFGR,  in rk_spdif_hw_params()
189 	struct rk_spdif_dev *spdif = snd_soc_dai_get_drvdata(dai);  in rk_spdif_trigger()  local
196 		ret = regmap_update_bits(spdif->regmap, SPDIF_DMACR,  in rk_spdif_trigger()
205 		ret = regmap_update_bits(spdif->regmap, SPDIF_XFER,  in rk_spdif_trigger()
212 		ret = regmap_update_bits(spdif->regmap, SPDIF_DMACR,  in rk_spdif_trigger()
219 		ret = regmap_update_bits(spdif->regmap, SPDIF_XFER,  in rk_spdif_trigger()
224 		ret = -EINVAL;  in rk_spdif_trigger()
233 	struct rk_spdif_dev *spdif = snd_soc_dai_get_drvdata(dai);  in rk_spdif_dai_probe()  local
235 	dai->playback_dma_data = &spdif->playback_dma_data;  in rk_spdif_dai_probe()
243 	struct rk_spdif_dev *spdif = snd_soc_dai_get_drvdata(dai);  in rk_spdif_set_sysclk()  local
249 	ret = clk_set_rate(spdif->mclk, freq);  in rk_spdif_set_sysclk()
251 		dev_err(spdif->dev, "Failed to set mclk: %d\n", ret);  in rk_spdif_set_sysclk()
278 	.name = "rockchip-spdif",
341 	struct device_node *np = pdev->dev.of_node;  in rk_spdif_probe()
342 	struct rk_spdif_dev *spdif;  in rk_spdif_probe()  local
349 	if (match->data == (void *)RK_SPDIF_RK3288) {  in rk_spdif_probe()
354 			dev_err(&pdev->dev,  in rk_spdif_probe()
359 		/* Select the 8 channel SPDIF solution on RK3288 as  in rk_spdif_probe()
365 	spdif = devm_kzalloc(&pdev->dev, sizeof(*spdif), GFP_KERNEL);  in rk_spdif_probe()
366 	if (!spdif)  in rk_spdif_probe()
367 		return -ENOMEM;  in rk_spdif_probe()
369 	spdif->hclk = devm_clk_get(&pdev->dev, "hclk");  in rk_spdif_probe()
370 	if (IS_ERR(spdif->hclk))  in rk_spdif_probe()
371 		return PTR_ERR(spdif->hclk);  in rk_spdif_probe()
373 	spdif->mclk = devm_clk_get(&pdev->dev, "mclk");  in rk_spdif_probe()
374 	if (IS_ERR(spdif->mclk))  in rk_spdif_probe()
375 		return PTR_ERR(spdif->mclk);  in rk_spdif_probe()
381 	spdif->regmap = devm_regmap_init_mmio_clk(&pdev->dev, "hclk", regs,  in rk_spdif_probe()
383 	if (IS_ERR(spdif->regmap))  in rk_spdif_probe()
384 		return PTR_ERR(spdif->regmap);  in rk_spdif_probe()
386 	spdif->playback_dma_data.addr = res->start + SPDIF_SMPDR;  in rk_spdif_probe()
387 	spdif->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;  in rk_spdif_probe()
388 	spdif->playback_dma_data.maxburst = 4;  in rk_spdif_probe()
390 	spdif->dev = &pdev->dev;  in rk_spdif_probe()
391 	dev_set_drvdata(&pdev->dev, spdif);  in rk_spdif_probe()
393 	pm_runtime_enable(&pdev->dev);  in rk_spdif_probe()
394 	if (!pm_runtime_enabled(&pdev->dev)) {  in rk_spdif_probe()
395 		ret = rk_spdif_runtime_resume(&pdev->dev);  in rk_spdif_probe()
400 	ret = devm_snd_soc_register_component(&pdev->dev,  in rk_spdif_probe()
404 		dev_err(&pdev->dev, "Could not register DAI\n");  in rk_spdif_probe()
408 	ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0);  in rk_spdif_probe()
410 		dev_err(&pdev->dev, "Could not register PCM\n");  in rk_spdif_probe()
417 	if (!pm_runtime_status_suspended(&pdev->dev))  in rk_spdif_probe()
418 		rk_spdif_runtime_suspend(&pdev->dev);  in rk_spdif_probe()
420 	pm_runtime_disable(&pdev->dev);  in rk_spdif_probe()
427 	pm_runtime_disable(&pdev->dev);  in rk_spdif_remove()
428 	if (!pm_runtime_status_suspended(&pdev->dev))  in rk_spdif_remove()
429 		rk_spdif_runtime_suspend(&pdev->dev);  in rk_spdif_remove()
443 		.name = "rockchip-spdif",
450 MODULE_ALIAS("platform:rockchip-spdif");
451 MODULE_DESCRIPTION("ROCKCHIP SPDIF transceiver Interface");