436 	unsigned int regv1, regv2, lvl;  in classd_event()  local
445 		regv1 = snd_soc_component_read(component, ES8396_CLK_CTRL_REG08);  in classd_event()
446 		regv1 &= 0xcf;  in classd_event()
448 		snd_soc_component_write(component, ES8396_CLK_CTRL_REG08, regv1);  in classd_event()
461 			regv1 = regv2 & 0xD8;  in classd_event()
464 			regv1 |= lvl;  in classd_event()
465 			regv1 |= 0x10;  in classd_event()
468 			regv1 = regv1 | 0x40;  in classd_event()
470 			regv1 = regv1 & 0xbf;  in classd_event()
472 		snd_soc_component_write(component, ES8396_SPK_CTRL_1_REG3C, regv1);  in classd_event()
476 		regv1 = snd_soc_component_read(component, ES8396_SPK_MIXER_REG26);  in classd_event()
478 		regv1 &= 0xee;  in classd_event()
479 		snd_soc_component_write(component, ES8396_SPK_MIXER_REG26, regv1);  in classd_event()
487 		regv1 = snd_soc_component_read(component, ES8396_HP_MIXER_BOOST_REG2B);  in classd_event()
488 		regv1 &= 0xcc;  in classd_event()
489 		snd_soc_component_write(component, ES8396_HP_MIXER_BOOST_REG2B, regv1);  in classd_event()
491 		regv1 = snd_soc_component_read(component, ES8396_CPHP_CTRL_3_REG44);  in classd_event()
492 		regv1 &= 0xcc;  in classd_event()
493 		snd_soc_component_write(component, ES8396_CPHP_CTRL_3_REG44, regv1);  in classd_event()
495 		regv1 = snd_soc_component_read(component, ES8396_CPHP_CTRL_1_REG42);  in classd_event()
496 		regv1 &= 0xdf;  in classd_event()
497 		snd_soc_component_write(component, ES8396_CPHP_CTRL_1_REG42, regv1);  in classd_event()
499 		regv1 = snd_soc_component_read(component, ES8396_CPHP_CTRL_2_REG43);  in classd_event()
500 		regv1 &= 0x7f;  in classd_event()
501 		snd_soc_component_write(component, ES8396_CPHP_CTRL_2_REG43, regv1);  in classd_event()
512 		regv1 = snd_soc_component_read(component, ES8396_CLK_CTRL_REG08);  in classd_event()
513 		regv1 |= 0x10;  in classd_event()
515 		snd_soc_component_write(component, ES8396_CLK_CTRL_REG08, regv1);  in classd_event()
519 		regv1 = snd_soc_component_read(component, ES8396_SPK_EN_VOL_REG3B);  in classd_event()
520 		regv1 &= 0x77;  in classd_event()
522 		snd_soc_component_write(component, ES8396_SPK_EN_VOL_REG3B, regv1);  in classd_event()
524 		regv1 = snd_soc_component_read(component, ES8396_SPK_CTRL_SRC_REG3A);  in classd_event()
525 		regv1 |= 0x44;	/* set pdnspkl_biasgen, set pdnspkr_biasgen */  in classd_event()
526 		snd_soc_component_write(component, ES8396_SPK_CTRL_SRC_REG3A, regv1);  in classd_event()
527 		regv1 = snd_soc_component_read(component, ES8396_SPK_MIXER_REG26);  in classd_event()
529 		regv1 |= 0x11;  in classd_event()
530 		snd_soc_component_write(component, ES8396_SPK_MIXER_REG26, regv1);  in classd_event()