soc/codecs/es8311.c

133 	SOC_SINGLE("ADC SDP MUTE", ES8311_SDPOUT_REG0A, 6, 1, 0),
134 	SOC_SINGLE("ADC INVERTED", ES8311_ADC_REG16, 4, 1, 0),
135 	SOC_SINGLE("ADC SYNC", ES8311_ADC_REG16, 5, 1, 1),
136 	SOC_SINGLE("ADC RAM CLR", ES8311_ADC_REG16, 3, 1, 0),
139 	SOC_SINGLE("ALC ENABLE", ES8311_ADC_REG18, 7, 1, 0),
153 	SOC_SINGLE("ADC FS MODE", ES8311_CLK_MANAGER_REG03, 6, 1, 0),
154 	SOC_SINGLE("ADC OSR", ES8311_CLK_MANAGER_REG03, 0, 63, 0),
155 	SOC_SINGLE("DAC SDP MUTE", ES8311_SDPIN_REG09, 6, 1, 0),
156 	SOC_SINGLE("DAC DEM MUTE", ES8311_DAC_REG31, 5, 1, 0),
157 	SOC_SINGLE("DAC INVERT", ES8311_DAC_REG31, 4, 1, 0),
158 	SOC_SINGLE("DAC RAM CLR", ES8311_DAC_REG31, 3, 1, 0),
160 	SOC_SINGLE("DAC OFFSET", ES8311_DAC_REG33, 0, 255, 0),
163 	SOC_SINGLE("DRC ENABLE", ES8311_DAC_REG34, 7, 1, 0),
172 	SOC_SINGLE("DAC OSR", ES8311_CLK_MANAGER_REG04, 0, 127, 0),
175 	SOC_SINGLE("MCLK INVERT", ES8311_CLK_MANAGER_REG01, 6, 1, 0),
176 	SOC_SINGLE("BCLK INVERT", ES8311_CLK_MANAGER_REG06, 5, 1, 0),