Lines Matching +full:codec +full:- +full:0
1 // SPDX-License-Identifier: GPL-2.0-or-later
37 #define FLOAT_ZERO 0x00000000
38 #define FLOAT_ONE 0x3f800000
39 #define FLOAT_TWO 0x40000000
40 #define FLOAT_THREE 0x40400000
41 #define FLOAT_FIVE 0x40a00000
42 #define FLOAT_SIX 0x40c00000
43 #define FLOAT_EIGHT 0x41000000
44 #define FLOAT_MINUS_5 0xc0a00000
46 #define UNSOL_TAG_DSP 0x16
55 #define MASTERCONTROL 0x80
59 #define WIDGET_CHIP_CTRL 0x15
60 #define WIDGET_DSP_CTRL 0x16
70 #define SCP_SET 0
74 #define DESKTOP_EFX_FILE "ctefx-desktop.bin"
75 #define R3DI_EFX_FILE "ctefx-r3di.bin"
107 #define VNODE_START_NID 0x80
115 #define VNODES_COUNT (VNODE_END_NID - VNODE_START_NID)
117 #define EFFECT_START_NID 0x90
126 #define OUT_EFFECTS_COUNT (OUT_EFFECT_END_NID - OUT_EFFECT_START_NID)
134 #define IN_EFFECTS_COUNT (IN_EFFECT_END_NID - IN_EFFECT_START_NID)
154 #define EFFECTS_COUNT (EFFECT_END_NID - EFFECT_START_NID)
163 * X-bass.
170 #define DSP_CAPTURE_INIT_LATENCY 0
181 int direct; /* 0:output; 1:input*/
182 int params; /* number of default non-on/off params */
187 #define EFX_DIR_OUT 0
193 .mid = 0x96,
194 .reqs = {0, 1},
197 .def_vals = {0x3F800000, 0x3F2B851F}
201 .mid = 0x96,
205 .def_vals = {0x3F800000, 0x3F266666}
209 .mid = 0x96,
213 .def_vals = {0x00000000, 0x3F000000}
217 .mid = 0x96,
221 .def_vals = {0x3F800000, 0x3F3D70A4, 0x00000000}
223 { .name = "X-Bass",
225 .mid = 0x96,
229 .def_vals = {0x3F800000, 0x42A00000, 0x3F000000}
233 .mid = 0x96,
238 .def_vals = {0x00000000, 0x00000000, 0x00000000, 0x00000000,
239 0x00000000, 0x00000000, 0x00000000, 0x00000000,
240 0x00000000, 0x00000000, 0x00000000, 0x00000000}
244 .mid = 0x95,
245 .reqs = {0, 1, 2, 3},
248 .def_vals = {0x00000000, 0x3F3A9692, 0x00000000, 0x00000000}
252 .mid = 0x95,
256 .def_vals = {0x3F800000, 0x3D7DF3B6, 0x41F00000, 0x41F00000}
260 .mid = 0x95,
264 .def_vals = {0x00000000, 0x3F3D70A4}
268 .mid = 0x95,
272 .def_vals = {0x3F800000, 0x3F000000}
276 .mid = 0x95,
280 .def_vals = {0x00000000, 0x43C80000, 0x44AF0000, 0x44FA0000,
281 0x3F800000, 0x3F800000, 0x3F800000, 0x00000000,
282 0x00000000}
290 #define TUNING_CTL_START_NID 0xC0
304 #define TUNING_CTLS_COUNT (TUNING_CTL_END_NID - TUNING_CTL_START_NID)
313 int direct; /* 0:output; 1:input*/
321 .mid = 0x95,
324 .def_val = 0x41F00000
329 .mid = 0x95,
332 .def_val = 0x3F3D70A4
337 .mid = 0x96,
340 .def_val = 0x00000000
345 .mid = 0x96,
348 .def_val = 0x00000000
353 .mid = 0x96,
356 .def_val = 0x00000000
361 .mid = 0x96,
364 .def_val = 0x00000000
369 .mid = 0x96,
372 .def_val = 0x00000000
377 .mid = 0x96,
380 .def_val = 0x00000000
385 .mid = 0x96,
388 .def_val = 0x00000000
393 .mid = 0x96,
396 .def_val = 0x00000000
401 .mid = 0x96,
404 .def_val = 0x00000000
409 .mid = 0x96,
412 .def_val = 0x00000000
435 .mid = 0x95,
441 .vals = { 0x00000000, 0x43C80000, 0x44AF0000,
442 0x44FA0000, 0x3F800000, 0x3F800000,
443 0x3F800000, 0x00000000, 0x00000000 }
446 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
447 0x44FA0000, 0x3F19999A, 0x3F866666,
448 0x3F800000, 0x00000000, 0x00000000 }
451 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
452 0x450AC000, 0x4017AE14, 0x3F6B851F,
453 0x3F800000, 0x00000000, 0x00000000 }
456 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
457 0x44FA0000, 0x40400000, 0x3F28F5C3,
458 0x3F800000, 0x00000000, 0x00000000 }
461 .vals = { 0x3F800000, 0x44324000, 0x44BB8000,
462 0x44E10000, 0x3FB33333, 0x3FB9999A,
463 0x3F800000, 0x3E3A2E43, 0x00000000 }
466 .vals = { 0x3F800000, 0x43EA0000, 0x44A52000,
467 0x45098000, 0x3F266666, 0x3FC00000,
468 0x3F800000, 0x00000000, 0x00000000 }
471 .vals = { 0x3F800000, 0x43C70000, 0x44AE6000,
472 0x45193000, 0x3F8E147B, 0x3F75C28F,
473 0x3F800000, 0x00000000, 0x00000000 }
476 .vals = { 0x3F800000, 0x43930000, 0x44BEE000,
477 0x45007000, 0x3F451EB8, 0x3F7851EC,
478 0x3F800000, 0x00000000, 0x00000000 }
481 .vals = { 0x3F800000, 0x43BFC5AC, 0x44B28FDF,
482 0x451F6000, 0x3F266666, 0x3FA7D945,
483 0x3F800000, 0x3CF5C28F, 0x00000000 }
486 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
487 0x44FA0000, 0x3FB2718B, 0x3F800000,
488 0xBC07010E, 0x00000000, 0x00000000 }
491 .vals = { 0x3F800000, 0x43C20000, 0x44906000,
492 0x44E70000, 0x3F4CCCCD, 0x3F8A3D71,
493 0x3F0A3D71, 0x00000000, 0x00000000 }
496 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
497 0x44FA0000, 0x3F800000, 0x3F800000,
498 0x3E4CCCCD, 0x00000000, 0x00000000 }
501 .vals = { 0x3F800000, 0x43A9C5AC, 0x44AA4FDF,
502 0x44FFC000, 0x3EDBB56F, 0x3F99C4CA,
503 0x3F800000, 0x00000000, 0x00000000 }
506 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
507 0x44FA0000, 0x3F800000, 0x3F1A043C,
508 0x3F800000, 0x00000000, 0x00000000 }
531 .mid = 0x96,
538 .vals = { 0x00000000, 0x00000000, 0x00000000,
539 0x00000000, 0x00000000, 0x00000000,
540 0x00000000, 0x00000000, 0x00000000,
541 0x00000000, 0x00000000 }
544 .vals = { 0x00000000, 0x00000000, 0x3F8CCCCD,
545 0x40000000, 0x00000000, 0x00000000,
546 0x00000000, 0x00000000, 0x40000000,
547 0x40000000, 0x40000000 }
550 .vals = { 0x00000000, 0x00000000, 0x40C00000,
551 0x40C00000, 0x40466666, 0x00000000,
552 0x00000000, 0x00000000, 0x00000000,
553 0x40466666, 0x40466666 }
556 .vals = { 0x00000000, 0xBF99999A, 0x00000000,
557 0x3FA66666, 0x3FA66666, 0x3F8CCCCD,
558 0x00000000, 0x00000000, 0x40000000,
559 0x40466666, 0x40800000 }
562 .vals = { 0x00000000, 0xBF99999A, 0x40000000,
563 0x40466666, 0x40866666, 0xBF99999A,
564 0xBF99999A, 0x00000000, 0x00000000,
565 0x40800000, 0x40800000 }
568 .vals = { 0x00000000, 0x00000000, 0x00000000,
569 0x3F8CCCCD, 0x40800000, 0x40800000,
570 0x40800000, 0x00000000, 0x3F8CCCCD,
571 0x40466666, 0x40466666 }
574 .vals = { 0x00000000, 0x00000000, 0x40000000,
575 0x40000000, 0x00000000, 0x00000000,
576 0x00000000, 0x3F8CCCCD, 0x40000000,
577 0x40000000, 0x40000000 }
580 .vals = { 0x00000000, 0xBFCCCCCD, 0x00000000,
581 0x40000000, 0x40000000, 0x00000000,
582 0xBF99999A, 0xBF99999A, 0x00000000,
583 0x40466666, 0x40C00000 }
586 .vals = { 0x00000000, 0xBF99999A, 0xBF99999A,
587 0x3F8CCCCD, 0x40000000, 0xBF99999A,
588 0xBF99999A, 0x00000000, 0x00000000,
589 0x40800000, 0x40800000 }
592 .vals = { 0x00000000, 0xC0000000, 0xBF99999A,
593 0xBF99999A, 0x00000000, 0x40466666,
594 0x40800000, 0x40466666, 0x00000000,
595 0x00000000, 0x3F8CCCCD }
600 * DSP reqs for handling full-range speakers/bass redirection. If a speaker is
604 * enabled. X-Bass must be disabled when using these.
607 SPEAKER_BASS_REDIRECT = 0x15,
608 SPEAKER_BASS_REDIRECT_XOVER_FREQ = 0x16,
609 /* Between 0x16-0x1a are the X-Bass reqs. */
610 SPEAKER_FULL_RANGE_FRONT_L_R = 0x1a,
611 SPEAKER_FULL_RANGE_CENTER_LFE = 0x1b,
612 SPEAKER_FULL_RANGE_REAR_L_R = 0x1c,
613 SPEAKER_FULL_RANGE_SURROUND_L_R = 0x1d,
614 SPEAKER_BASS_REDIRECT_SUB_GAIN = 0x1e,
619 * module ID 0x96, the output effects module.
625 * connect software, the QUERY_SPEAKER_EQ_ADDRESS req on mid 0x80 is
635 SPEAKER_TUNING_USE_SPEAKER_EQ = 0x1f,
636 SPEAKER_TUNING_ENABLE_CENTER_EQ = 0x20,
637 SPEAKER_TUNING_FRONT_LEFT_VOL_LEVEL = 0x21,
638 SPEAKER_TUNING_FRONT_RIGHT_VOL_LEVEL = 0x22,
639 SPEAKER_TUNING_CENTER_VOL_LEVEL = 0x23,
640 SPEAKER_TUNING_LFE_VOL_LEVEL = 0x24,
641 SPEAKER_TUNING_REAR_LEFT_VOL_LEVEL = 0x25,
642 SPEAKER_TUNING_REAR_RIGHT_VOL_LEVEL = 0x26,
643 SPEAKER_TUNING_SURROUND_LEFT_VOL_LEVEL = 0x27,
644 SPEAKER_TUNING_SURROUND_RIGHT_VOL_LEVEL = 0x28,
649 SPEAKER_TUNING_FRONT_LEFT_INVERT = 0x29,
650 SPEAKER_TUNING_FRONT_RIGHT_INVERT = 0x2a,
651 SPEAKER_TUNING_CENTER_INVERT = 0x2b,
652 SPEAKER_TUNING_LFE_INVERT = 0x2c,
653 SPEAKER_TUNING_REAR_LEFT_INVERT = 0x2d,
654 SPEAKER_TUNING_REAR_RIGHT_INVERT = 0x2e,
655 SPEAKER_TUNING_SURROUND_LEFT_INVERT = 0x2f,
656 SPEAKER_TUNING_SURROUND_RIGHT_INVERT = 0x30,
658 SPEAKER_TUNING_FRONT_LEFT_DELAY = 0x31,
659 SPEAKER_TUNING_FRONT_RIGHT_DELAY = 0x32,
660 SPEAKER_TUNING_CENTER_DELAY = 0x33,
661 SPEAKER_TUNING_LFE_DELAY = 0x34,
662 SPEAKER_TUNING_REAR_LEFT_DELAY = 0x35,
663 SPEAKER_TUNING_REAR_RIGHT_DELAY = 0x36,
664 SPEAKER_TUNING_SURROUND_LEFT_DELAY = 0x37,
665 SPEAKER_TUNING_SURROUND_RIGHT_DELAY = 0x38,
667 SPEAKER_TUNING_MAIN_VOLUME = 0x39,
668 SPEAKER_TUNING_MUTE = 0x3a,
709 #define DSP_VOL_OUT 0
720 .mid = 0x32,
724 .mid = 0x37,
738 .group = { 0x30, 0x30, 0x48, 0x48, 0x48, 0x30 },
739 .target = { 0x2e, 0x30, 0x0d, 0x17, 0x19, 0x32 },
741 .vals = { { 0x00, 0x00, 0x40, 0x00, 0x00, 0x3f },
743 { 0x3f, 0x3f, 0x00, 0x00, 0x00, 0x00 } },
747 .group = { 0x30, 0x30, 0x48, 0x48, 0x48, 0x30 },
748 .target = { 0x2e, 0x30, 0x0d, 0x17, 0x19, 0x32 },
750 .vals = { { 0x00, 0x00, 0x40, 0x00, 0x00, 0x3f },
752 { 0x3f, 0x3f, 0x00, 0x00, 0x02, 0x00 } },
763 { .name = "Low (16-31",
764 .vals = { 0xff, 0x2c, 0xf5, 0x32 }
766 { .name = "Medium (32-149",
767 .vals = { 0x38, 0xa8, 0x3e, 0x4c }
769 { .name = "High (150-600",
770 .vals = { 0xff, 0xff, 0xff, 0x7f }
781 .val = 0xa0
784 .val = 0xc0
787 .val = 0x80
793 VENDOR_DSPIO_SCP_WRITE_DATA_LOW = 0x000,
794 VENDOR_DSPIO_SCP_WRITE_DATA_HIGH = 0x100,
796 VENDOR_DSPIO_STATUS = 0xF01,
797 VENDOR_DSPIO_SCP_POST_READ_DATA = 0x702,
798 VENDOR_DSPIO_SCP_READ_DATA = 0xF02,
799 VENDOR_DSPIO_DSP_INIT = 0x703,
800 VENDOR_DSPIO_SCP_POST_COUNT_QUERY = 0x704,
801 VENDOR_DSPIO_SCP_READ_COUNT = 0xF04,
804 VENDOR_CHIPIO_ADDRESS_LOW = 0x000,
805 VENDOR_CHIPIO_ADDRESS_HIGH = 0x100,
806 VENDOR_CHIPIO_STREAM_FORMAT = 0x200,
807 VENDOR_CHIPIO_DATA_LOW = 0x300,
808 VENDOR_CHIPIO_DATA_HIGH = 0x400,
810 VENDOR_CHIPIO_8051_WRITE_DIRECT = 0x500,
811 VENDOR_CHIPIO_8051_READ_DIRECT = 0xD00,
813 VENDOR_CHIPIO_GET_PARAMETER = 0xF00,
814 VENDOR_CHIPIO_STATUS = 0xF01,
815 VENDOR_CHIPIO_HIC_POST_READ = 0x702,
816 VENDOR_CHIPIO_HIC_READ_DATA = 0xF03,
818 VENDOR_CHIPIO_8051_DATA_WRITE = 0x707,
819 VENDOR_CHIPIO_8051_DATA_READ = 0xF07,
820 VENDOR_CHIPIO_8051_PMEM_READ = 0xF08,
821 VENDOR_CHIPIO_8051_IRAM_WRITE = 0x709,
822 VENDOR_CHIPIO_8051_IRAM_READ = 0xF09,
824 VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE = 0x70A,
825 VENDOR_CHIPIO_CT_EXTENSIONS_GET = 0xF0A,
827 VENDOR_CHIPIO_PLL_PMU_WRITE = 0x70C,
828 VENDOR_CHIPIO_PLL_PMU_READ = 0xF0C,
829 VENDOR_CHIPIO_8051_ADDRESS_LOW = 0x70D,
830 VENDOR_CHIPIO_8051_ADDRESS_HIGH = 0x70E,
831 VENDOR_CHIPIO_FLAG_SET = 0x70F,
832 VENDOR_CHIPIO_FLAGS_GET = 0xF0F,
833 VENDOR_CHIPIO_PARAM_SET = 0x710,
834 VENDOR_CHIPIO_PARAM_GET = 0xF10,
836 VENDOR_CHIPIO_PORT_ALLOC_CONFIG_SET = 0x711,
837 VENDOR_CHIPIO_PORT_ALLOC_SET = 0x712,
838 VENDOR_CHIPIO_PORT_ALLOC_GET = 0xF12,
839 VENDOR_CHIPIO_PORT_FREE_SET = 0x713,
841 VENDOR_CHIPIO_PARAM_EX_ID_GET = 0xF17,
842 VENDOR_CHIPIO_PARAM_EX_ID_SET = 0x717,
843 VENDOR_CHIPIO_PARAM_EX_VALUE_GET = 0xF18,
844 VENDOR_CHIPIO_PARAM_EX_VALUE_SET = 0x718,
846 VENDOR_CHIPIO_DMIC_CTL_SET = 0x788,
847 VENDOR_CHIPIO_DMIC_CTL_GET = 0xF88,
848 VENDOR_CHIPIO_DMIC_PIN_SET = 0x789,
849 VENDOR_CHIPIO_DMIC_PIN_GET = 0xF89,
850 VENDOR_CHIPIO_DMIC_MCLK_SET = 0x78A,
851 VENDOR_CHIPIO_DMIC_MCLK_GET = 0xF8A,
853 VENDOR_CHIPIO_EAPD_SEL_SET = 0x78D
861 CONTROL_FLAG_C_MGR = 0,
866 /* Tracker for the SPDIF-in path is bypassed/enabled */
884 /* Decode Loop (DSP->SRC->DSP) is disabled/enabled */
886 /* De-emphasis filter on DAC-1 disabled/enabled */
888 /* De-emphasis filter on DAC-2 disabled/enabled */
890 /* De-emphasis filter on DAC-3 disabled/enabled */
892 /* High-pass filter on ADC_B disabled/enabled */
894 /* High-pass filter on ADC_C disabled/enabled */
918 /* 0: None, 1: Mic1In*/
920 /* 0: force HDA, 1: allow DSP if HDA Spdif1Out stream is idle */
931 * sense given the fact the AE-5 uses it and has the ASI flag set.
966 VENDOR_STATUS_DSPIO_OK = 0x00,
968 VENDOR_STATUS_DSPIO_BUSY = 0x01,
970 VENDOR_STATUS_DSPIO_SCP_COMMAND_QUEUE_FULL = 0x02,
972 VENDOR_STATUS_DSPIO_SCP_RESPONSE_QUEUE_EMPTY = 0x03
980 VENDOR_STATUS_CHIPIO_OK = 0x00,
982 VENDOR_STATUS_CHIPIO_BUSY = 0x01
989 SR_6_000 = 0x00,
990 SR_8_000 = 0x01,
991 SR_9_600 = 0x02,
992 SR_11_025 = 0x03,
993 SR_16_000 = 0x04,
994 SR_22_050 = 0x05,
995 SR_24_000 = 0x06,
996 SR_32_000 = 0x07,
997 SR_44_100 = 0x08,
998 SR_48_000 = 0x09,
999 SR_88_200 = 0x0A,
1000 SR_96_000 = 0x0B,
1001 SR_144_000 = 0x0C,
1002 SR_176_400 = 0x0D,
1003 SR_192_000 = 0x0E,
1004 SR_384_000 = 0x0F,
1006 SR_COUNT = 0x10,
1008 SR_RATE_UNKNOWN = 0x1F
1012 DSP_DOWNLOAD_FAILED = -1,
1013 DSP_DOWNLOAD_INIT = 0,
1019 #define get_hdafmt_chs(fmt) (fmt & 0xf)
1020 #define get_hdafmt_bits(fmt) ((fmt >> 4) & 0x7)
1021 #define get_hdafmt_rate(fmt) ((fmt >> 8) & 0x7f)
1022 #define get_hdafmt_type(fmt) ((fmt >> 15) & 0x1)
1095 /* AE-5 Control values */
1101 struct hda_codec *codec; member
1110 * AE-5 all use PCI region 2 to toggle GPIO and other currently unknown
1148 #define ca0132_quirk(spec) ((spec)->quirk)
1149 #define ca0132_use_pci_mmio(spec) ((spec)->use_pci_mmio)
1150 #define ca0132_use_alt_functions(spec) ((spec)->use_alt_functions)
1151 #define ca0132_use_alt_controls(spec) ((spec)->use_alt_controls)
1160 { 0x0b, 0x90170110 }, /* Builtin Speaker */
1161 { 0x0c, 0x411111f0 }, /* N/A */
1162 { 0x0d, 0x411111f0 }, /* N/A */
1163 { 0x0e, 0x411111f0 }, /* N/A */
1164 { 0x0f, 0x0321101f }, /* HP */
1165 { 0x10, 0x411111f0 }, /* Headset? disabled for now */
1166 { 0x11, 0x03a11021 }, /* Mic */
1167 { 0x12, 0xd5a30140 }, /* Builtin Mic */
1168 { 0x13, 0x411111f0 }, /* N/A */
1169 { 0x18, 0x411111f0 }, /* N/A */
1175 { 0x0b, 0x01017010 }, /* Port G -- Lineout FRONT L/R */
1176 { 0x0c, 0x014510f0 }, /* SPDIF Out 1 */
1177 { 0x0d, 0x014510f0 }, /* Digital Out */
1178 { 0x0e, 0x01c510f0 }, /* SPDIF In */
1179 { 0x0f, 0x0221701f }, /* Port A -- BackPanel HP */
1180 { 0x10, 0x01017012 }, /* Port D -- Center/LFE or FP Hp */
1181 { 0x11, 0x01017014 }, /* Port B -- LineMicIn2 / Rear L/R */
1182 { 0x12, 0x01a170f0 }, /* Port C -- LineIn1 */
1183 { 0x13, 0x908700f0 }, /* What U Hear In*/
1184 { 0x18, 0x50d000f0 }, /* N/A */
1190 { 0x0b, 0x01047110 }, /* Port G -- Lineout FRONT L/R */
1191 { 0x0c, 0x414510f0 }, /* SPDIF Out 1 - Disabled*/
1192 { 0x0d, 0x014510f0 }, /* Digital Out */
1193 { 0x0e, 0x41c520f0 }, /* SPDIF In - Disabled*/
1194 { 0x0f, 0x0122711f }, /* Port A -- BackPanel HP */
1195 { 0x10, 0x01017111 }, /* Port D -- Center/LFE */
1196 { 0x11, 0x01017114 }, /* Port B -- LineMicIn2 / Rear L/R */
1197 { 0x12, 0x01a271f0 }, /* Port C -- LineIn1 */
1198 { 0x13, 0x908700f0 }, /* What U Hear In*/
1199 { 0x18, 0x50d000f0 }, /* N/A */
1205 { 0x0b, 0x01014110 }, /* Port G -- Lineout FRONT L/R */
1206 { 0x0c, 0x014510f0 }, /* SPDIF Out 1 */
1207 { 0x0d, 0x014510f0 }, /* Digital Out */
1208 { 0x0e, 0x01c520f0 }, /* SPDIF In */
1209 { 0x0f, 0x0221401f }, /* Port A -- BackPanel HP */
1210 { 0x10, 0x01016011 }, /* Port D -- Center/LFE or FP Hp */
1211 { 0x11, 0x01011014 }, /* Port B -- LineMicIn2 / Rear L/R */
1212 { 0x12, 0x02a090f0 }, /* Port C -- LineIn1 */
1213 { 0x13, 0x908700f0 }, /* What U Hear In*/
1214 { 0x18, 0x50d000f0 }, /* N/A */
1218 /* Sound Blaster AE-5 pin configs taken from Windows Driver */
1220 { 0x0b, 0x01017010 }, /* Port G -- Lineout FRONT L/R */
1221 { 0x0c, 0x014510f0 }, /* SPDIF Out 1 */
1222 { 0x0d, 0x014510f0 }, /* Digital Out */
1223 { 0x0e, 0x01c510f0 }, /* SPDIF In */
1224 { 0x0f, 0x01017114 }, /* Port A -- Rear L/R. */
1225 { 0x10, 0x01017012 }, /* Port D -- Center/LFE or FP Hp */
1226 { 0x11, 0x012170ff }, /* Port B -- LineMicIn2 / Rear Headphone */
1227 { 0x12, 0x01a170f0 }, /* Port C -- LineIn1 */
1228 { 0x13, 0x908700f0 }, /* What U Hear In*/
1229 { 0x18, 0x50d000f0 }, /* N/A */
1235 { 0x0b, 0x01014110 }, /* Port G -- Lineout FRONT L/R */
1236 { 0x0c, 0x014510f0 }, /* SPDIF Out 1 */
1237 { 0x0d, 0x014510f0 }, /* Digital Out */
1238 { 0x0e, 0x41c520f0 }, /* SPDIF In */
1239 { 0x0f, 0x0221401f }, /* Port A -- BackPanel HP */
1240 { 0x10, 0x01016011 }, /* Port D -- Center/LFE or FP Hp */
1241 { 0x11, 0x01011014 }, /* Port B -- LineMicIn2 / Rear L/R */
1242 { 0x12, 0x02a090f0 }, /* Port C -- LineIn1 */
1243 { 0x13, 0x908700f0 }, /* What U Hear In*/
1244 { 0x18, 0x500000f0 }, /* N/A */
1249 { 0x0b, 0x01017010 },
1250 { 0x0c, 0x014510f0 },
1251 { 0x0d, 0x414510f0 },
1252 { 0x0e, 0x01c520f0 },
1253 { 0x0f, 0x01017114 },
1254 { 0x10, 0x01017011 },
1255 { 0x11, 0x018170ff },
1256 { 0x12, 0x01a170f0 },
1257 { 0x13, 0x908700f0 },
1258 { 0x18, 0x500000f0 },
1263 SND_PCI_QUIRK(0x1028, 0x057b, "Alienware M17x R4", QUIRK_ALIENWARE_M17XR4),
1264 SND_PCI_QUIRK(0x1028, 0x0685, "Alienware 15 2015", QUIRK_ALIENWARE),
1265 SND_PCI_QUIRK(0x1028, 0x0688, "Alienware 17 2015", QUIRK_ALIENWARE),
1266 SND_PCI_QUIRK(0x1028, 0x0708, "Alienware 15 R2 2016", QUIRK_ALIENWARE),
1267 SND_PCI_QUIRK(0x1102, 0x0010, "Sound Blaster Z", QUIRK_SBZ),
1268 SND_PCI_QUIRK(0x1102, 0x0023, "Sound Blaster Z", QUIRK_SBZ),
1269 SND_PCI_QUIRK(0x1102, 0x0027, "Sound Blaster Z", QUIRK_SBZ),
1270 SND_PCI_QUIRK(0x1102, 0x0033, "Sound Blaster ZxR", QUIRK_SBZ),
1271 SND_PCI_QUIRK(0x1458, 0xA016, "Recon3Di", QUIRK_R3DI),
1272 SND_PCI_QUIRK(0x1458, 0xA026, "Gigabyte G1.Sniper Z97", QUIRK_R3DI),
1273 SND_PCI_QUIRK(0x1458, 0xA036, "Gigabyte GA-Z170X-Gaming 7", QUIRK_R3DI),
1274 SND_PCI_QUIRK(0x3842, 0x1038, "EVGA X99 Classified", QUIRK_R3DI),
1275 SND_PCI_QUIRK(0x3842, 0x1055, "EVGA Z390 DARK", QUIRK_R3DI),
1276 SND_PCI_QUIRK(0x1102, 0x0013, "Recon3D", QUIRK_R3D),
1277 SND_PCI_QUIRK(0x1102, 0x0018, "Recon3D", QUIRK_R3D),
1278 SND_PCI_QUIRK(0x1102, 0x0051, "Sound Blaster AE-5", QUIRK_AE5),
1279 SND_PCI_QUIRK(0x1102, 0x0191, "Sound Blaster AE-5 Plus", QUIRK_AE5),
1280 SND_PCI_QUIRK(0x1102, 0x0081, "Sound Blaster AE-7", QUIRK_AE7),
1288 unsigned int dac2port; /* ParamID 0x0d value. */
1323 { .dac2port = 0x24,
1327 .mmio_gpio_count = 0,
1328 .scp_cmds_count = 0,
1332 { .dac2port = 0x21,
1335 .hda_gpio_set = 0,
1336 .mmio_gpio_count = 0,
1337 .scp_cmds_count = 0,
1346 { .dac2port = 0x24,
1351 .scp_cmds_count = 0,
1355 { .dac2port = 0x21,
1359 .mmio_gpio_set = { 0 },
1360 .scp_cmds_count = 0,
1369 { .dac2port = 0x18,
1373 .mmio_gpio_set = { 0, 1, 1 },
1374 .scp_cmds_count = 0,
1377 { .dac2port = 0x12,
1381 .mmio_gpio_set = { 1, 1, 0 },
1382 .scp_cmds_count = 0,
1391 { .dac2port = 0x24,
1395 .mmio_gpio_set = { 1, 1, 0 },
1396 .scp_cmds_count = 0,
1400 { .dac2port = 0x21,
1404 .mmio_gpio_set = { 0, 1, 1 },
1405 .scp_cmds_count = 0,
1414 { .dac2port = 0xa4,
1416 .mmio_gpio_count = 0,
1418 .scp_cmd_mid = { 0x96, 0x96 },
1423 .chipio_write_addr = 0x0018b03c,
1424 .chipio_write_data = 0x00000012
1427 { .dac2port = 0xa1,
1429 .mmio_gpio_count = 0,
1431 .scp_cmd_mid = { 0x96, 0x96 },
1436 .chipio_write_addr = 0x0018b03c,
1437 .chipio_write_data = 0x00000012
1445 { .dac2port = 0x58,
1448 .mmio_gpio_pin = { 0 },
1451 .scp_cmd_mid = { 0x96, 0x96 },
1456 .chipio_write_addr = 0x0018b03c,
1457 .chipio_write_data = 0x00000000
1460 { .dac2port = 0x58,
1463 .mmio_gpio_pin = { 0 },
1466 .scp_cmd_mid = { 0x96, 0x96 },
1471 .chipio_write_addr = 0x0018b03c,
1472 .chipio_write_data = 0x00000010
1478 * CA0132 codec access
1480 static unsigned int codec_send_command(struct hda_codec *codec, hda_nid_t nid, in codec_send_command() argument
1484 response = snd_hda_codec_read(codec, nid, 0, verb, parm); in codec_send_command()
1487 return ((response == -1) ? -1 : 0); in codec_send_command()
1490 static int codec_set_converter_format(struct hda_codec *codec, hda_nid_t nid, in codec_set_converter_format() argument
1493 return codec_send_command(codec, nid, VENDOR_CHIPIO_STREAM_FORMAT, in codec_set_converter_format()
1494 converter_format & 0xffff, res); in codec_set_converter_format()
1497 static int codec_set_converter_stream_channel(struct hda_codec *codec, in codec_set_converter_stream_channel() argument
1501 unsigned char converter_stream_channel = 0; in codec_set_converter_stream_channel()
1503 converter_stream_channel = (stream << 4) | (channel & 0x0f); in codec_set_converter_stream_channel()
1504 return codec_send_command(codec, nid, AC_VERB_SET_CHANNEL_STREAMID, in codec_set_converter_stream_channel()
1509 static int chipio_send(struct hda_codec *codec, in chipio_send() argument
1518 res = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0, in chipio_send()
1521 return 0; in chipio_send()
1525 return -EIO; in chipio_send()
1529 * Write chip address through the vendor widget -- NOT protected by the Mutex!
1531 static int chipio_write_address(struct hda_codec *codec, in chipio_write_address() argument
1534 struct ca0132_spec *spec = codec->spec; in chipio_write_address()
1537 if (spec->curr_chip_addx == chip_addx) in chipio_write_address()
1538 return 0; in chipio_write_address()
1541 res = chipio_send(codec, VENDOR_CHIPIO_ADDRESS_LOW, in chipio_write_address()
1542 chip_addx & 0xffff); in chipio_write_address()
1544 if (res != -EIO) { in chipio_write_address()
1546 res = chipio_send(codec, VENDOR_CHIPIO_ADDRESS_HIGH, in chipio_write_address()
1550 spec->curr_chip_addx = (res < 0) ? ~0U : chip_addx; in chipio_write_address()
1556 * Write data through the vendor widget -- NOT protected by the Mutex!
1558 static int chipio_write_data(struct hda_codec *codec, unsigned int data) in chipio_write_data() argument
1560 struct ca0132_spec *spec = codec->spec; in chipio_write_data()
1564 res = chipio_send(codec, VENDOR_CHIPIO_DATA_LOW, data & 0xffff); in chipio_write_data()
1566 if (res != -EIO) { in chipio_write_data()
1568 res = chipio_send(codec, VENDOR_CHIPIO_DATA_HIGH, in chipio_write_data()
1574 spec->curr_chip_addx = (res != -EIO) ? in chipio_write_data()
1575 (spec->curr_chip_addx + 4) : ~0U; in chipio_write_data()
1580 * Write multiple data through the vendor widget -- NOT protected by the Mutex!
1582 static int chipio_write_data_multiple(struct hda_codec *codec, in chipio_write_data_multiple() argument
1586 int status = 0; in chipio_write_data_multiple()
1589 codec_dbg(codec, "chipio_write_data null ptr\n"); in chipio_write_data_multiple()
1590 return -EINVAL; in chipio_write_data_multiple()
1593 while ((count-- != 0) && (status == 0)) in chipio_write_data_multiple()
1594 status = chipio_write_data(codec, *data++); in chipio_write_data_multiple()
1601 * Read data through the vendor widget -- NOT protected by the Mutex!
1603 static int chipio_read_data(struct hda_codec *codec, unsigned int *data) in chipio_read_data() argument
1605 struct ca0132_spec *spec = codec->spec; in chipio_read_data()
1609 res = chipio_send(codec, VENDOR_CHIPIO_HIC_POST_READ, 0); in chipio_read_data()
1611 if (res != -EIO) { in chipio_read_data()
1613 res = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in chipio_read_data()
1616 if (res != -EIO) { in chipio_read_data()
1618 *data = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0, in chipio_read_data()
1620 0); in chipio_read_data()
1625 spec->curr_chip_addx = (res != -EIO) ? in chipio_read_data()
1626 (spec->curr_chip_addx + 4) : ~0U; in chipio_read_data()
1634 static int chipio_write(struct hda_codec *codec, in chipio_write() argument
1637 struct ca0132_spec *spec = codec->spec; in chipio_write()
1640 mutex_lock(&spec->chipio_mutex); in chipio_write()
1643 err = chipio_write_address(codec, chip_addx); in chipio_write()
1644 if (err < 0) in chipio_write()
1647 err = chipio_write_data(codec, data); in chipio_write()
1648 if (err < 0) in chipio_write()
1652 mutex_unlock(&spec->chipio_mutex); in chipio_write()
1660 static int chipio_write_no_mutex(struct hda_codec *codec, in chipio_write_no_mutex() argument
1667 err = chipio_write_address(codec, chip_addx); in chipio_write_no_mutex()
1668 if (err < 0) in chipio_write_no_mutex()
1671 err = chipio_write_data(codec, data); in chipio_write_no_mutex()
1672 if (err < 0) in chipio_write_no_mutex()
1683 static int chipio_write_multiple(struct hda_codec *codec, in chipio_write_multiple() argument
1688 struct ca0132_spec *spec = codec->spec; in chipio_write_multiple()
1691 mutex_lock(&spec->chipio_mutex); in chipio_write_multiple()
1692 status = chipio_write_address(codec, chip_addx); in chipio_write_multiple()
1693 if (status < 0) in chipio_write_multiple()
1696 status = chipio_write_data_multiple(codec, data, count); in chipio_write_multiple()
1698 mutex_unlock(&spec->chipio_mutex); in chipio_write_multiple()
1707 static int chipio_read(struct hda_codec *codec, in chipio_read() argument
1710 struct ca0132_spec *spec = codec->spec; in chipio_read()
1713 mutex_lock(&spec->chipio_mutex); in chipio_read()
1716 err = chipio_write_address(codec, chip_addx); in chipio_read()
1717 if (err < 0) in chipio_read()
1720 err = chipio_read_data(codec, data); in chipio_read()
1721 if (err < 0) in chipio_read()
1725 mutex_unlock(&spec->chipio_mutex); in chipio_read()
1732 static void chipio_set_control_flag(struct hda_codec *codec, in chipio_set_control_flag() argument
1739 flag_bit = (flag_state ? 1 : 0); in chipio_set_control_flag()
1741 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_flag()
1748 static void chipio_set_control_param(struct hda_codec *codec, in chipio_set_control_param() argument
1751 struct ca0132_spec *spec = codec->spec; in chipio_set_control_param()
1756 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param()
1759 mutex_lock(&spec->chipio_mutex); in chipio_set_control_param()
1760 if (chipio_send(codec, VENDOR_CHIPIO_STATUS, 0) == 0) { in chipio_set_control_param()
1761 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param()
1764 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param()
1768 mutex_unlock(&spec->chipio_mutex); in chipio_set_control_param()
1775 static void chipio_set_control_param_no_mutex(struct hda_codec *codec, in chipio_set_control_param_no_mutex() argument
1782 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param_no_mutex()
1785 if (chipio_send(codec, VENDOR_CHIPIO_STATUS, 0) == 0) { in chipio_set_control_param_no_mutex()
1786 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param_no_mutex()
1789 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param_no_mutex()
1799 static void chipio_set_stream_source_dest(struct hda_codec *codec, in chipio_set_stream_source_dest() argument
1802 chipio_set_control_param_no_mutex(codec, in chipio_set_stream_source_dest()
1804 chipio_set_control_param_no_mutex(codec, in chipio_set_stream_source_dest()
1806 chipio_set_control_param_no_mutex(codec, in chipio_set_stream_source_dest()
1813 static void chipio_set_stream_channels(struct hda_codec *codec, in chipio_set_stream_channels() argument
1816 chipio_set_control_param_no_mutex(codec, in chipio_set_stream_channels()
1818 chipio_set_control_param_no_mutex(codec, in chipio_set_stream_channels()
1825 static void chipio_set_stream_control(struct hda_codec *codec, in chipio_set_stream_control() argument
1828 chipio_set_control_param_no_mutex(codec, in chipio_set_stream_control()
1830 chipio_set_control_param_no_mutex(codec, in chipio_set_stream_control()
1838 static void chipio_set_conn_rate_no_mutex(struct hda_codec *codec, in chipio_set_conn_rate_no_mutex() argument
1841 chipio_set_control_param_no_mutex(codec, in chipio_set_conn_rate_no_mutex()
1843 chipio_set_control_param_no_mutex(codec, in chipio_set_conn_rate_no_mutex()
1850 static void chipio_set_conn_rate(struct hda_codec *codec, in chipio_set_conn_rate() argument
1853 chipio_set_control_param(codec, CONTROL_PARAM_CONN_POINT_ID, connid); in chipio_set_conn_rate()
1854 chipio_set_control_param(codec, CONTROL_PARAM_CONN_POINT_SAMPLE_RATE, in chipio_set_conn_rate()
1861 * 0x80-0xFF.
1863 static void chipio_8051_write_direct(struct hda_codec *codec, in chipio_8051_write_direct() argument
1869 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, verb, addr); in chipio_8051_write_direct()
1875 static void chipio_enable_clocks(struct hda_codec *codec) in chipio_enable_clocks() argument
1877 struct ca0132_spec *spec = codec->spec; in chipio_enable_clocks()
1879 mutex_lock(&spec->chipio_mutex); in chipio_enable_clocks()
1880 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_enable_clocks()
1881 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0); in chipio_enable_clocks()
1882 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_enable_clocks()
1883 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xff); in chipio_enable_clocks()
1884 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_enable_clocks()
1886 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_enable_clocks()
1887 VENDOR_CHIPIO_PLL_PMU_WRITE, 0x0b); in chipio_enable_clocks()
1888 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_enable_clocks()
1890 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_enable_clocks()
1891 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xff); in chipio_enable_clocks()
1892 mutex_unlock(&spec->chipio_mutex); in chipio_enable_clocks()
1898 static int dspio_send(struct hda_codec *codec, unsigned int reg, in dspio_send() argument
1906 res = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, reg, data); in dspio_send()
1907 if ((res >= 0) && (res != VENDOR_STATUS_DSPIO_BUSY)) in dspio_send()
1912 return -EIO; in dspio_send()
1918 static void dspio_write_wait(struct hda_codec *codec) in dspio_write_wait() argument
1924 status = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, in dspio_write_wait()
1925 VENDOR_DSPIO_STATUS, 0); in dspio_write_wait()
1936 static int dspio_write(struct hda_codec *codec, unsigned int scp_data) in dspio_write() argument
1938 struct ca0132_spec *spec = codec->spec; in dspio_write()
1941 dspio_write_wait(codec); in dspio_write()
1943 mutex_lock(&spec->chipio_mutex); in dspio_write()
1944 status = dspio_send(codec, VENDOR_DSPIO_SCP_WRITE_DATA_LOW, in dspio_write()
1945 scp_data & 0xffff); in dspio_write()
1946 if (status < 0) in dspio_write()
1949 status = dspio_send(codec, VENDOR_DSPIO_SCP_WRITE_DATA_HIGH, in dspio_write()
1951 if (status < 0) in dspio_write()
1955 status = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, in dspio_write()
1956 VENDOR_DSPIO_STATUS, 0); in dspio_write()
1958 mutex_unlock(&spec->chipio_mutex); in dspio_write()
1961 -EIO : 0; in dspio_write()
1967 static int dspio_write_multiple(struct hda_codec *codec, in dspio_write_multiple() argument
1970 int status = 0; in dspio_write_multiple()
1974 return -EINVAL; in dspio_write_multiple()
1976 count = 0; in dspio_write_multiple()
1978 status = dspio_write(codec, *buffer++); in dspio_write_multiple()
1979 if (status != 0) in dspio_write_multiple()
1987 static int dspio_read(struct hda_codec *codec, unsigned int *data) in dspio_read() argument
1991 status = dspio_send(codec, VENDOR_DSPIO_SCP_POST_READ_DATA, 0); in dspio_read()
1992 if (status == -EIO) in dspio_read()
1995 status = dspio_send(codec, VENDOR_DSPIO_STATUS, 0); in dspio_read()
1996 if (status == -EIO || in dspio_read()
1998 return -EIO; in dspio_read()
2000 *data = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, in dspio_read()
2001 VENDOR_DSPIO_SCP_READ_DATA, 0); in dspio_read()
2003 return 0; in dspio_read()
2006 static int dspio_read_multiple(struct hda_codec *codec, unsigned int *buffer, in dspio_read_multiple() argument
2009 int status = 0; in dspio_read_multiple()
2016 return -1; in dspio_read_multiple()
2018 count = 0; in dspio_read_multiple()
2020 status = dspio_read(codec, buffer++); in dspio_read_multiple()
2021 if (status != 0) in dspio_read_multiple()
2027 if (status == 0) { in dspio_read_multiple()
2029 status = dspio_read(codec, &dummy); in dspio_read_multiple()
2030 if (status != 0) in dspio_read_multiple()
2049 unsigned int header = 0; in make_scp_header()
2051 header = (data_size & 0x1f) << 27; in make_scp_header()
2052 header |= (error_flag & 0x01) << 26; in make_scp_header()
2053 header |= (resp_flag & 0x01) << 25; in make_scp_header()
2054 header |= (device_flag & 0x01) << 24; in make_scp_header()
2055 header |= (req & 0x7f) << 17; in make_scp_header()
2056 header |= (get_flag & 0x01) << 16; in make_scp_header()
2057 header |= (source_id & 0xff) << 8; in make_scp_header()
2058 header |= target_id & 0xff; in make_scp_header()
2074 *data_size = (header >> 27) & 0x1f; in extract_scp_header()
2076 *error_flag = (header >> 26) & 0x01; in extract_scp_header()
2078 *resp_flag = (header >> 25) & 0x01; in extract_scp_header()
2080 *device_flag = (header >> 24) & 0x01; in extract_scp_header()
2082 *req = (header >> 17) & 0x7f; in extract_scp_header()
2084 *get_flag = (header >> 16) & 0x01; in extract_scp_header()
2086 *source_id = (header >> 8) & 0xff; in extract_scp_header()
2088 *target_id = header & 0xff; in extract_scp_header()
2099 static void dspio_clear_response_queue(struct hda_codec *codec) in dspio_clear_response_queue() argument
2102 unsigned int dummy = 0; in dspio_clear_response_queue()
2107 status = dspio_read(codec, &dummy); in dspio_clear_response_queue()
2108 } while (status == 0 && time_before(jiffies, timeout)); in dspio_clear_response_queue()
2111 static int dspio_get_response_data(struct hda_codec *codec) in dspio_get_response_data() argument
2113 struct ca0132_spec *spec = codec->spec; in dspio_get_response_data()
2114 unsigned int data = 0; in dspio_get_response_data()
2117 if (dspio_read(codec, &data) < 0) in dspio_get_response_data()
2118 return -EIO; in dspio_get_response_data()
2120 if ((data & 0x00ffffff) == spec->wait_scp_header) { in dspio_get_response_data()
2121 spec->scp_resp_header = data; in dspio_get_response_data()
2122 spec->scp_resp_count = data >> 27; in dspio_get_response_data()
2123 count = spec->wait_num_data; in dspio_get_response_data()
2124 dspio_read_multiple(codec, spec->scp_resp_data, in dspio_get_response_data()
2125 &spec->scp_resp_count, count); in dspio_get_response_data()
2126 return 0; in dspio_get_response_data()
2129 return -EIO; in dspio_get_response_data()
2135 static int dspio_send_scp_message(struct hda_codec *codec, in dspio_send_scp_message() argument
2142 struct ca0132_spec *spec = codec->spec; in dspio_send_scp_message()
2143 int status = -1; in dspio_send_scp_message()
2144 unsigned int scp_send_size = 0; in dspio_send_scp_message()
2153 *bytes_returned = 0; in dspio_send_scp_message()
2163 return -EINVAL; in dspio_send_scp_message()
2167 return -EINVAL; in dspio_send_scp_message()
2169 spec->wait_scp_header = *((unsigned int *)send_buf); in dspio_send_scp_message()
2174 spec->wait_scp_header &= 0xffff0000; in dspio_send_scp_message()
2175 spec->wait_scp_header |= (resp_src_id << 8) | (resp_target_id); in dspio_send_scp_message()
2176 spec->wait_num_data = return_buf_size/sizeof(unsigned int) - 1; in dspio_send_scp_message()
2177 spec->wait_scp = 1; in dspio_send_scp_message()
2181 status = dspio_write_multiple(codec, (unsigned int *)send_buf, in dspio_send_scp_message()
2183 if (status < 0) { in dspio_send_scp_message()
2184 spec->wait_scp = 0; in dspio_send_scp_message()
2190 memset(return_buf, 0, return_buf_size); in dspio_send_scp_message()
2193 } while (spec->wait_scp && time_before(jiffies, timeout)); in dspio_send_scp_message()
2195 if (!spec->wait_scp) { in dspio_send_scp_message()
2197 memcpy(&ret_msg->hdr, &spec->scp_resp_header, 4); in dspio_send_scp_message()
2198 memcpy(&ret_msg->data, spec->scp_resp_data, in dspio_send_scp_message()
2199 spec->wait_num_data); in dspio_send_scp_message()
2200 *bytes_returned = (spec->scp_resp_count + 1) * 4; in dspio_send_scp_message()
2201 status = 0; in dspio_send_scp_message()
2203 status = -EIO; in dspio_send_scp_message()
2205 spec->wait_scp = 0; in dspio_send_scp_message()
2213 * @codec: the HDA codec
2225 static int dspio_scp(struct hda_codec *codec, in dspio_scp() argument
2229 int status = 0; in dspio_scp()
2235 memset(&scp_send, 0, sizeof(scp_send)); in dspio_scp()
2236 memset(&scp_reply, 0, sizeof(scp_reply)); in dspio_scp()
2238 if ((len != 0 && data == NULL) || (len > SCP_MAX_DATA_WORDS)) in dspio_scp()
2239 return -EINVAL; in dspio_scp()
2242 codec_dbg(codec, "dspio_scp get but has no buffer\n"); in dspio_scp()
2243 return -EINVAL; in dspio_scp()
2246 if (reply != NULL && (reply_len == NULL || (*reply_len == 0))) { in dspio_scp()
2247 codec_dbg(codec, "dspio_scp bad resp buf len parms\n"); in dspio_scp()
2248 return -EINVAL; in dspio_scp()
2252 0, 0, 0, len/sizeof(unsigned int)); in dspio_scp()
2253 if (data != NULL && len > 0) { in dspio_scp()
2258 ret_bytes = 0; in dspio_scp()
2260 status = dspio_send_scp_message(codec, (unsigned char *)&scp_send, in dspio_scp()
2264 if (status < 0) { in dspio_scp()
2265 codec_dbg(codec, "dspio_scp: send scp msg failed\n"); in dspio_scp()
2277 return 0; in dspio_scp()
2280 ret_size = (ret_bytes - sizeof(scp_reply.hdr)) in dspio_scp()
2284 codec_dbg(codec, "reply too long for buf\n"); in dspio_scp()
2285 return -EINVAL; in dspio_scp()
2287 codec_dbg(codec, "RetLen and HdrLen .NE.\n"); in dspio_scp()
2288 return -EINVAL; in dspio_scp()
2290 codec_dbg(codec, "NULL reply\n"); in dspio_scp()
2291 return -EINVAL; in dspio_scp()
2297 codec_dbg(codec, "reply ill-formed or errflag set\n"); in dspio_scp()
2298 return -EIO; in dspio_scp()
2307 static int dspio_set_param(struct hda_codec *codec, int mod_id, in dspio_set_param() argument
2310 return dspio_scp(codec, mod_id, src_id, req, SCP_SET, data, len, NULL, in dspio_set_param()
2314 static int dspio_set_uint_param(struct hda_codec *codec, int mod_id, in dspio_set_uint_param() argument
2317 return dspio_set_param(codec, mod_id, 0x20, req, &data, in dspio_set_uint_param()
2321 static int dspio_set_uint_param_no_source(struct hda_codec *codec, int mod_id, in dspio_set_uint_param_no_source() argument
2324 return dspio_set_param(codec, mod_id, 0x00, req, &data, in dspio_set_uint_param_no_source()
2331 static int dspio_alloc_dma_chan(struct hda_codec *codec, unsigned int *dma_chan) in dspio_alloc_dma_chan() argument
2333 int status = 0; in dspio_alloc_dma_chan()
2336 codec_dbg(codec, " dspio_alloc_dma_chan() -- begin\n"); in dspio_alloc_dma_chan()
2337 status = dspio_scp(codec, MASTERCONTROL, 0x20, in dspio_alloc_dma_chan()
2338 MASTERCONTROL_ALLOC_DMA_CHAN, SCP_GET, NULL, 0, in dspio_alloc_dma_chan()
2341 if (status < 0) { in dspio_alloc_dma_chan()
2342 codec_dbg(codec, "dspio_alloc_dma_chan: SCP Failed\n"); in dspio_alloc_dma_chan()
2346 if ((*dma_chan + 1) == 0) { in dspio_alloc_dma_chan()
2347 codec_dbg(codec, "no free dma channels to allocate\n"); in dspio_alloc_dma_chan()
2348 return -EBUSY; in dspio_alloc_dma_chan()
2351 codec_dbg(codec, "dspio_alloc_dma_chan: chan=%d\n", *dma_chan); in dspio_alloc_dma_chan()
2352 codec_dbg(codec, " dspio_alloc_dma_chan() -- complete\n"); in dspio_alloc_dma_chan()
2360 static int dspio_free_dma_chan(struct hda_codec *codec, unsigned int dma_chan) in dspio_free_dma_chan() argument
2362 int status = 0; in dspio_free_dma_chan()
2363 unsigned int dummy = 0; in dspio_free_dma_chan()
2365 codec_dbg(codec, " dspio_free_dma_chan() -- begin\n"); in dspio_free_dma_chan()
2366 codec_dbg(codec, "dspio_free_dma_chan: chan=%d\n", dma_chan); in dspio_free_dma_chan()
2368 status = dspio_scp(codec, MASTERCONTROL, 0x20, in dspio_free_dma_chan()
2372 if (status < 0) { in dspio_free_dma_chan()
2373 codec_dbg(codec, "dspio_free_dma_chan: SCP Failed\n"); in dspio_free_dma_chan()
2377 codec_dbg(codec, " dspio_free_dma_chan() -- complete\n"); in dspio_free_dma_chan()
2385 static int dsp_set_run_state(struct hda_codec *codec) in dsp_set_run_state() argument
2391 err = chipio_read(codec, DSP_DBGCNTL_INST_OFFSET, &dbg_ctrl_reg); in dsp_set_run_state()
2392 if (err < 0) in dsp_set_run_state()
2398 if (halt_state != 0) { in dsp_set_run_state()
2401 err = chipio_write(codec, DSP_DBGCNTL_INST_OFFSET, in dsp_set_run_state()
2403 if (err < 0) in dsp_set_run_state()
2408 err = chipio_write(codec, DSP_DBGCNTL_INST_OFFSET, in dsp_set_run_state()
2410 if (err < 0) in dsp_set_run_state()
2414 return 0; in dsp_set_run_state()
2420 static int dsp_reset(struct hda_codec *codec) in dsp_reset() argument
2425 codec_dbg(codec, "dsp_reset\n"); in dsp_reset()
2427 res = dspio_send(codec, VENDOR_DSPIO_DSP_INIT, 0); in dsp_reset()
2428 retry--; in dsp_reset()
2429 } while (res == -EIO && retry); in dsp_reset()
2432 codec_dbg(codec, "dsp_reset timeout\n"); in dsp_reset()
2433 return -EIO; in dsp_reset()
2436 return 0; in dsp_reset()
2463 static bool dsp_is_dma_active(struct hda_codec *codec, unsigned int dma_chan) in dsp_is_dma_active() argument
2467 chipio_read(codec, DSPDMAC_CHNLSTART_INST_OFFSET, &dma_chnlstart_reg); in dsp_is_dma_active()
2470 (DSPDMAC_CHNLSTART_EN_LOBIT + dma_chan))) != 0); in dsp_is_dma_active()
2473 static int dsp_dma_setup_common(struct hda_codec *codec, in dsp_dma_setup_common() argument
2479 int status = 0; in dsp_dma_setup_common()
2485 codec_dbg(codec, "-- dsp_dma_setup_common() -- Begin ---------\n"); in dsp_dma_setup_common()
2488 codec_dbg(codec, "dma chan num invalid\n"); in dsp_dma_setup_common()
2489 return -EINVAL; in dsp_dma_setup_common()
2492 if (dsp_is_dma_active(codec, dma_chan)) { in dsp_dma_setup_common()
2493 codec_dbg(codec, "dma already active\n"); in dsp_dma_setup_common()
2494 return -EBUSY; in dsp_dma_setup_common()
2500 codec_dbg(codec, "invalid chip addr\n"); in dsp_dma_setup_common()
2501 return -ENXIO; in dsp_dma_setup_common()
2505 active = 0; in dsp_dma_setup_common()
2507 codec_dbg(codec, " dsp_dma_setup_common() start reg pgm\n"); in dsp_dma_setup_common()
2510 status = chipio_read(codec, DSPDMAC_CHNLPROP_INST_OFFSET, in dsp_dma_setup_common()
2513 if (status < 0) { in dsp_dma_setup_common()
2514 codec_dbg(codec, "read CHNLPROP Reg fail\n"); in dsp_dma_setup_common()
2517 codec_dbg(codec, "dsp_dma_setup_common() Read CHNLPROP\n"); in dsp_dma_setup_common()
2527 status = chipio_write(codec, DSPDMAC_CHNLPROP_INST_OFFSET, chnl_prop); in dsp_dma_setup_common()
2528 if (status < 0) { in dsp_dma_setup_common()
2529 codec_dbg(codec, "write CHNLPROP Reg fail\n"); in dsp_dma_setup_common()
2532 codec_dbg(codec, " dsp_dma_setup_common() Write CHNLPROP\n"); in dsp_dma_setup_common()
2535 status = chipio_read(codec, DSPDMAC_ACTIVE_INST_OFFSET, in dsp_dma_setup_common()
2538 if (status < 0) { in dsp_dma_setup_common()
2539 codec_dbg(codec, "read ACTIVE Reg fail\n"); in dsp_dma_setup_common()
2542 codec_dbg(codec, "dsp_dma_setup_common() Read ACTIVE\n"); in dsp_dma_setup_common()
2548 status = chipio_write(codec, DSPDMAC_ACTIVE_INST_OFFSET, active); in dsp_dma_setup_common()
2549 if (status < 0) { in dsp_dma_setup_common()
2550 codec_dbg(codec, "write ACTIVE Reg fail\n"); in dsp_dma_setup_common()
2554 codec_dbg(codec, " dsp_dma_setup_common() Write ACTIVE\n"); in dsp_dma_setup_common()
2556 status = chipio_write(codec, DSPDMAC_AUDCHSEL_INST_OFFSET(dma_chan), in dsp_dma_setup_common()
2558 if (status < 0) { in dsp_dma_setup_common()
2559 codec_dbg(codec, "write AUDCHSEL Reg fail\n"); in dsp_dma_setup_common()
2562 codec_dbg(codec, " dsp_dma_setup_common() Write AUDCHSEL\n"); in dsp_dma_setup_common()
2564 status = chipio_write(codec, DSPDMAC_IRQCNT_INST_OFFSET(dma_chan), in dsp_dma_setup_common()
2566 if (status < 0) { in dsp_dma_setup_common()
2567 codec_dbg(codec, "write IRQCNT Reg fail\n"); in dsp_dma_setup_common()
2570 codec_dbg(codec, " dsp_dma_setup_common() Write IRQCNT\n"); in dsp_dma_setup_common()
2572 codec_dbg(codec, in dsp_dma_setup_common()
2573 "ChipA=0x%x,DspA=0x%x,dmaCh=%u, " in dsp_dma_setup_common()
2574 "CHSEL=0x%x,CHPROP=0x%x,Active=0x%x\n", in dsp_dma_setup_common()
2578 codec_dbg(codec, "-- dsp_dma_setup_common() -- Complete ------\n"); in dsp_dma_setup_common()
2580 return 0; in dsp_dma_setup_common()
2584 * Setup the DSP DMA per-transfer-specific registers
2586 static int dsp_dma_setup(struct hda_codec *codec, in dsp_dma_setup() argument
2591 int status = 0; in dsp_dma_setup()
2598 unsigned int dma_cfg = 0; in dsp_dma_setup()
2599 unsigned int adr_ofs = 0; in dsp_dma_setup()
2600 unsigned int xfr_cnt = 0; in dsp_dma_setup()
2601 const unsigned int max_dma_count = 1 << (DSPDMAC_XFRCNT_BCNT_HIBIT - in dsp_dma_setup()
2604 codec_dbg(codec, "-- dsp_dma_setup() -- Begin ---------\n"); in dsp_dma_setup()
2607 codec_dbg(codec, "count too big\n"); in dsp_dma_setup()
2608 return -EINVAL; in dsp_dma_setup()
2613 codec_dbg(codec, "invalid chip addr\n"); in dsp_dma_setup()
2614 return -ENXIO; in dsp_dma_setup()
2617 codec_dbg(codec, " dsp_dma_setup() start reg pgm\n"); in dsp_dma_setup()
2620 incr_field = 0; in dsp_dma_setup()
2631 status = chipio_write(codec, DSPDMAC_DMACFG_INST_OFFSET(dma_chan), in dsp_dma_setup()
2633 if (status < 0) { in dsp_dma_setup()
2634 codec_dbg(codec, "write DMACFG Reg fail\n"); in dsp_dma_setup()
2637 codec_dbg(codec, " dsp_dma_setup() Write DMACFG\n"); in dsp_dma_setup()
2639 adr_ofs = (count - 1) << (DSPDMAC_DSPADROFS_BOFS_LOBIT + in dsp_dma_setup()
2640 (code ? 0 : 1)); in dsp_dma_setup()
2642 status = chipio_write(codec, DSPDMAC_DSPADROFS_INST_OFFSET(dma_chan), in dsp_dma_setup()
2644 if (status < 0) { in dsp_dma_setup()
2645 codec_dbg(codec, "write DSPADROFS Reg fail\n"); in dsp_dma_setup()
2648 codec_dbg(codec, " dsp_dma_setup() Write DSPADROFS\n"); in dsp_dma_setup()
2650 base_cnt = (count - 1) << DSPDMAC_XFRCNT_BCNT_LOBIT; in dsp_dma_setup()
2652 cur_cnt = (count - 1) << DSPDMAC_XFRCNT_CCNT_LOBIT; in dsp_dma_setup()
2656 status = chipio_write(codec, in dsp_dma_setup()
2658 if (status < 0) { in dsp_dma_setup()
2659 codec_dbg(codec, "write XFRCNT Reg fail\n"); in dsp_dma_setup()
2662 codec_dbg(codec, " dsp_dma_setup() Write XFRCNT\n"); in dsp_dma_setup()
2664 codec_dbg(codec, in dsp_dma_setup()
2665 "ChipA=0x%x, cnt=0x%x, DMACFG=0x%x, " in dsp_dma_setup()
2666 "ADROFS=0x%x, XFRCNT=0x%x\n", in dsp_dma_setup()
2669 codec_dbg(codec, "-- dsp_dma_setup() -- Complete ---------\n"); in dsp_dma_setup()
2671 return 0; in dsp_dma_setup()
2677 static int dsp_dma_start(struct hda_codec *codec, in dsp_dma_start() argument
2680 unsigned int reg = 0; in dsp_dma_start()
2681 int status = 0; in dsp_dma_start()
2683 codec_dbg(codec, "-- dsp_dma_start() -- Begin ---------\n"); in dsp_dma_start()
2686 status = chipio_read(codec, in dsp_dma_start()
2689 if (status < 0) { in dsp_dma_start()
2690 codec_dbg(codec, "read CHNLSTART reg fail\n"); in dsp_dma_start()
2693 codec_dbg(codec, "-- dsp_dma_start() Read CHNLSTART\n"); in dsp_dma_start()
2699 status = chipio_write(codec, DSPDMAC_CHNLSTART_INST_OFFSET, in dsp_dma_start()
2701 if (status < 0) { in dsp_dma_start()
2702 codec_dbg(codec, "write CHNLSTART reg fail\n"); in dsp_dma_start()
2705 codec_dbg(codec, "-- dsp_dma_start() -- Complete ---------\n"); in dsp_dma_start()
2713 static int dsp_dma_stop(struct hda_codec *codec, in dsp_dma_stop() argument
2716 unsigned int reg = 0; in dsp_dma_stop()
2717 int status = 0; in dsp_dma_stop()
2719 codec_dbg(codec, "-- dsp_dma_stop() -- Begin ---------\n"); in dsp_dma_stop()
2722 status = chipio_read(codec, in dsp_dma_stop()
2725 if (status < 0) { in dsp_dma_stop()
2726 codec_dbg(codec, "read CHNLSTART reg fail\n"); in dsp_dma_stop()
2729 codec_dbg(codec, "-- dsp_dma_stop() Read CHNLSTART\n"); in dsp_dma_stop()
2734 status = chipio_write(codec, DSPDMAC_CHNLSTART_INST_OFFSET, in dsp_dma_stop()
2736 if (status < 0) { in dsp_dma_stop()
2737 codec_dbg(codec, "write CHNLSTART reg fail\n"); in dsp_dma_stop()
2740 codec_dbg(codec, "-- dsp_dma_stop() -- Complete ---------\n"); in dsp_dma_stop()
2748 * @codec: the HDA codec
2756 static int dsp_allocate_router_ports(struct hda_codec *codec, in dsp_allocate_router_ports() argument
2762 int status = 0; in dsp_allocate_router_ports()
2766 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in dsp_allocate_router_ports()
2767 if (status < 0) in dsp_allocate_router_ports()
2771 val |= (ports_per_channel - 1) << 4; in dsp_allocate_router_ports()
2772 val |= num_chans - 1; in dsp_allocate_router_ports()
2774 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in dsp_allocate_router_ports()
2778 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in dsp_allocate_router_ports()
2782 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in dsp_allocate_router_ports()
2783 if (status < 0) in dsp_allocate_router_ports()
2786 res = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0, in dsp_allocate_router_ports()
2787 VENDOR_CHIPIO_PORT_ALLOC_GET, 0); in dsp_allocate_router_ports()
2791 return (res < 0) ? res : 0; in dsp_allocate_router_ports()
2797 static int dsp_free_router_ports(struct hda_codec *codec) in dsp_free_router_ports() argument
2799 int status = 0; in dsp_free_router_ports()
2801 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in dsp_free_router_ports()
2802 if (status < 0) in dsp_free_router_ports()
2805 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in dsp_free_router_ports()
2809 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in dsp_free_router_ports()
2817 static int dsp_allocate_ports(struct hda_codec *codec, in dsp_allocate_ports() argument
2823 codec_dbg(codec, " dsp_allocate_ports() -- begin\n"); in dsp_allocate_ports()
2826 codec_dbg(codec, "bad rate multiple\n"); in dsp_allocate_ports()
2827 return -EINVAL; in dsp_allocate_ports()
2830 status = dsp_allocate_router_ports(codec, num_chans, in dsp_allocate_ports()
2831 rate_multi, 0, port_map); in dsp_allocate_ports()
2833 codec_dbg(codec, " dsp_allocate_ports() -- complete\n"); in dsp_allocate_ports()
2838 static int dsp_allocate_ports_format(struct hda_codec *codec, in dsp_allocate_ports_format() argument
2845 unsigned int sample_rate_div = ((get_hdafmt_rate(fmt) >> 0) & 3) + 1; in dsp_allocate_ports_format()
2850 codec_dbg(codec, "bad rate multiple\n"); in dsp_allocate_ports_format()
2851 return -EINVAL; in dsp_allocate_ports_format()
2856 status = dsp_allocate_ports(codec, num_chans, rate_multi, port_map); in dsp_allocate_ports_format()
2864 static int dsp_free_ports(struct hda_codec *codec) in dsp_free_ports() argument
2868 codec_dbg(codec, " dsp_free_ports() -- begin\n"); in dsp_free_ports()
2870 status = dsp_free_router_ports(codec); in dsp_free_ports()
2871 if (status < 0) { in dsp_free_ports()
2872 codec_dbg(codec, "free router ports fail\n"); in dsp_free_ports()
2875 codec_dbg(codec, " dsp_free_ports() -- complete\n"); in dsp_free_ports()
2884 struct hda_codec *codec; member
2892 DMA_STATE_STOP = 0,
2896 static int dma_convert_to_hda_format(struct hda_codec *codec, in dma_convert_to_hda_format() argument
2904 channels, SNDRV_PCM_FORMAT_S32_LE, 32, 0); in dma_convert_to_hda_format()
2909 return 0; in dma_convert_to_hda_format()
2917 struct hda_codec *codec = dma->codec; in dma_reset() local
2918 struct ca0132_spec *spec = codec->spec; in dma_reset()
2921 if (dma->dmab->area) in dma_reset()
2922 snd_hda_codec_load_dsp_cleanup(codec, dma->dmab); in dma_reset()
2924 status = snd_hda_codec_load_dsp_prepare(codec, in dma_reset()
2925 dma->m_converter_format, in dma_reset()
2926 dma->buf_size, in dma_reset()
2927 dma->dmab); in dma_reset()
2928 if (status < 0) in dma_reset()
2930 spec->dsp_stream_id = status; in dma_reset()
2931 return 0; in dma_reset()
2946 return 0; in dma_set_state()
2949 snd_hda_codec_load_dsp_trigger(dma->codec, cmd); in dma_set_state()
2950 return 0; in dma_set_state()
2955 return dma->dmab->bytes; in dma_get_buffer_size()
2960 return dma->dmab->area; in dma_get_buffer_addr()
2967 memcpy(dma->dmab->area, data, count); in dma_xfer()
2968 return 0; in dma_xfer()
2976 *format = dma->m_converter_format; in dma_get_converter_format()
2981 struct ca0132_spec *spec = dma->codec->spec; in dma_get_stream_id()
2983 return spec->dsp_stream_id; in dma_get_stream_id()
2993 static const u32 g_magic_value = 0x4c46584d;
2994 static const u32 g_chip_addr_magic_value = 0xFFFFFF01;
2998 return p->magic == g_magic_value; in is_valid()
3003 return g_chip_addr_magic_value == p->chip_addr; in is_hci_prog_list_seg()
3008 return p->count == 0; in is_last()
3013 return struct_size(p, data, p->count); in dsp_sizeof()
3025 #define INVALID_DMA_CHANNEL (~0U)
3032 static int dspxfr_hci_write(struct hda_codec *codec, in dspxfr_hci_write() argument
3039 if (fls == NULL || fls->chip_addr != g_chip_addr_magic_value) { in dspxfr_hci_write()
3040 codec_dbg(codec, "hci_write invalid params\n"); in dspxfr_hci_write()
3041 return -EINVAL; in dspxfr_hci_write()
3044 count = fls->count; in dspxfr_hci_write()
3045 data = (u32 *)(fls->data); in dspxfr_hci_write()
3047 status = chipio_write(codec, data[0], data[1]); in dspxfr_hci_write()
3048 if (status < 0) { in dspxfr_hci_write()
3049 codec_dbg(codec, "hci_write chipio failed\n"); in dspxfr_hci_write()
3052 count -= 2; in dspxfr_hci_write()
3055 return 0; in dspxfr_hci_write()
3059 * Write a block of data into DSP code or data RAM using pre-allocated
3062 * @codec: the HDA codec
3064 * @reloc: Relocation address for loading single-segment overlays, or 0 for
3073 static int dspxfr_one_seg(struct hda_codec *codec, in dspxfr_one_seg() argument
3081 int status = 0; in dspxfr_one_seg()
3102 return -EINVAL; in dspxfr_one_seg()
3109 codec_dbg(codec, "hci_write\n"); in dspxfr_one_seg()
3110 return dspxfr_hci_write(codec, hci_write); in dspxfr_one_seg()
3113 if (fls == NULL || dma_engine == NULL || port_map_mask == 0) { in dspxfr_one_seg()
3114 codec_dbg(codec, "Invalid Params\n"); in dspxfr_one_seg()
3115 return -EINVAL; in dspxfr_one_seg()
3118 data = fls->data; in dspxfr_one_seg()
3119 chip_addx = fls->chip_addr; in dspxfr_one_seg()
3120 words_to_write = fls->count; in dspxfr_one_seg()
3123 return hci_write ? dspxfr_hci_write(codec, hci_write) : 0; in dspxfr_one_seg()
3125 chip_addx = (chip_addx & (0xFFFF0000 << 2)) + (reloc << 2); in dspxfr_one_seg()
3130 codec_dbg(codec, "Invalid chip_addx Params\n"); in dspxfr_one_seg()
3131 return -EINVAL; in dspxfr_one_seg()
3140 codec_dbg(codec, "dma_engine buffer NULL\n"); in dspxfr_one_seg()
3141 return -EINVAL; in dspxfr_one_seg()
3145 sample_rate_div = ((get_hdafmt_rate(hda_format) >> 0) & 3) + 1; in dspxfr_one_seg()
3149 hda_frame_size_words = ((sample_rate_div == 0) ? 0 : in dspxfr_one_seg()
3152 if (hda_frame_size_words == 0) { in dspxfr_one_seg()
3153 codec_dbg(codec, "frmsz zero\n"); in dspxfr_one_seg()
3154 return -EINVAL; in dspxfr_one_seg()
3160 buffer_size_words -= buffer_size_words % hda_frame_size_words; in dspxfr_one_seg()
3161 codec_dbg(codec, in dspxfr_one_seg()
3162 "chpadr=0x%08x frmsz=%u nchan=%u " in dspxfr_one_seg()
3168 codec_dbg(codec, "dspxfr_one_seg:failed\n"); in dspxfr_one_seg()
3169 return -EINVAL; in dspxfr_one_seg()
3178 words_to_write -= remainder_words; in dspxfr_one_seg()
3180 while (words_to_write != 0) { in dspxfr_one_seg()
3182 codec_dbg(codec, "dspxfr (seg loop)cnt=%u rs=%u remainder=%u\n", in dspxfr_one_seg()
3186 status = dsp_dma_stop(codec, dma_chan, ovly); in dspxfr_one_seg()
3187 if (status < 0) in dspxfr_one_seg()
3189 status = dsp_dma_setup_common(codec, chip_addx, in dspxfr_one_seg()
3191 if (status < 0) in dspxfr_one_seg()
3196 status = dsp_dma_setup(codec, chip_addx, in dspxfr_one_seg()
3198 if (status < 0) in dspxfr_one_seg()
3200 status = dsp_dma_start(codec, dma_chan, ovly); in dspxfr_one_seg()
3201 if (status < 0) in dspxfr_one_seg()
3203 if (!dsp_is_dma_active(codec, dma_chan)) { in dspxfr_one_seg()
3204 codec_dbg(codec, "dspxfr:DMA did not start\n"); in dspxfr_one_seg()
3205 return -EIO; in dspxfr_one_seg()
3208 if (status < 0) in dspxfr_one_seg()
3210 if (remainder_words != 0) { in dspxfr_one_seg()
3211 status = chipio_write_multiple(codec, in dspxfr_one_seg()
3215 if (status < 0) in dspxfr_one_seg()
3217 remainder_words = 0; in dspxfr_one_seg()
3220 status = dspxfr_hci_write(codec, hci_write); in dspxfr_one_seg()
3221 if (status < 0) in dspxfr_one_seg()
3228 dma_active = dsp_is_dma_active(codec, dma_chan); in dspxfr_one_seg()
3236 codec_dbg(codec, "+++++ DMA complete\n"); in dspxfr_one_seg()
3240 if (status < 0) in dspxfr_one_seg()
3245 words_to_write -= run_size_words; in dspxfr_one_seg()
3248 if (remainder_words != 0) { in dspxfr_one_seg()
3249 status = chipio_write_multiple(codec, chip_addx_remainder, in dspxfr_one_seg()
3259 * @codec: the HDA codec
3261 * @reloc: Relocation address for loading single-segment overlays, or 0 for
3269 static int dspxfr_image(struct hda_codec *codec, in dspxfr_image() argument
3276 struct ca0132_spec *spec = codec->spec; in dspxfr_image()
3278 unsigned short hda_format = 0; in dspxfr_image()
3280 unsigned char stream_id = 0; in dspxfr_image()
3286 return -EINVAL; in dspxfr_image()
3290 return -ENOMEM; in dspxfr_image()
3292 dma_engine->dmab = kzalloc(sizeof(*dma_engine->dmab), GFP_KERNEL); in dspxfr_image()
3293 if (!dma_engine->dmab) { in dspxfr_image()
3295 return -ENOMEM; in dspxfr_image()
3298 dma_engine->codec = codec; in dspxfr_image()
3299 dma_convert_to_hda_format(codec, sample_rate, channels, &hda_format); in dspxfr_image()
3300 dma_engine->m_converter_format = hda_format; in dspxfr_image()
3301 dma_engine->buf_size = (ovly ? DSP_DMA_WRITE_BUFLEN_OVLY : in dspxfr_image()
3304 dma_chan = ovly ? INVALID_DMA_CHANNEL : 0; in dspxfr_image()
3306 status = codec_set_converter_format(codec, WIDGET_CHIP_CTRL, in dspxfr_image()
3309 if (status < 0) { in dspxfr_image()
3310 codec_dbg(codec, "set converter format fail\n"); in dspxfr_image()
3314 status = snd_hda_codec_load_dsp_prepare(codec, in dspxfr_image()
3315 dma_engine->m_converter_format, in dspxfr_image()
3316 dma_engine->buf_size, in dspxfr_image()
3317 dma_engine->dmab); in dspxfr_image()
3318 if (status < 0) in dspxfr_image()
3320 spec->dsp_stream_id = status; in dspxfr_image()
3323 status = dspio_alloc_dma_chan(codec, &dma_chan); in dspxfr_image()
3324 if (status < 0) { in dspxfr_image()
3325 codec_dbg(codec, "alloc dmachan fail\n"); in dspxfr_image()
3331 port_map_mask = 0; in dspxfr_image()
3332 status = dsp_allocate_ports_format(codec, hda_format, in dspxfr_image()
3334 if (status < 0) { in dspxfr_image()
3335 codec_dbg(codec, "alloc ports fail\n"); in dspxfr_image()
3340 status = codec_set_converter_stream_channel(codec, in dspxfr_image()
3341 WIDGET_CHIP_CTRL, stream_id, 0, &response); in dspxfr_image()
3342 if (status < 0) { in dspxfr_image()
3343 codec_dbg(codec, "set stream chan fail\n"); in dspxfr_image()
3349 codec_dbg(codec, "FLS check fail\n"); in dspxfr_image()
3350 status = -EINVAL; in dspxfr_image()
3353 status = dspxfr_one_seg(codec, fls_data, reloc, in dspxfr_image()
3356 if (status < 0) in dspxfr_image()
3366 if (port_map_mask != 0) in dspxfr_image()
3367 status = dsp_free_ports(codec); in dspxfr_image()
3369 if (status < 0) in dspxfr_image()
3372 status = codec_set_converter_stream_channel(codec, in dspxfr_image()
3373 WIDGET_CHIP_CTRL, 0, 0, &response); in dspxfr_image()
3377 dspio_free_dma_chan(codec, dma_chan); in dspxfr_image()
3379 if (dma_engine->dmab->area) in dspxfr_image()
3380 snd_hda_codec_load_dsp_cleanup(codec, dma_engine->dmab); in dspxfr_image()
3381 kfree(dma_engine->dmab); in dspxfr_image()
3390 static void dspload_post_setup(struct hda_codec *codec) in dspload_post_setup() argument
3392 struct ca0132_spec *spec = codec->spec; in dspload_post_setup()
3393 codec_dbg(codec, "---- dspload_post_setup ------\n"); in dspload_post_setup()
3396 chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x18), 0x08080080); in dspload_post_setup()
3397 chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x19), 0x3f800000); in dspload_post_setup()
3400 chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x29), 0x00000002); in dspload_post_setup()
3405 * dspload_image - Download DSP from a DSP Image Fast Load structure.
3407 * @codec: the HDA codec
3410 * @reloc: Relocation address for loading single-segment overlays, or 0 for
3413 * @router_chans: number of audio router channels to be allocated (0 means use
3417 * linear, non-constant sized element array of structures, each of which
3422 static int dspload_image(struct hda_codec *codec, in dspload_image() argument
3429 int status = 0; in dspload_image()
3433 codec_dbg(codec, "---- dspload_image begin ------\n"); in dspload_image()
3434 if (router_chans == 0) { in dspload_image()
3450 codec_dbg(codec, "Ready to program DMA\n"); in dspload_image()
3452 status = dsp_reset(codec); in dspload_image()
3454 if (status < 0) in dspload_image()
3457 codec_dbg(codec, "dsp_reset() complete\n"); in dspload_image()
3458 status = dspxfr_image(codec, fls, reloc, sample_rate, channels, in dspload_image()
3461 if (status < 0) in dspload_image()
3464 codec_dbg(codec, "dspxfr_image() complete\n"); in dspload_image()
3466 dspload_post_setup(codec); in dspload_image()
3467 status = dsp_set_run_state(codec); in dspload_image()
3470 codec_dbg(codec, "LOAD FINISHED\n"); in dspload_image()
3471 } while (0); in dspload_image()
3477 static bool dspload_is_loaded(struct hda_codec *codec) in dspload_is_loaded() argument
3479 unsigned int data = 0; in dspload_is_loaded()
3480 int status = 0; in dspload_is_loaded()
3482 status = chipio_read(codec, 0x40004, &data); in dspload_is_loaded()
3483 if ((status < 0) || (data != 1)) in dspload_is_loaded()
3489 #define dspload_is_loaded(codec) false argument
3492 static bool dspload_wait_loaded(struct hda_codec *codec) in dspload_wait_loaded() argument
3497 if (dspload_is_loaded(codec)) { in dspload_wait_loaded()
3498 codec_info(codec, "ca0132 DSP downloaded and running\n"); in dspload_wait_loaded()
3504 codec_err(codec, "ca0132 failed to download DSP\n"); in dspload_wait_loaded()
3509 * ca0113 related functions. The ca0113 acts as the HDA bus for the pci-e
3515 * For cards with PCI-E region2 (Sound Blaster Z/ZxR, Recon3D, and AE-5)
3516 * the mmio address 0x320 is used to set GPIO pins. The format for the data
3519 * AE-5 note: The AE-5 seems to use pins 2 and 3 to somehow set the color value
3520 * of the on-card LED. It seems to use pin 2 for data, then toggles 3 to on and
3523 static void ca0113_mmio_gpio_set(struct hda_codec *codec, unsigned int gpio_pin, in ca0113_mmio_gpio_set() argument
3526 struct ca0132_spec *spec = codec->spec; in ca0113_mmio_gpio_set()
3529 gpio_data = gpio_pin & 0xF; in ca0113_mmio_gpio_set()
3530 gpio_data |= ((enable << 8) & 0x100); in ca0113_mmio_gpio_set()
3532 writew(gpio_data, spec->mem_base + 0x320); in ca0113_mmio_gpio_set()
3536 * Special pci region2 commands that are only used by the AE-5. They follow
3541 * target-id, and value.
3543 static void ca0113_mmio_command_set(struct hda_codec *codec, unsigned int group, in ca0113_mmio_command_set() argument
3546 struct ca0132_spec *spec = codec->spec; in ca0113_mmio_command_set()
3549 writel(0x0000007e, spec->mem_base + 0x210); in ca0113_mmio_command_set()
3550 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3551 writel(0x0000005a, spec->mem_base + 0x210); in ca0113_mmio_command_set()
3552 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3553 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3555 writel(0x00800005, spec->mem_base + 0x20c); in ca0113_mmio_command_set()
3556 writel(group, spec->mem_base + 0x804); in ca0113_mmio_command_set()
3558 writel(0x00800005, spec->mem_base + 0x20c); in ca0113_mmio_command_set()
3559 write_val = (target & 0xff); in ca0113_mmio_command_set()
3563 writel(write_val, spec->mem_base + 0x204); in ca0113_mmio_command_set()
3569 readl(spec->mem_base + 0x860); in ca0113_mmio_command_set()
3570 readl(spec->mem_base + 0x854); in ca0113_mmio_command_set()
3571 readl(spec->mem_base + 0x840); in ca0113_mmio_command_set()
3573 writel(0x00800004, spec->mem_base + 0x20c); in ca0113_mmio_command_set()
3574 writel(0x00000000, spec->mem_base + 0x210); in ca0113_mmio_command_set()
3575 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3576 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3582 static void ca0113_mmio_command_set_type2(struct hda_codec *codec, in ca0113_mmio_command_set_type2() argument
3585 struct ca0132_spec *spec = codec->spec; in ca0113_mmio_command_set_type2()
3588 writel(0x0000007e, spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3589 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3590 writel(0x0000005a, spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3591 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3592 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3594 writel(0x00800003, spec->mem_base + 0x20c); in ca0113_mmio_command_set_type2()
3595 writel(group, spec->mem_base + 0x804); in ca0113_mmio_command_set_type2()
3597 writel(0x00800005, spec->mem_base + 0x20c); in ca0113_mmio_command_set_type2()
3598 write_val = (target & 0xff); in ca0113_mmio_command_set_type2()
3602 writel(write_val, spec->mem_base + 0x204); in ca0113_mmio_command_set_type2()
3604 readl(spec->mem_base + 0x860); in ca0113_mmio_command_set_type2()
3605 readl(spec->mem_base + 0x854); in ca0113_mmio_command_set_type2()
3606 readl(spec->mem_base + 0x840); in ca0113_mmio_command_set_type2()
3608 writel(0x00800004, spec->mem_base + 0x20c); in ca0113_mmio_command_set_type2()
3609 writel(0x00000000, spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3610 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3611 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3622 static void ca0132_gpio_init(struct hda_codec *codec) in ca0132_gpio_init() argument
3624 struct ca0132_spec *spec = codec->spec; in ca0132_gpio_init()
3630 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in ca0132_gpio_init()
3631 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53); in ca0132_gpio_init()
3632 snd_hda_codec_write(codec, 0x01, 0, 0x790, 0x23); in ca0132_gpio_init()
3635 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in ca0132_gpio_init()
3636 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x5B); in ca0132_gpio_init()
3645 static void ca0132_gpio_setup(struct hda_codec *codec) in ca0132_gpio_setup() argument
3647 struct ca0132_spec *spec = codec->spec; in ca0132_gpio_setup()
3651 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3652 AC_VERB_SET_GPIO_DIRECTION, 0x07); in ca0132_gpio_setup()
3653 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3654 AC_VERB_SET_GPIO_MASK, 0x07); in ca0132_gpio_setup()
3655 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3656 AC_VERB_SET_GPIO_DATA, 0x04); in ca0132_gpio_setup()
3657 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3658 AC_VERB_SET_GPIO_DATA, 0x06); in ca0132_gpio_setup()
3661 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3662 AC_VERB_SET_GPIO_DIRECTION, 0x1E); in ca0132_gpio_setup()
3663 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3664 AC_VERB_SET_GPIO_MASK, 0x1F); in ca0132_gpio_setup()
3665 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3666 AC_VERB_SET_GPIO_DATA, 0x0C); in ca0132_gpio_setup()
3678 /* Bit 1 - Switch between front/rear mic. 0 = rear, 1 = front */
3680 /* Bit 2 - Switch between headphone/line out. 0 = Headphone, 1 = Line */
3695 /* Set GPIO bit 1 to 0 for rear mic */
3696 R3DI_REAR_MIC = 0,
3702 /* Set GPIO bit 2 to 0 for headphone */
3703 R3DI_HEADPHONE_OUT = 0,
3709 R3DI_DSP_DOWNLOADING = 0,
3715 static void r3di_gpio_mic_set(struct hda_codec *codec, in r3di_gpio_mic_set() argument
3721 cur_gpio = snd_hda_codec_read(codec, 0x01, 0, AC_VERB_GET_GPIO_DATA, 0); in r3di_gpio_mic_set()
3731 snd_hda_codec_write(codec, codec->core.afg, 0, in r3di_gpio_mic_set()
3735 static void r3di_gpio_dsp_status_set(struct hda_codec *codec, in r3di_gpio_dsp_status_set() argument
3741 cur_gpio = snd_hda_codec_read(codec, 0x01, 0, AC_VERB_GET_GPIO_DATA, 0); in r3di_gpio_dsp_status_set()
3746 snd_hda_codec_write(codec, codec->core.afg, 0, in r3di_gpio_dsp_status_set()
3750 /* Set DOWNLOADING bit to 0. */ in r3di_gpio_dsp_status_set()
3753 snd_hda_codec_write(codec, codec->core.afg, 0, in r3di_gpio_dsp_status_set()
3760 snd_hda_codec_write(codec, codec->core.afg, 0, in r3di_gpio_dsp_status_set()
3768 struct hda_codec *codec, in ca0132_playback_pcm_prepare() argument
3773 struct ca0132_spec *spec = codec->spec; in ca0132_playback_pcm_prepare()
3775 snd_hda_codec_setup_stream(codec, spec->dacs[0], stream_tag, 0, format); in ca0132_playback_pcm_prepare()
3777 return 0; in ca0132_playback_pcm_prepare()
3781 struct hda_codec *codec, in ca0132_playback_pcm_cleanup() argument
3784 struct ca0132_spec *spec = codec->spec; in ca0132_playback_pcm_cleanup()
3786 if (spec->dsp_state == DSP_DOWNLOADING) in ca0132_playback_pcm_cleanup()
3787 return 0; in ca0132_playback_pcm_cleanup()
3791 if (spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID]) in ca0132_playback_pcm_cleanup()
3794 snd_hda_codec_cleanup_stream(codec, spec->dacs[0]); in ca0132_playback_pcm_cleanup()
3796 return 0; in ca0132_playback_pcm_cleanup()
3800 struct hda_codec *codec, in ca0132_playback_pcm_delay() argument
3803 struct ca0132_spec *spec = codec->spec; in ca0132_playback_pcm_delay()
3805 struct snd_pcm_runtime *runtime = substream->runtime; in ca0132_playback_pcm_delay()
3807 if (spec->dsp_state != DSP_DOWNLOADED) in ca0132_playback_pcm_delay()
3808 return 0; in ca0132_playback_pcm_delay()
3811 if (spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID]) { in ca0132_playback_pcm_delay()
3812 if ((spec->effects_switch[SURROUND - EFFECT_START_NID]) || in ca0132_playback_pcm_delay()
3813 (spec->effects_switch[DIALOG_PLUS - EFFECT_START_NID])) in ca0132_playback_pcm_delay()
3818 if (spec->cur_out_type == SPEAKER_OUT) in ca0132_playback_pcm_delay()
3821 return (latency * runtime->rate) / 1000; in ca0132_playback_pcm_delay()
3828 struct hda_codec *codec, in ca0132_dig_playback_pcm_open() argument
3831 struct ca0132_spec *spec = codec->spec; in ca0132_dig_playback_pcm_open()
3832 return snd_hda_multi_out_dig_open(codec, &spec->multiout); in ca0132_dig_playback_pcm_open()
3836 struct hda_codec *codec, in ca0132_dig_playback_pcm_prepare() argument
3841 struct ca0132_spec *spec = codec->spec; in ca0132_dig_playback_pcm_prepare()
3842 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout, in ca0132_dig_playback_pcm_prepare()
3847 struct hda_codec *codec, in ca0132_dig_playback_pcm_cleanup() argument
3850 struct ca0132_spec *spec = codec->spec; in ca0132_dig_playback_pcm_cleanup()
3851 return snd_hda_multi_out_dig_cleanup(codec, &spec->multiout); in ca0132_dig_playback_pcm_cleanup()
3855 struct hda_codec *codec, in ca0132_dig_playback_pcm_close() argument
3858 struct ca0132_spec *spec = codec->spec; in ca0132_dig_playback_pcm_close()
3859 return snd_hda_multi_out_dig_close(codec, &spec->multiout); in ca0132_dig_playback_pcm_close()
3866 struct hda_codec *codec, in ca0132_capture_pcm_prepare() argument
3871 snd_hda_codec_setup_stream(codec, hinfo->nid, in ca0132_capture_pcm_prepare()
3872 stream_tag, 0, format); in ca0132_capture_pcm_prepare()
3874 return 0; in ca0132_capture_pcm_prepare()
3878 struct hda_codec *codec, in ca0132_capture_pcm_cleanup() argument
3881 struct ca0132_spec *spec = codec->spec; in ca0132_capture_pcm_cleanup()
3883 if (spec->dsp_state == DSP_DOWNLOADING) in ca0132_capture_pcm_cleanup()
3884 return 0; in ca0132_capture_pcm_cleanup()
3886 snd_hda_codec_cleanup_stream(codec, hinfo->nid); in ca0132_capture_pcm_cleanup()
3887 return 0; in ca0132_capture_pcm_cleanup()
3891 struct hda_codec *codec, in ca0132_capture_pcm_delay() argument
3894 struct ca0132_spec *spec = codec->spec; in ca0132_capture_pcm_delay()
3896 struct snd_pcm_runtime *runtime = substream->runtime; in ca0132_capture_pcm_delay()
3898 if (spec->dsp_state != DSP_DOWNLOADED) in ca0132_capture_pcm_delay()
3899 return 0; in ca0132_capture_pcm_delay()
3901 if (spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID]) in ca0132_capture_pcm_delay()
3904 return (latency * runtime->rate) / 1000; in ca0132_capture_pcm_delay()
3925 .private_value = HDA_COMPOSE_AMP_VAL(nid, channel, 0, dir) }
3943 .private_value = HDA_COMPOSE_AMP_VAL(nid, channel, 0, dir) }
3952 .private_value = HDA_COMPOSE_AMP_VAL(nid, channel, 0, dir) }
3968 * values -90 to 9. -90 is the lowest decibel value for both the ADC's and the
3972 0xC2B40000, 0xC2B20000, 0xC2B00000, 0xC2AE0000, 0xC2AC0000, 0xC2AA0000,
3973 0xC2A80000, 0xC2A60000, 0xC2A40000, 0xC2A20000, 0xC2A00000, 0xC29E0000,
3974 0xC29C0000, 0xC29A0000, 0xC2980000, 0xC2960000, 0xC2940000, 0xC2920000,
3975 0xC2900000, 0xC28E0000, 0xC28C0000, 0xC28A0000, 0xC2880000, 0xC2860000,
3976 0xC2840000, 0xC2820000, 0xC2800000, 0xC27C0000, 0xC2780000, 0xC2740000,
3977 0xC2700000, 0xC26C0000, 0xC2680000, 0xC2640000, 0xC2600000, 0xC25C0000,
3978 0xC2580000, 0xC2540000, 0xC2500000, 0xC24C0000, 0xC2480000, 0xC2440000,
3979 0xC2400000, 0xC23C0000, 0xC2380000, 0xC2340000, 0xC2300000, 0xC22C0000,
3980 0xC2280000, 0xC2240000, 0xC2200000, 0xC21C0000, 0xC2180000, 0xC2140000,
3981 0xC2100000, 0xC20C0000, 0xC2080000, 0xC2040000, 0xC2000000, 0xC1F80000,
3982 0xC1F00000, 0xC1E80000, 0xC1E00000, 0xC1D80000, 0xC1D00000, 0xC1C80000,
3983 0xC1C00000, 0xC1B80000, 0xC1B00000, 0xC1A80000, 0xC1A00000, 0xC1980000,
3984 0xC1900000, 0xC1880000, 0xC1800000, 0xC1700000, 0xC1600000, 0xC1500000,
3985 0xC1400000, 0xC1300000, 0xC1200000, 0xC1100000, 0xC1000000, 0xC0E00000,
3986 0xC0C00000, 0xC0A00000, 0xC0800000, 0xC0400000, 0xC0000000, 0xBF800000,
3987 0x00000000, 0x3F800000, 0x40000000, 0x40400000, 0x40800000, 0x40A00000,
3988 0x40C00000, 0x40E00000, 0x41000000, 0x41100000
3992 * This table counts from float 0 to 1 in increments of .01, which is
3996 0x00000000, 0x3C23D70A, 0x3CA3D70A, 0x3CF5C28F, 0x3D23D70A, 0x3D4CCCCD,
3997 0x3D75C28F, 0x3D8F5C29, 0x3DA3D70A, 0x3DB851EC, 0x3DCCCCCD, 0x3DE147AE,
3998 0x3DF5C28F, 0x3E051EB8, 0x3E0F5C29, 0x3E19999A, 0x3E23D70A, 0x3E2E147B,
3999 0x3E3851EC, 0x3E428F5C, 0x3E4CCCCD, 0x3E570A3D, 0x3E6147AE, 0x3E6B851F,
4000 0x3E75C28F, 0x3E800000, 0x3E851EB8, 0x3E8A3D71, 0x3E8F5C29, 0x3E947AE1,
4001 0x3E99999A, 0x3E9EB852, 0x3EA3D70A, 0x3EA8F5C3, 0x3EAE147B, 0x3EB33333,
4002 0x3EB851EC, 0x3EBD70A4, 0x3EC28F5C, 0x3EC7AE14, 0x3ECCCCCD, 0x3ED1EB85,
4003 0x3ED70A3D, 0x3EDC28F6, 0x3EE147AE, 0x3EE66666, 0x3EEB851F, 0x3EF0A3D7,
4004 0x3EF5C28F, 0x3EFAE148, 0x3F000000, 0x3F028F5C, 0x3F051EB8, 0x3F07AE14,
4005 0x3F0A3D71, 0x3F0CCCCD, 0x3F0F5C29, 0x3F11EB85, 0x3F147AE1, 0x3F170A3D,
4006 0x3F19999A, 0x3F1C28F6, 0x3F1EB852, 0x3F2147AE, 0x3F23D70A, 0x3F266666,
4007 0x3F28F5C3, 0x3F2B851F, 0x3F2E147B, 0x3F30A3D7, 0x3F333333, 0x3F35C28F,
4008 0x3F3851EC, 0x3F3AE148, 0x3F3D70A4, 0x3F400000, 0x3F428F5C, 0x3F451EB8,
4009 0x3F47AE14, 0x3F4A3D71, 0x3F4CCCCD, 0x3F4F5C29, 0x3F51EB85, 0x3F547AE1,
4010 0x3F570A3D, 0x3F59999A, 0x3F5C28F6, 0x3F5EB852, 0x3F6147AE, 0x3F63D70A,
4011 0x3F666666, 0x3F68F5C3, 0x3F6B851F, 0x3F6E147B, 0x3F70A3D7, 0x3F733333,
4012 0x3F75C28F, 0x3F7851EC, 0x3F7AE148, 0x3F7D70A4, 0x3F800000
4016 * This table counts from float 10 to 1000, which is the range of the x-bass
4020 0x41200000, 0x41A00000, 0x41F00000, 0x42200000, 0x42480000, 0x42700000,
4021 0x428C0000, 0x42A00000, 0x42B40000, 0x42C80000, 0x42DC0000, 0x42F00000,
4022 0x43020000, 0x430C0000, 0x43160000, 0x43200000, 0x432A0000, 0x43340000,
4023 0x433E0000, 0x43480000, 0x43520000, 0x435C0000, 0x43660000, 0x43700000,
4024 0x437A0000, 0x43820000, 0x43870000, 0x438C0000, 0x43910000, 0x43960000,
4025 0x439B0000, 0x43A00000, 0x43A50000, 0x43AA0000, 0x43AF0000, 0x43B40000,
4026 0x43B90000, 0x43BE0000, 0x43C30000, 0x43C80000, 0x43CD0000, 0x43D20000,
4027 0x43D70000, 0x43DC0000, 0x43E10000, 0x43E60000, 0x43EB0000, 0x43F00000,
4028 0x43F50000, 0x43FA0000, 0x43FF0000, 0x44020000, 0x44048000, 0x44070000,
4029 0x44098000, 0x440C0000, 0x440E8000, 0x44110000, 0x44138000, 0x44160000,
4030 0x44188000, 0x441B0000, 0x441D8000, 0x44200000, 0x44228000, 0x44250000,
4031 0x44278000, 0x442A0000, 0x442C8000, 0x442F0000, 0x44318000, 0x44340000,
4032 0x44368000, 0x44390000, 0x443B8000, 0x443E0000, 0x44408000, 0x44430000,
4033 0x44458000, 0x44480000, 0x444A8000, 0x444D0000, 0x444F8000, 0x44520000,
4034 0x44548000, 0x44570000, 0x44598000, 0x445C0000, 0x445E8000, 0x44610000,
4035 0x44638000, 0x44660000, 0x44688000, 0x446B0000, 0x446D8000, 0x44700000,
4036 0x44728000, 0x44750000, 0x44778000, 0x447A0000
4043 0x41A00000, 0x41A80000, 0x41B00000, 0x41B80000, 0x41C00000, 0x41C80000,
4044 0x41D00000, 0x41D80000, 0x41E00000, 0x41E80000, 0x41F00000, 0x41F80000,
4045 0x42000000, 0x42040000, 0x42080000, 0x420C0000, 0x42100000, 0x42140000,
4046 0x42180000, 0x421C0000, 0x42200000, 0x42240000, 0x42280000, 0x422C0000,
4047 0x42300000, 0x42340000, 0x42380000, 0x423C0000, 0x42400000, 0x42440000,
4048 0x42480000, 0x424C0000, 0x42500000, 0x42540000, 0x42580000, 0x425C0000,
4049 0x42600000, 0x42640000, 0x42680000, 0x426C0000, 0x42700000, 0x42740000,
4050 0x42780000, 0x427C0000, 0x42800000, 0x42820000, 0x42840000, 0x42860000,
4051 0x42880000, 0x428A0000, 0x428C0000, 0x428E0000, 0x42900000, 0x42920000,
4052 0x42940000, 0x42960000, 0x42980000, 0x429A0000, 0x429C0000, 0x429E0000,
4053 0x42A00000, 0x42A20000, 0x42A40000, 0x42A60000, 0x42A80000, 0x42AA0000,
4054 0x42AC0000, 0x42AE0000, 0x42B00000, 0x42B20000, 0x42B40000, 0x42B60000,
4055 0x42B80000, 0x42BA0000, 0x42BC0000, 0x42BE0000, 0x42C00000, 0x42C20000,
4056 0x42C40000, 0x42C60000, 0x42C80000, 0x42CA0000, 0x42CC0000, 0x42CE0000,
4057 0x42D00000, 0x42D20000, 0x42D40000, 0x42D60000, 0x42D80000, 0x42DA0000,
4058 0x42DC0000, 0x42DE0000, 0x42E00000, 0x42E20000, 0x42E40000, 0x42E60000,
4059 0x42E80000, 0x42EA0000, 0x42EC0000, 0x42EE0000, 0x42F00000, 0x42F20000,
4060 0x42F40000, 0x42F60000, 0x42F80000, 0x42FA0000, 0x42FC0000, 0x42FE0000,
4061 0x43000000, 0x43010000, 0x43020000, 0x43030000, 0x43040000, 0x43050000,
4062 0x43060000, 0x43070000, 0x43080000, 0x43090000, 0x430A0000, 0x430B0000,
4063 0x430C0000, 0x430D0000, 0x430E0000, 0x430F0000, 0x43100000, 0x43110000,
4064 0x43120000, 0x43130000, 0x43140000, 0x43150000, 0x43160000, 0x43170000,
4065 0x43180000, 0x43190000, 0x431A0000, 0x431B0000, 0x431C0000, 0x431D0000,
4066 0x431E0000, 0x431F0000, 0x43200000, 0x43210000, 0x43220000, 0x43230000,
4067 0x43240000, 0x43250000, 0x43260000, 0x43270000, 0x43280000, 0x43290000,
4068 0x432A0000, 0x432B0000, 0x432C0000, 0x432D0000, 0x432E0000, 0x432F0000,
4069 0x43300000, 0x43310000, 0x43320000, 0x43330000, 0x43340000
4073 0x00000000, 0x3C23D70A, 0x3CA3D70A, 0x3CF5C28F, 0x3D23D70A, 0x3D4CCCCD,
4074 0x3D75C28F, 0x3D8F5C29, 0x3DA3D70A, 0x3DB851EC, 0x3DCCCCCD, 0x3DE147AE,
4075 0x3DF5C28F, 0x3E051EB8, 0x3E0F5C29, 0x3E19999A, 0x3E23D70A, 0x3E2E147B,
4076 0x3E3851EC, 0x3E428F5C, 0x3E4CCCCD, 0x3E570A3D, 0x3E6147AE, 0x3E6B851F,
4077 0x3E75C28F, 0x3E800000, 0x3E851EB8, 0x3E8A3D71, 0x3E8F5C29, 0x3E947AE1,
4078 0x3E99999A, 0x3E9EB852, 0x3EA3D70A, 0x3EA8F5C3, 0x3EAE147B, 0x3EB33333,
4079 0x3EB851EC, 0x3EBD70A4, 0x3EC28F5C, 0x3EC7AE14, 0x3ECCCCCD, 0x3ED1EB85,
4080 0x3ED70A3D, 0x3EDC28F6, 0x3EE147AE, 0x3EE66666, 0x3EEB851F, 0x3EF0A3D7,
4081 0x3EF5C28F, 0x3EFAE148, 0x3F000000, 0x3F028F5C, 0x3F051EB8, 0x3F07AE14,
4082 0x3F0A3D71, 0x3F0CCCCD, 0x3F0F5C29, 0x3F11EB85, 0x3F147AE1, 0x3F170A3D,
4083 0x3F19999A, 0x3F1C28F6, 0x3F1EB852, 0x3F2147AE, 0x3F23D70A, 0x3F266666,
4084 0x3F28F5C3, 0x3F2B851F, 0x3F2E147B, 0x3F30A3D7, 0x3F333333, 0x3F35C28F,
4085 0x3F3851EC, 0x3F3AE148, 0x3F3D70A4, 0x3F400000, 0x3F428F5C, 0x3F451EB8,
4086 0x3F47AE14, 0x3F4A3D71, 0x3F4CCCCD, 0x3F4F5C29, 0x3F51EB85, 0x3F547AE1,
4087 0x3F570A3D, 0x3F59999A, 0x3F5C28F6, 0x3F5EB852, 0x3F6147AE, 0x3F63D70A,
4088 0x3F666666, 0x3F68F5C3, 0x3F6B851F, 0x3F6E147B, 0x3F70A3D7, 0x3F733333,
4089 0x3F75C28F, 0x3F7851EC, 0x3F7AE148, 0x3F7D70A4, 0x3F800000
4093 0xC1C00000, 0xC1B80000, 0xC1B00000, 0xC1A80000, 0xC1A00000, 0xC1980000,
4094 0xC1900000, 0xC1880000, 0xC1800000, 0xC1700000, 0xC1600000, 0xC1500000,
4095 0xC1400000, 0xC1300000, 0xC1200000, 0xC1100000, 0xC1000000, 0xC0E00000,
4096 0xC0C00000, 0xC0A00000, 0xC0800000, 0xC0400000, 0xC0000000, 0xBF800000,
4097 0x00000000, 0x3F800000, 0x40000000, 0x40400000, 0x40800000, 0x40A00000,
4098 0x40C00000, 0x40E00000, 0x41000000, 0x41100000, 0x41200000, 0x41300000,
4099 0x41400000, 0x41500000, 0x41600000, 0x41700000, 0x41800000, 0x41880000,
4100 0x41900000, 0x41980000, 0x41A00000, 0x41A80000, 0x41B00000, 0x41B80000,
4101 0x41C00000
4104 static int tuning_ctl_set(struct hda_codec *codec, hda_nid_t nid, in tuning_ctl_set() argument
4107 int i = 0; in tuning_ctl_set()
4109 for (i = 0; i < TUNING_CTLS_COUNT; i++) in tuning_ctl_set()
4113 snd_hda_power_up(codec); in tuning_ctl_set()
4114 dspio_set_param(codec, ca0132_tuning_ctls[i].mid, 0x20, in tuning_ctl_set()
4117 snd_hda_power_down(codec); in tuning_ctl_set()
4125 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in tuning_ctl_get() local
4126 struct ca0132_spec *spec = codec->spec; in tuning_ctl_get()
4128 long *valp = ucontrol->value.integer.value; in tuning_ctl_get()
4129 int idx = nid - TUNING_CTL_START_NID; in tuning_ctl_get()
4131 *valp = spec->cur_ctl_vals[idx]; in tuning_ctl_get()
4132 return 0; in tuning_ctl_get()
4139 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in voice_focus_ctl_info()
4140 uinfo->count = chs == 3 ? 2 : 1; in voice_focus_ctl_info()
4141 uinfo->value.integer.min = 20; in voice_focus_ctl_info()
4142 uinfo->value.integer.max = 180; in voice_focus_ctl_info()
4143 uinfo->value.integer.step = 1; in voice_focus_ctl_info()
4145 return 0; in voice_focus_ctl_info()
4151 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in voice_focus_ctl_put() local
4152 struct ca0132_spec *spec = codec->spec; in voice_focus_ctl_put()
4154 long *valp = ucontrol->value.integer.value; in voice_focus_ctl_put()
4157 idx = nid - TUNING_CTL_START_NID; in voice_focus_ctl_put()
4159 if (spec->cur_ctl_vals[idx] == *valp) in voice_focus_ctl_put()
4160 return 0; in voice_focus_ctl_put()
4162 spec->cur_ctl_vals[idx] = *valp; in voice_focus_ctl_put()
4164 idx = *valp - 20; in voice_focus_ctl_put()
4165 tuning_ctl_set(codec, nid, voice_focus_vals_lookup, idx); in voice_focus_ctl_put()
4174 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in mic_svm_ctl_info()
4175 uinfo->count = chs == 3 ? 2 : 1; in mic_svm_ctl_info()
4176 uinfo->value.integer.min = 0; in mic_svm_ctl_info()
4177 uinfo->value.integer.max = 100; in mic_svm_ctl_info()
4178 uinfo->value.integer.step = 1; in mic_svm_ctl_info()
4180 return 0; in mic_svm_ctl_info()
4186 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in mic_svm_ctl_put() local
4187 struct ca0132_spec *spec = codec->spec; in mic_svm_ctl_put()
4189 long *valp = ucontrol->value.integer.value; in mic_svm_ctl_put()
4192 idx = nid - TUNING_CTL_START_NID; in mic_svm_ctl_put()
4194 if (spec->cur_ctl_vals[idx] == *valp) in mic_svm_ctl_put()
4195 return 0; in mic_svm_ctl_put()
4197 spec->cur_ctl_vals[idx] = *valp; in mic_svm_ctl_put()
4200 tuning_ctl_set(codec, nid, mic_svm_vals_lookup, idx); in mic_svm_ctl_put()
4202 return 0; in mic_svm_ctl_put()
4209 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in equalizer_ctl_info()
4210 uinfo->count = chs == 3 ? 2 : 1; in equalizer_ctl_info()
4211 uinfo->value.integer.min = 0; in equalizer_ctl_info()
4212 uinfo->value.integer.max = 48; in equalizer_ctl_info()
4213 uinfo->value.integer.step = 1; in equalizer_ctl_info()
4215 return 0; in equalizer_ctl_info()
4221 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in equalizer_ctl_put() local
4222 struct ca0132_spec *spec = codec->spec; in equalizer_ctl_put()
4224 long *valp = ucontrol->value.integer.value; in equalizer_ctl_put()
4227 idx = nid - TUNING_CTL_START_NID; in equalizer_ctl_put()
4229 if (spec->cur_ctl_vals[idx] == *valp) in equalizer_ctl_put()
4230 return 0; in equalizer_ctl_put()
4232 spec->cur_ctl_vals[idx] = *valp; in equalizer_ctl_put()
4235 tuning_ctl_set(codec, nid, equalizer_vals_lookup, idx); in equalizer_ctl_put()
4240 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(voice_focus_db_scale, 2000, 100, 0);
4241 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(eq_db_scale, -2400, 100, 0);
4243 static int add_tuning_control(struct hda_codec *codec, in add_tuning_control() argument
4250 HDA_CODEC_VOLUME_MONO(namestr, nid, 1, 0, type); in add_tuning_control()
4254 knew.tlv.c = 0; in add_tuning_control()
4255 knew.tlv.p = 0; in add_tuning_control()
4275 return 0; in add_tuning_control()
4278 HDA_COMPOSE_AMP_VAL(nid, 1, 0, type); in add_tuning_control()
4280 return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec)); in add_tuning_control()
4283 static int add_tuning_ctls(struct hda_codec *codec) in add_tuning_ctls() argument
4288 for (i = 0; i < TUNING_CTLS_COUNT; i++) { in add_tuning_ctls()
4289 err = add_tuning_control(codec, in add_tuning_ctls()
4294 if (err < 0) in add_tuning_ctls()
4298 return 0; in add_tuning_ctls()
4301 static void ca0132_init_tuning_defaults(struct hda_codec *codec) in ca0132_init_tuning_defaults() argument
4303 struct ca0132_spec *spec = codec->spec; in ca0132_init_tuning_defaults()
4306 /* Wedge Angle defaults to 30. 10 below is 30 - 20. 20 is min. */ in ca0132_init_tuning_defaults()
4307 spec->cur_ctl_vals[WEDGE_ANGLE - TUNING_CTL_START_NID] = 10; in ca0132_init_tuning_defaults()
4309 spec->cur_ctl_vals[SVM_LEVEL - TUNING_CTL_START_NID] = 74; in ca0132_init_tuning_defaults()
4311 /* EQ defaults to 0dB. */ in ca0132_init_tuning_defaults()
4313 spec->cur_ctl_vals[i] = 24; in ca0132_init_tuning_defaults()
4320 * If jack inserted, headphone will be selected, else built-in speakers
4323 static int ca0132_select_out(struct hda_codec *codec) in ca0132_select_out() argument
4325 struct ca0132_spec *spec = codec->spec; in ca0132_select_out()
4332 codec_dbg(codec, "ca0132_select_out\n"); in ca0132_select_out()
4334 snd_hda_power_up_pm(codec); in ca0132_select_out()
4336 auto_jack = spec->vnode_lswitch[VNID_HP_ASEL - VNODE_START_NID]; in ca0132_select_out()
4339 jack_present = snd_hda_jack_detect(codec, spec->unsol_tag_hp); in ca0132_select_out()
4342 spec->vnode_lswitch[VNID_HP_SEL - VNODE_START_NID]; in ca0132_select_out()
4345 spec->cur_out_type = HEADPHONE_OUT; in ca0132_select_out()
4347 spec->cur_out_type = SPEAKER_OUT; in ca0132_select_out()
4349 if (spec->cur_out_type == SPEAKER_OUT) { in ca0132_select_out()
4350 codec_dbg(codec, "ca0132_select_out speaker\n"); in ca0132_select_out()
4353 err = dspio_set_uint_param(codec, 0x80, 0x04, tmp); in ca0132_select_out()
4354 if (err < 0) in ca0132_select_out()
4358 err = dspio_set_uint_param(codec, 0x8f, 0x00, tmp); in ca0132_select_out()
4359 if (err < 0) in ca0132_select_out()
4363 snd_hda_codec_write(codec, spec->out_pins[1], 0, in ca0132_select_out()
4364 VENDOR_CHIPIO_EAPD_SEL_SET, 0x02); in ca0132_select_out()
4365 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4366 AC_VERB_SET_EAPD_BTLENABLE, 0x00); in ca0132_select_out()
4367 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4368 VENDOR_CHIPIO_EAPD_SEL_SET, 0x00); in ca0132_select_out()
4369 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4370 AC_VERB_SET_EAPD_BTLENABLE, 0x02); in ca0132_select_out()
4373 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[1], 0, in ca0132_select_out()
4374 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_select_out()
4375 snd_hda_set_pin_ctl(codec, spec->out_pins[1], in ca0132_select_out()
4378 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[0], 0, in ca0132_select_out()
4379 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_select_out()
4380 snd_hda_set_pin_ctl(codec, spec->out_pins[0], in ca0132_select_out()
4383 codec_dbg(codec, "ca0132_select_out hp\n"); in ca0132_select_out()
4386 err = dspio_set_uint_param(codec, 0x80, 0x04, tmp); in ca0132_select_out()
4387 if (err < 0) in ca0132_select_out()
4391 err = dspio_set_uint_param(codec, 0x8f, 0x00, tmp); in ca0132_select_out()
4392 if (err < 0) in ca0132_select_out()
4396 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4397 VENDOR_CHIPIO_EAPD_SEL_SET, 0x00); in ca0132_select_out()
4398 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4399 AC_VERB_SET_EAPD_BTLENABLE, 0x00); in ca0132_select_out()
4400 snd_hda_codec_write(codec, spec->out_pins[1], 0, in ca0132_select_out()
4401 VENDOR_CHIPIO_EAPD_SEL_SET, 0x02); in ca0132_select_out()
4402 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4403 AC_VERB_SET_EAPD_BTLENABLE, 0x02); in ca0132_select_out()
4406 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[0], 0, in ca0132_select_out()
4407 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_select_out()
4408 snd_hda_set_pin_ctl(codec, spec->out_pins[0], in ca0132_select_out()
4411 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[1], 0, in ca0132_select_out()
4412 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_select_out()
4413 snd_hda_set_pin_ctl(codec, spec->out_pins[1], in ca0132_select_out()
4418 snd_hda_power_down_pm(codec); in ca0132_select_out()
4420 return err < 0 ? err : 0; in ca0132_select_out()
4423 static int ae5_headphone_gain_set(struct hda_codec *codec, long val);
4424 static int zxr_headphone_gain_set(struct hda_codec *codec, long val);
4425 static int ca0132_effects_set(struct hda_codec *codec, hda_nid_t nid, long val);
4427 static void ae5_mmio_select_out(struct hda_codec *codec) in ae5_mmio_select_out() argument
4429 struct ca0132_spec *spec = codec->spec; in ae5_mmio_select_out()
4438 for (i = 0; i < AE_CA0113_OUT_SET_COMMANDS; i++) in ae5_mmio_select_out()
4439 ca0113_mmio_command_set(codec, out_cmds->group[i], in ae5_mmio_select_out()
4440 out_cmds->target[i], in ae5_mmio_select_out()
4441 out_cmds->vals[spec->cur_out_type][i]); in ae5_mmio_select_out()
4444 static int ca0132_alt_set_full_range_speaker(struct hda_codec *codec) in ca0132_alt_set_full_range_speaker() argument
4446 struct ca0132_spec *spec = codec->spec; in ca0132_alt_set_full_range_speaker()
4451 /* 2.0/4.0 setup has no LFE channel, so setting full-range does nothing. */ in ca0132_alt_set_full_range_speaker()
4452 if (spec->channel_cfg_val == SPEAKER_CHANNELS_4_0 in ca0132_alt_set_full_range_speaker()
4453 || spec->channel_cfg_val == SPEAKER_CHANNELS_2_0) in ca0132_alt_set_full_range_speaker()
4454 return 0; in ca0132_alt_set_full_range_speaker()
4456 /* Set front L/R full range. Zero for full-range, one for redirection. */ in ca0132_alt_set_full_range_speaker()
4457 tmp = spec->speaker_range_val[0] ? FLOAT_ZERO : FLOAT_ONE; in ca0132_alt_set_full_range_speaker()
4458 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_set_full_range_speaker()
4460 if (err < 0) in ca0132_alt_set_full_range_speaker()
4463 /* When setting full-range rear, both rear and center/lfe are set. */ in ca0132_alt_set_full_range_speaker()
4464 tmp = spec->speaker_range_val[1] ? FLOAT_ZERO : FLOAT_ONE; in ca0132_alt_set_full_range_speaker()
4465 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_set_full_range_speaker()
4467 if (err < 0) in ca0132_alt_set_full_range_speaker()
4470 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_set_full_range_speaker()
4472 if (err < 0) in ca0132_alt_set_full_range_speaker()
4476 * Only the AE series cards set this value when setting full-range, in ca0132_alt_set_full_range_speaker()
4480 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_set_full_range_speaker()
4482 if (err < 0) in ca0132_alt_set_full_range_speaker()
4486 return 0; in ca0132_alt_set_full_range_speaker()
4489 static int ca0132_alt_surround_set_bass_redirection(struct hda_codec *codec, in ca0132_alt_surround_set_bass_redirection() argument
4492 struct ca0132_spec *spec = codec->spec; in ca0132_alt_surround_set_bass_redirection()
4496 if (val && spec->channel_cfg_val != SPEAKER_CHANNELS_4_0 && in ca0132_alt_surround_set_bass_redirection()
4497 spec->channel_cfg_val != SPEAKER_CHANNELS_2_0) in ca0132_alt_surround_set_bass_redirection()
4502 err = dspio_set_uint_param(codec, 0x96, SPEAKER_BASS_REDIRECT, tmp); in ca0132_alt_surround_set_bass_redirection()
4503 if (err < 0) in ca0132_alt_surround_set_bass_redirection()
4508 tmp = float_xbass_xover_lookup[spec->xbass_xover_freq]; in ca0132_alt_surround_set_bass_redirection()
4509 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_surround_set_bass_redirection()
4511 if (err < 0) in ca0132_alt_surround_set_bass_redirection()
4515 return 0; in ca0132_alt_surround_set_bass_redirection()
4522 static void ca0132_alt_select_out_get_quirk_data(struct hda_codec *codec, in ca0132_alt_select_out_get_quirk_data() argument
4525 struct ca0132_spec *spec = codec->spec; in ca0132_alt_select_out_get_quirk_data()
4530 for (i = 0; i < ARRAY_SIZE(quirk_out_set_data); i++) { in ca0132_alt_select_out_get_quirk_data()
4538 static int ca0132_alt_select_out_quirk_set(struct hda_codec *codec) in ca0132_alt_select_out_quirk_set() argument
4542 struct ca0132_spec *spec = codec->spec; in ca0132_alt_select_out_quirk_set()
4546 ca0132_alt_select_out_get_quirk_data(codec, &quirk_data); in ca0132_alt_select_out_quirk_set()
4548 return 0; in ca0132_alt_select_out_quirk_set()
4550 out_info = &quirk_data->out_set_info[spec->cur_out_type]; in ca0132_alt_select_out_quirk_set()
4551 if (quirk_data->is_ae_series) in ca0132_alt_select_out_quirk_set()
4552 ae5_mmio_select_out(codec); in ca0132_alt_select_out_quirk_set()
4554 if (out_info->has_hda_gpio) { in ca0132_alt_select_out_quirk_set()
4555 gpio_data = snd_hda_codec_read(codec, codec->core.afg, 0, in ca0132_alt_select_out_quirk_set()
4556 AC_VERB_GET_GPIO_DATA, 0); in ca0132_alt_select_out_quirk_set()
4558 if (out_info->hda_gpio_set) in ca0132_alt_select_out_quirk_set()
4559 gpio_data |= (1 << out_info->hda_gpio_pin); in ca0132_alt_select_out_quirk_set()
4561 gpio_data &= ~(1 << out_info->hda_gpio_pin); in ca0132_alt_select_out_quirk_set()
4563 snd_hda_codec_write(codec, codec->core.afg, 0, in ca0132_alt_select_out_quirk_set()
4567 if (out_info->mmio_gpio_count) { in ca0132_alt_select_out_quirk_set()
4568 for (i = 0; i < out_info->mmio_gpio_count; i++) { in ca0132_alt_select_out_quirk_set()
4569 ca0113_mmio_gpio_set(codec, out_info->mmio_gpio_pin[i], in ca0132_alt_select_out_quirk_set()
4570 out_info->mmio_gpio_set[i]); in ca0132_alt_select_out_quirk_set()
4574 if (out_info->scp_cmds_count) { in ca0132_alt_select_out_quirk_set()
4575 for (i = 0; i < out_info->scp_cmds_count; i++) { in ca0132_alt_select_out_quirk_set()
4576 err = dspio_set_uint_param(codec, in ca0132_alt_select_out_quirk_set()
4577 out_info->scp_cmd_mid[i], in ca0132_alt_select_out_quirk_set()
4578 out_info->scp_cmd_req[i], in ca0132_alt_select_out_quirk_set()
4579 out_info->scp_cmd_val[i]); in ca0132_alt_select_out_quirk_set()
4580 if (err < 0) in ca0132_alt_select_out_quirk_set()
4585 chipio_set_control_param(codec, 0x0d, out_info->dac2port); in ca0132_alt_select_out_quirk_set()
4587 if (out_info->has_chipio_write) { in ca0132_alt_select_out_quirk_set()
4588 chipio_write(codec, out_info->chipio_write_addr, in ca0132_alt_select_out_quirk_set()
4589 out_info->chipio_write_data); in ca0132_alt_select_out_quirk_set()
4592 if (quirk_data->has_headphone_gain) { in ca0132_alt_select_out_quirk_set()
4593 if (spec->cur_out_type != HEADPHONE_OUT) { in ca0132_alt_select_out_quirk_set()
4594 if (quirk_data->is_ae_series) in ca0132_alt_select_out_quirk_set()
4595 ae5_headphone_gain_set(codec, 2); in ca0132_alt_select_out_quirk_set()
4597 zxr_headphone_gain_set(codec, 0); in ca0132_alt_select_out_quirk_set()
4599 if (quirk_data->is_ae_series) in ca0132_alt_select_out_quirk_set()
4600 ae5_headphone_gain_set(codec, in ca0132_alt_select_out_quirk_set()
4601 spec->ae5_headphone_gain_val); in ca0132_alt_select_out_quirk_set()
4603 zxr_headphone_gain_set(codec, in ca0132_alt_select_out_quirk_set()
4604 spec->zxr_gain_set); in ca0132_alt_select_out_quirk_set()
4608 return 0; in ca0132_alt_select_out_quirk_set()
4611 static void ca0132_set_out_node_pincfg(struct hda_codec *codec, hda_nid_t nid, in ca0132_set_out_node_pincfg() argument
4616 pin_ctl = snd_hda_codec_read(codec, nid, 0, in ca0132_set_out_node_pincfg()
4617 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_set_out_node_pincfg()
4621 snd_hda_set_pin_ctl(codec, nid, pin_ctl); in ca0132_set_out_node_pincfg()
4630 * It also adds the ability to auto-detect the front headphone port.
4632 static int ca0132_alt_select_out(struct hda_codec *codec) in ca0132_alt_select_out() argument
4634 struct ca0132_spec *spec = codec->spec; in ca0132_alt_select_out()
4640 hda_nid_t headphone_nid = spec->out_pins[1]; in ca0132_alt_select_out()
4642 codec_dbg(codec, "%s\n", __func__); in ca0132_alt_select_out()
4644 snd_hda_power_up_pm(codec); in ca0132_alt_select_out()
4646 auto_jack = spec->vnode_lswitch[VNID_HP_ASEL - VNODE_START_NID]; in ca0132_alt_select_out()
4654 jack_present = snd_hda_jack_detect(codec, spec->unsol_tag_hp) || in ca0132_alt_select_out()
4655 snd_hda_jack_detect(codec, spec->unsol_tag_front_hp); in ca0132_alt_select_out()
4658 spec->cur_out_type = HEADPHONE_OUT; in ca0132_alt_select_out()
4660 spec->cur_out_type = SPEAKER_OUT; in ca0132_alt_select_out()
4662 spec->cur_out_type = spec->out_enum_val; in ca0132_alt_select_out()
4664 outfx_set = spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID]; in ca0132_alt_select_out()
4667 err = dspio_set_uint_param(codec, 0x96, SPEAKER_TUNING_MUTE, FLOAT_ONE); in ca0132_alt_select_out()
4668 if (err < 0) in ca0132_alt_select_out()
4671 if (ca0132_alt_select_out_quirk_set(codec) < 0) in ca0132_alt_select_out()
4674 switch (spec->cur_out_type) { in ca0132_alt_select_out()
4676 codec_dbg(codec, "%s speaker\n", __func__); in ca0132_alt_select_out()
4679 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_alt_select_out()
4680 AC_VERB_SET_EAPD_BTLENABLE, 0x01); in ca0132_alt_select_out()
4683 ca0132_set_out_node_pincfg(codec, spec->out_pins[1], 0, 0); in ca0132_alt_select_out()
4684 /* Set front L-R to output. */ in ca0132_alt_select_out()
4685 ca0132_set_out_node_pincfg(codec, spec->out_pins[0], 1, 0); in ca0132_alt_select_out()
4687 ca0132_set_out_node_pincfg(codec, spec->out_pins[2], 1, 0); in ca0132_alt_select_out()
4689 ca0132_set_out_node_pincfg(codec, spec->out_pins[3], 1, 0); in ca0132_alt_select_out()
4696 if (!outfx_set && spec->channel_cfg_val == SPEAKER_CHANNELS_2_0) in ca0132_alt_select_out()
4699 tmp = speaker_channel_cfgs[spec->channel_cfg_val].val; in ca0132_alt_select_out()
4701 err = dspio_set_uint_param(codec, 0x80, 0x04, tmp); in ca0132_alt_select_out()
4702 if (err < 0) in ca0132_alt_select_out()
4707 codec_dbg(codec, "%s hp\n", __func__); in ca0132_alt_select_out()
4708 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_alt_select_out()
4709 AC_VERB_SET_EAPD_BTLENABLE, 0x00); in ca0132_alt_select_out()
4712 ca0132_set_out_node_pincfg(codec, spec->out_pins[0], 0, 0); in ca0132_alt_select_out()
4713 ca0132_set_out_node_pincfg(codec, spec->out_pins[2], 0, 0); in ca0132_alt_select_out()
4714 ca0132_set_out_node_pincfg(codec, spec->out_pins[3], 0, 0); in ca0132_alt_select_out()
4717 if (snd_hda_jack_detect(codec, spec->unsol_tag_front_hp)) in ca0132_alt_select_out()
4718 headphone_nid = spec->out_pins[2]; in ca0132_alt_select_out()
4719 else if (snd_hda_jack_detect(codec, spec->unsol_tag_hp)) in ca0132_alt_select_out()
4720 headphone_nid = spec->out_pins[1]; in ca0132_alt_select_out()
4722 ca0132_set_out_node_pincfg(codec, headphone_nid, 1, 1); in ca0132_alt_select_out()
4725 err = dspio_set_uint_param(codec, 0x80, 0x04, FLOAT_ONE); in ca0132_alt_select_out()
4727 err = dspio_set_uint_param(codec, 0x80, 0x04, FLOAT_ZERO); in ca0132_alt_select_out()
4729 if (err < 0) in ca0132_alt_select_out()
4734 * If output effects are enabled, set the X-Bass effect value again to in ca0132_alt_select_out()
4739 ca0132_effects_set(codec, X_BASS, in ca0132_alt_select_out()
4740 spec->effects_switch[X_BASS - EFFECT_START_NID]); in ca0132_alt_select_out()
4742 /* Set speaker EQ bypass attenuation to 0. */ in ca0132_alt_select_out()
4743 err = dspio_set_uint_param(codec, 0x8f, 0x01, FLOAT_ZERO); in ca0132_alt_select_out()
4744 if (err < 0) in ca0132_alt_select_out()
4751 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_select_out()
4753 if (err < 0) in ca0132_alt_select_out()
4756 if (spec->cur_out_type == SPEAKER_OUT) in ca0132_alt_select_out()
4757 err = ca0132_alt_surround_set_bass_redirection(codec, in ca0132_alt_select_out()
4758 spec->bass_redirection_val); in ca0132_alt_select_out()
4760 err = ca0132_alt_surround_set_bass_redirection(codec, 0); in ca0132_alt_select_out()
4763 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_select_out()
4765 if (err < 0) in ca0132_alt_select_out()
4768 if (spec->cur_out_type == SPEAKER_OUT) { in ca0132_alt_select_out()
4769 err = ca0132_alt_set_full_range_speaker(codec); in ca0132_alt_select_out()
4770 if (err < 0) in ca0132_alt_select_out()
4775 snd_hda_power_down_pm(codec); in ca0132_alt_select_out()
4777 return err < 0 ? err : 0; in ca0132_alt_select_out()
4787 ca0132_alt_select_out(spec->codec); in ca0132_unsol_hp_delayed()
4789 ca0132_select_out(spec->codec); in ca0132_unsol_hp_delayed()
4791 jack = snd_hda_jack_tbl_get(spec->codec, spec->unsol_tag_hp); in ca0132_unsol_hp_delayed()
4793 jack->block_report = 0; in ca0132_unsol_hp_delayed()
4794 snd_hda_jack_report_sync(spec->codec); in ca0132_unsol_hp_delayed()
4798 static void ca0132_set_dmic(struct hda_codec *codec, int enable);
4799 static int ca0132_mic_boost_set(struct hda_codec *codec, long val);
4800 static void resume_mic1(struct hda_codec *codec, unsigned int oldval);
4801 static int stop_mic1(struct hda_codec *codec);
4802 static int ca0132_cvoice_switch_set(struct hda_codec *codec);
4803 static int ca0132_alt_mic_boost_set(struct hda_codec *codec, long val);
4808 static int ca0132_set_vipsource(struct hda_codec *codec, int val) in ca0132_set_vipsource() argument
4810 struct ca0132_spec *spec = codec->spec; in ca0132_set_vipsource()
4813 if (spec->dsp_state != DSP_DOWNLOADED) in ca0132_set_vipsource()
4814 return 0; in ca0132_set_vipsource()
4816 /* if CrystalVoice if off, vipsource should be 0 */ in ca0132_set_vipsource()
4817 if (!spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID] || in ca0132_set_vipsource()
4818 (val == 0)) { in ca0132_set_vipsource()
4819 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, 0); in ca0132_set_vipsource()
4820 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); in ca0132_set_vipsource()
4821 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); in ca0132_set_vipsource()
4822 if (spec->cur_mic_type == DIGITAL_MIC) in ca0132_set_vipsource()
4826 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_set_vipsource()
4828 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_set_vipsource()
4830 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_16_000); in ca0132_set_vipsource()
4831 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_16_000); in ca0132_set_vipsource()
4832 if (spec->cur_mic_type == DIGITAL_MIC) in ca0132_set_vipsource()
4836 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_set_vipsource()
4838 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_set_vipsource()
4840 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, val); in ca0132_set_vipsource()
4846 static int ca0132_alt_set_vipsource(struct hda_codec *codec, int val) in ca0132_alt_set_vipsource() argument
4848 struct ca0132_spec *spec = codec->spec; in ca0132_alt_set_vipsource()
4851 if (spec->dsp_state != DSP_DOWNLOADED) in ca0132_alt_set_vipsource()
4852 return 0; in ca0132_alt_set_vipsource()
4854 codec_dbg(codec, "%s\n", __func__); in ca0132_alt_set_vipsource()
4856 chipio_set_stream_control(codec, 0x03, 0); in ca0132_alt_set_vipsource()
4857 chipio_set_stream_control(codec, 0x04, 0); in ca0132_alt_set_vipsource()
4859 /* if CrystalVoice is off, vipsource should be 0 */ in ca0132_alt_set_vipsource()
4860 if (!spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID] || in ca0132_alt_set_vipsource()
4861 (val == 0) || spec->in_enum_val == REAR_LINE_IN) { in ca0132_alt_set_vipsource()
4862 codec_dbg(codec, "%s: off.", __func__); in ca0132_alt_set_vipsource()
4863 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, 0); in ca0132_alt_set_vipsource()
4866 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_alt_set_vipsource()
4868 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); in ca0132_alt_set_vipsource()
4869 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); in ca0132_alt_set_vipsource()
4871 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_set_vipsource()
4874 if (spec->in_enum_val == REAR_LINE_IN) in ca0132_alt_set_vipsource()
4883 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_set_vipsource()
4886 codec_dbg(codec, "%s: on.", __func__); in ca0132_alt_set_vipsource()
4887 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_16_000); in ca0132_alt_set_vipsource()
4888 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_16_000); in ca0132_alt_set_vipsource()
4890 chipio_set_conn_rate(codec, 0x0F, SR_16_000); in ca0132_alt_set_vipsource()
4892 if (spec->effects_switch[VOICE_FOCUS - EFFECT_START_NID]) in ca0132_alt_set_vipsource()
4896 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_set_vipsource()
4899 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_alt_set_vipsource()
4902 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, val); in ca0132_alt_set_vipsource()
4905 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_set_vipsource()
4906 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_set_vipsource()
4914 * If jack inserted, ext.mic will be selected, else built-in mic
4917 static int ca0132_select_mic(struct hda_codec *codec) in ca0132_select_mic() argument
4919 struct ca0132_spec *spec = codec->spec; in ca0132_select_mic()
4923 codec_dbg(codec, "ca0132_select_mic\n"); in ca0132_select_mic()
4925 snd_hda_power_up_pm(codec); in ca0132_select_mic()
4927 auto_jack = spec->vnode_lswitch[VNID_AMIC1_ASEL - VNODE_START_NID]; in ca0132_select_mic()
4930 jack_present = snd_hda_jack_detect(codec, spec->unsol_tag_amic1); in ca0132_select_mic()
4933 spec->vnode_lswitch[VNID_AMIC1_SEL - VNODE_START_NID]; in ca0132_select_mic()
4936 spec->cur_mic_type = LINE_MIC_IN; in ca0132_select_mic()
4938 spec->cur_mic_type = DIGITAL_MIC; in ca0132_select_mic()
4940 if (spec->cur_mic_type == DIGITAL_MIC) { in ca0132_select_mic()
4942 chipio_set_conn_rate(codec, MEM_CONNID_DMIC, SR_32_000); in ca0132_select_mic()
4943 ca0132_set_dmic(codec, 1); in ca0132_select_mic()
4944 ca0132_mic_boost_set(codec, 0); in ca0132_select_mic()
4946 ca0132_effects_set(codec, VOICE_FOCUS, in ca0132_select_mic()
4947 spec->effects_switch in ca0132_select_mic()
4948 [VOICE_FOCUS - EFFECT_START_NID]); in ca0132_select_mic()
4951 chipio_set_conn_rate(codec, MEM_CONNID_DMIC, SR_96_000); in ca0132_select_mic()
4952 ca0132_set_dmic(codec, 0); in ca0132_select_mic()
4953 ca0132_mic_boost_set(codec, spec->cur_mic_boost); in ca0132_select_mic()
4955 ca0132_effects_set(codec, VOICE_FOCUS, 0); in ca0132_select_mic()
4958 snd_hda_power_down_pm(codec); in ca0132_select_mic()
4960 return 0; in ca0132_select_mic()
4966 * The front mic has no jack-detection, so the only way to switch to it
4969 static int ca0132_alt_select_in(struct hda_codec *codec) in ca0132_alt_select_in() argument
4971 struct ca0132_spec *spec = codec->spec; in ca0132_alt_select_in()
4974 codec_dbg(codec, "%s\n", __func__); in ca0132_alt_select_in()
4976 snd_hda_power_up_pm(codec); in ca0132_alt_select_in()
4978 chipio_set_stream_control(codec, 0x03, 0); in ca0132_alt_select_in()
4979 chipio_set_stream_control(codec, 0x04, 0); in ca0132_alt_select_in()
4981 spec->cur_mic_type = spec->in_enum_val; in ca0132_alt_select_in()
4983 switch (spec->cur_mic_type) { in ca0132_alt_select_in()
4988 ca0113_mmio_gpio_set(codec, 0, false); in ca0132_alt_select_in()
4995 r3di_gpio_mic_set(codec, R3DI_REAR_MIC); in ca0132_alt_select_in()
4999 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ca0132_alt_select_in()
5003 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ca0132_alt_select_in()
5005 chipio_set_conn_rate(codec, MEM_CONNID_MICIN2, in ca0132_alt_select_in()
5007 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT2, in ca0132_alt_select_in()
5009 dspio_set_uint_param(codec, 0x80, 0x01, FLOAT_ZERO); in ca0132_alt_select_in()
5016 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); in ca0132_alt_select_in()
5017 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); in ca0132_alt_select_in()
5019 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_select_in()
5021 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_select_in()
5023 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_select_in()
5024 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_select_in()
5027 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5028 chipio_write(codec, 0x18B09C, 0x0000000C); in ca0132_alt_select_in()
5031 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5032 chipio_write(codec, 0x18B09C, 0x000000CC); in ca0132_alt_select_in()
5035 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5036 chipio_write(codec, 0x18B09C, 0x0000004C); in ca0132_alt_select_in()
5041 ca0132_alt_mic_boost_set(codec, spec->mic_boost_enum_val); in ca0132_alt_select_in()
5044 ca0132_mic_boost_set(codec, 0); in ca0132_alt_select_in()
5048 ca0113_mmio_gpio_set(codec, 0, false); in ca0132_alt_select_in()
5051 r3di_gpio_mic_set(codec, R3DI_REAR_MIC); in ca0132_alt_select_in()
5054 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ca0132_alt_select_in()
5057 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x3f); in ca0132_alt_select_in()
5058 chipio_set_conn_rate(codec, MEM_CONNID_MICIN2, in ca0132_alt_select_in()
5060 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT2, in ca0132_alt_select_in()
5062 dspio_set_uint_param(codec, 0x80, 0x01, FLOAT_ZERO); in ca0132_alt_select_in()
5068 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); in ca0132_alt_select_in()
5069 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); in ca0132_alt_select_in()
5071 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_select_in()
5077 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_select_in()
5082 chipio_write(codec, 0x18B098, 0x00000000); in ca0132_alt_select_in()
5083 chipio_write(codec, 0x18B09C, 0x00000000); in ca0132_alt_select_in()
5088 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_select_in()
5089 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_select_in()
5095 ca0113_mmio_gpio_set(codec, 0, true); in ca0132_alt_select_in()
5096 ca0113_mmio_gpio_set(codec, 5, false); in ca0132_alt_select_in()
5100 r3di_gpio_mic_set(codec, R3DI_FRONT_MIC); in ca0132_alt_select_in()
5104 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x3f); in ca0132_alt_select_in()
5112 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); in ca0132_alt_select_in()
5113 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); in ca0132_alt_select_in()
5115 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_select_in()
5117 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_select_in()
5119 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_select_in()
5120 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_select_in()
5124 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5125 chipio_write(codec, 0x18B09C, 0x000000CC); in ca0132_alt_select_in()
5128 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5129 chipio_write(codec, 0x18B09C, 0x0000004C); in ca0132_alt_select_in()
5134 ca0132_alt_mic_boost_set(codec, spec->mic_boost_enum_val); in ca0132_alt_select_in()
5137 ca0132_cvoice_switch_set(codec); in ca0132_alt_select_in()
5139 snd_hda_power_down_pm(codec); in ca0132_alt_select_in()
5140 return 0; in ca0132_alt_select_in()
5146 static bool ca0132_is_vnode_effective(struct hda_codec *codec, in ca0132_is_vnode_effective() argument
5150 struct ca0132_spec *spec = codec->spec; in ca0132_is_vnode_effective()
5155 nid = spec->shared_out_nid; in ca0132_is_vnode_effective()
5158 nid = spec->shared_mic_nid; in ca0132_is_vnode_effective()
5172 * They return 0 if no changed. Return 1 if changed.
5174 static int ca0132_voicefx_set(struct hda_codec *codec, int enable) in ca0132_voicefx_set() argument
5176 struct ca0132_spec *spec = codec->spec; in ca0132_voicefx_set()
5181 tmp = spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID] ? in ca0132_voicefx_set()
5187 dspio_set_uint_param(codec, ca0132_voicefx.mid, in ca0132_voicefx_set()
5188 ca0132_voicefx.reqs[0], tmp); in ca0132_voicefx_set()
5196 static int ca0132_effects_set(struct hda_codec *codec, hda_nid_t nid, long val) in ca0132_effects_set() argument
5198 struct ca0132_spec *spec = codec->spec; in ca0132_effects_set()
5201 int err = 0; in ca0132_effects_set()
5202 int idx = nid - EFFECT_START_NID; in ca0132_effects_set()
5204 if ((idx < 0) || (idx >= num_fx)) in ca0132_effects_set()
5205 return 0; /* no changed */ in ca0132_effects_set()
5210 if (!spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID]) in ca0132_effects_set()
5211 val = 0; in ca0132_effects_set()
5212 if (spec->cur_out_type == SPEAKER_OUT && nid == X_BASS) { in ca0132_effects_set()
5213 channel_cfg = spec->channel_cfg_val; in ca0132_effects_set()
5216 val = 0; in ca0132_effects_set()
5223 if (!spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID]) in ca0132_effects_set()
5224 val = 0; in ca0132_effects_set()
5226 /* Voice Focus applies to 2-ch Mic, Digital Mic */ in ca0132_effects_set()
5227 if ((nid == VOICE_FOCUS) && (spec->cur_mic_type != DIGITAL_MIC)) in ca0132_effects_set()
5228 val = 0; in ca0132_effects_set()
5232 && (spec->cur_mic_type != REAR_LINE_IN)) { in ca0132_effects_set()
5233 if (spec->effects_switch[CRYSTAL_VOICE - in ca0132_effects_set()
5236 if (spec->effects_switch[VOICE_FOCUS - in ca0132_effects_set()
5243 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_effects_set()
5248 * to module ID 0x47. No clue why. in ca0132_effects_set()
5251 && (spec->cur_mic_type != REAR_LINE_IN)) { in ca0132_effects_set()
5252 if (spec->effects_switch[CRYSTAL_VOICE - in ca0132_effects_set()
5254 if (spec->effects_switch[NOISE_REDUCTION - in ca0132_effects_set()
5262 dspio_set_uint_param(codec, 0x47, 0x00, tmp); in ca0132_effects_set()
5267 spec->in_enum_val == REAR_LINE_IN) in ca0132_effects_set()
5268 val = 0; in ca0132_effects_set()
5271 codec_dbg(codec, "ca0132_effect_set: nid=0x%x, val=%ld\n", in ca0132_effects_set()
5274 on = (val == 0) ? FLOAT_ZERO : FLOAT_ONE; in ca0132_effects_set()
5275 err = dspio_set_uint_param(codec, ca0132_effects[idx].mid, in ca0132_effects_set()
5276 ca0132_effects[idx].reqs[0], on); in ca0132_effects_set()
5278 if (err < 0) in ca0132_effects_set()
5279 return 0; /* no changed */ in ca0132_effects_set()
5287 static int ca0132_pe_switch_set(struct hda_codec *codec) in ca0132_pe_switch_set() argument
5289 struct ca0132_spec *spec = codec->spec; in ca0132_pe_switch_set()
5291 int i, ret = 0; in ca0132_pe_switch_set()
5293 codec_dbg(codec, "ca0132_pe_switch_set: val=%ld\n", in ca0132_pe_switch_set()
5294 spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID]); in ca0132_pe_switch_set()
5297 ca0132_alt_select_out(codec); in ca0132_pe_switch_set()
5299 i = OUT_EFFECT_START_NID - EFFECT_START_NID; in ca0132_pe_switch_set()
5303 ret |= ca0132_effects_set(codec, nid, spec->effects_switch[i]); in ca0132_pe_switch_set()
5309 static int stop_mic1(struct hda_codec *codec) in stop_mic1() argument
5311 struct ca0132_spec *spec = codec->spec; in stop_mic1()
5312 unsigned int oldval = snd_hda_codec_read(codec, spec->adcs[0], 0, in stop_mic1()
5313 AC_VERB_GET_CONV, 0); in stop_mic1()
5314 if (oldval != 0) in stop_mic1()
5315 snd_hda_codec_write(codec, spec->adcs[0], 0, in stop_mic1()
5317 0); in stop_mic1()
5322 static void resume_mic1(struct hda_codec *codec, unsigned int oldval) in resume_mic1() argument
5324 struct ca0132_spec *spec = codec->spec; in resume_mic1()
5326 if (oldval != 0) in resume_mic1()
5327 snd_hda_codec_write(codec, spec->adcs[0], 0, in resume_mic1()
5335 static int ca0132_cvoice_switch_set(struct hda_codec *codec) in ca0132_cvoice_switch_set() argument
5337 struct ca0132_spec *spec = codec->spec; in ca0132_cvoice_switch_set()
5339 int i, ret = 0; in ca0132_cvoice_switch_set()
5342 codec_dbg(codec, "ca0132_cvoice_switch_set: val=%ld\n", in ca0132_cvoice_switch_set()
5343 spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID]); in ca0132_cvoice_switch_set()
5345 i = IN_EFFECT_START_NID - EFFECT_START_NID; in ca0132_cvoice_switch_set()
5349 ret |= ca0132_effects_set(codec, nid, spec->effects_switch[i]); in ca0132_cvoice_switch_set()
5352 ret |= ca0132_voicefx_set(codec, (spec->voicefx_val ? 1 : 0)); in ca0132_cvoice_switch_set()
5355 oldval = stop_mic1(codec); in ca0132_cvoice_switch_set()
5357 ret |= ca0132_alt_set_vipsource(codec, 1); in ca0132_cvoice_switch_set()
5359 ret |= ca0132_set_vipsource(codec, 1); in ca0132_cvoice_switch_set()
5360 resume_mic1(codec, oldval); in ca0132_cvoice_switch_set()
5364 static int ca0132_mic_boost_set(struct hda_codec *codec, long val) in ca0132_mic_boost_set() argument
5366 struct ca0132_spec *spec = codec->spec; in ca0132_mic_boost_set()
5367 int ret = 0; in ca0132_mic_boost_set()
5370 ret = snd_hda_codec_amp_update(codec, spec->input_pins[0], 0, in ca0132_mic_boost_set()
5371 HDA_INPUT, 0, HDA_AMP_VOLMASK, 3); in ca0132_mic_boost_set()
5373 ret = snd_hda_codec_amp_update(codec, spec->input_pins[0], 0, in ca0132_mic_boost_set()
5374 HDA_INPUT, 0, HDA_AMP_VOLMASK, 0); in ca0132_mic_boost_set()
5379 static int ca0132_alt_mic_boost_set(struct hda_codec *codec, long val) in ca0132_alt_mic_boost_set() argument
5381 struct ca0132_spec *spec = codec->spec; in ca0132_alt_mic_boost_set()
5382 int ret = 0; in ca0132_alt_mic_boost_set()
5384 ret = snd_hda_codec_amp_update(codec, spec->input_pins[0], 0, in ca0132_alt_mic_boost_set()
5385 HDA_INPUT, 0, HDA_AMP_VOLMASK, val); in ca0132_alt_mic_boost_set()
5389 static int ae5_headphone_gain_set(struct hda_codec *codec, long val) in ae5_headphone_gain_set() argument
5393 for (i = 0; i < 4; i++) in ae5_headphone_gain_set()
5394 ca0113_mmio_command_set(codec, 0x48, 0x11 + i, in ae5_headphone_gain_set()
5396 return 0; in ae5_headphone_gain_set()
5403 static int zxr_headphone_gain_set(struct hda_codec *codec, long val) in zxr_headphone_gain_set() argument
5405 ca0113_mmio_gpio_set(codec, 1, val); in zxr_headphone_gain_set()
5407 return 0; in zxr_headphone_gain_set()
5413 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_vnode_switch_set() local
5415 hda_nid_t shared_nid = 0; in ca0132_vnode_switch_set()
5417 int ret = 0; in ca0132_vnode_switch_set()
5418 struct ca0132_spec *spec = codec->spec; in ca0132_vnode_switch_set()
5423 spec->vnode_lswitch[VNID_HP_ASEL - VNODE_START_NID]; in ca0132_vnode_switch_set()
5426 ca0132_alt_select_out(codec); in ca0132_vnode_switch_set()
5428 ca0132_select_out(codec); in ca0132_vnode_switch_set()
5435 spec->vnode_lswitch[VNID_AMIC1_ASEL - VNODE_START_NID]; in ca0132_vnode_switch_set()
5437 ca0132_select_mic(codec); in ca0132_vnode_switch_set()
5443 ca0132_alt_select_out(codec); in ca0132_vnode_switch_set()
5445 ca0132_select_out(codec); in ca0132_vnode_switch_set()
5450 ca0132_select_mic(codec); in ca0132_vnode_switch_set()
5455 effective = ca0132_is_vnode_effective(codec, nid, &shared_nid); in ca0132_vnode_switch_set()
5461 mutex_lock(&codec->control_mutex); in ca0132_vnode_switch_set()
5462 pval = kcontrol->private_value; in ca0132_vnode_switch_set()
5463 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(shared_nid, ch, in ca0132_vnode_switch_set()
5464 0, dir); in ca0132_vnode_switch_set()
5466 kcontrol->private_value = pval; in ca0132_vnode_switch_set()
5467 mutex_unlock(&codec->control_mutex); in ca0132_vnode_switch_set()
5474 static void ca0132_alt_bass_redirection_xover_set(struct hda_codec *codec, in ca0132_alt_bass_redirection_xover_set() argument
5477 snd_hda_power_up(codec); in ca0132_alt_bass_redirection_xover_set()
5479 dspio_set_param(codec, 0x96, 0x20, SPEAKER_BASS_REDIRECT_XOVER_FREQ, in ca0132_alt_bass_redirection_xover_set()
5482 snd_hda_power_down(codec); in ca0132_alt_bass_redirection_xover_set()
5494 static int ca0132_alt_slider_ctl_set(struct hda_codec *codec, hda_nid_t nid, in ca0132_alt_slider_ctl_set() argument
5497 int i = 0; in ca0132_alt_slider_ctl_set()
5508 snd_hda_power_up(codec); in ca0132_alt_slider_ctl_set()
5510 for (i = 0; i < OUT_EFFECTS_COUNT; i++) in ca0132_alt_slider_ctl_set()
5514 dspio_set_param(codec, ca0132_effects[i].mid, 0x20, in ca0132_alt_slider_ctl_set()
5516 &(lookup[idx - 1]), sizeof(unsigned int)); in ca0132_alt_slider_ctl_set()
5519 for (i = 0; i < OUT_EFFECTS_COUNT; i++) in ca0132_alt_slider_ctl_set()
5523 dspio_set_param(codec, ca0132_effects[i].mid, 0x20, in ca0132_alt_slider_ctl_set()
5528 snd_hda_power_down(codec); in ca0132_alt_slider_ctl_set()
5530 return 0; in ca0132_alt_slider_ctl_set()
5536 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_xbass_xover_slider_ctl_get() local
5537 struct ca0132_spec *spec = codec->spec; in ca0132_alt_xbass_xover_slider_ctl_get()
5538 long *valp = ucontrol->value.integer.value; in ca0132_alt_xbass_xover_slider_ctl_get()
5542 *valp = spec->bass_redirect_xover_freq; in ca0132_alt_xbass_xover_slider_ctl_get()
5544 *valp = spec->xbass_xover_freq; in ca0132_alt_xbass_xover_slider_ctl_get()
5546 return 0; in ca0132_alt_xbass_xover_slider_ctl_get()
5552 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_slider_ctl_get() local
5553 struct ca0132_spec *spec = codec->spec; in ca0132_alt_slider_ctl_get()
5555 long *valp = ucontrol->value.integer.value; in ca0132_alt_slider_ctl_get()
5556 int idx = nid - OUT_EFFECT_START_NID; in ca0132_alt_slider_ctl_get()
5558 *valp = spec->fx_ctl_val[idx]; in ca0132_alt_slider_ctl_get()
5559 return 0; in ca0132_alt_slider_ctl_get()
5563 * The X-bass crossover starts at 10hz, so the min is 1. The
5569 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in ca0132_alt_xbass_xover_slider_info()
5570 uinfo->count = 1; in ca0132_alt_xbass_xover_slider_info()
5571 uinfo->value.integer.min = 1; in ca0132_alt_xbass_xover_slider_info()
5572 uinfo->value.integer.max = 100; in ca0132_alt_xbass_xover_slider_info()
5573 uinfo->value.integer.step = 1; in ca0132_alt_xbass_xover_slider_info()
5575 return 0; in ca0132_alt_xbass_xover_slider_info()
5583 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in ca0132_alt_effect_slider_info()
5584 uinfo->count = chs == 3 ? 2 : 1; in ca0132_alt_effect_slider_info()
5585 uinfo->value.integer.min = 0; in ca0132_alt_effect_slider_info()
5586 uinfo->value.integer.max = 100; in ca0132_alt_effect_slider_info()
5587 uinfo->value.integer.step = 1; in ca0132_alt_effect_slider_info()
5589 return 0; in ca0132_alt_effect_slider_info()
5595 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_xbass_xover_slider_put() local
5596 struct ca0132_spec *spec = codec->spec; in ca0132_alt_xbass_xover_slider_put()
5598 long *valp = ucontrol->value.integer.value; in ca0132_alt_xbass_xover_slider_put()
5603 cur_val = &spec->bass_redirect_xover_freq; in ca0132_alt_xbass_xover_slider_put()
5605 cur_val = &spec->xbass_xover_freq; in ca0132_alt_xbass_xover_slider_put()
5609 return 0; in ca0132_alt_xbass_xover_slider_put()
5615 ca0132_alt_bass_redirection_xover_set(codec, *cur_val); in ca0132_alt_xbass_xover_slider_put()
5617 ca0132_alt_slider_ctl_set(codec, nid, float_xbass_xover_lookup, idx); in ca0132_alt_xbass_xover_slider_put()
5619 return 0; in ca0132_alt_xbass_xover_slider_put()
5625 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_effect_slider_put() local
5626 struct ca0132_spec *spec = codec->spec; in ca0132_alt_effect_slider_put()
5628 long *valp = ucontrol->value.integer.value; in ca0132_alt_effect_slider_put()
5631 idx = nid - EFFECT_START_NID; in ca0132_alt_effect_slider_put()
5633 if (spec->fx_ctl_val[idx] == *valp) in ca0132_alt_effect_slider_put()
5634 return 0; in ca0132_alt_effect_slider_put()
5636 spec->fx_ctl_val[idx] = *valp; in ca0132_alt_effect_slider_put()
5639 ca0132_alt_slider_ctl_set(codec, nid, float_zero_to_one_lookup, idx); in ca0132_alt_effect_slider_put()
5641 return 0; in ca0132_alt_effect_slider_put()
5648 * traditional 0-100 in alsamixer that goes in big steps. I like enum better.
5659 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ca0132_alt_mic_boost_info()
5660 uinfo->count = 1; in ca0132_alt_mic_boost_info()
5661 uinfo->value.enumerated.items = MIC_BOOST_NUM_OF_STEPS; in ca0132_alt_mic_boost_info()
5662 if (uinfo->value.enumerated.item >= MIC_BOOST_NUM_OF_STEPS) in ca0132_alt_mic_boost_info()
5663 uinfo->value.enumerated.item = MIC_BOOST_NUM_OF_STEPS - 1; in ca0132_alt_mic_boost_info()
5664 sprintf(namestr, "%d %s", (uinfo->value.enumerated.item * 10), sfx); in ca0132_alt_mic_boost_info()
5665 strcpy(uinfo->value.enumerated.name, namestr); in ca0132_alt_mic_boost_info()
5666 return 0; in ca0132_alt_mic_boost_info()
5672 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_mic_boost_get() local
5673 struct ca0132_spec *spec = codec->spec; in ca0132_alt_mic_boost_get()
5675 ucontrol->value.enumerated.item[0] = spec->mic_boost_enum_val; in ca0132_alt_mic_boost_get()
5676 return 0; in ca0132_alt_mic_boost_get()
5682 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_mic_boost_put() local
5683 struct ca0132_spec *spec = codec->spec; in ca0132_alt_mic_boost_put()
5684 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_mic_boost_put()
5688 return 0; in ca0132_alt_mic_boost_put()
5690 codec_dbg(codec, "ca0132_alt_mic_boost: boost=%d\n", in ca0132_alt_mic_boost_put()
5693 spec->mic_boost_enum_val = sel; in ca0132_alt_mic_boost_put()
5695 if (spec->in_enum_val != REAR_LINE_IN) in ca0132_alt_mic_boost_put()
5696 ca0132_alt_mic_boost_set(codec, spec->mic_boost_enum_val); in ca0132_alt_mic_boost_put()
5702 * Sound BlasterX AE-5 Headphone Gain Controls.
5711 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ae5_headphone_gain_info()
5712 uinfo->count = 1; in ae5_headphone_gain_info()
5713 uinfo->value.enumerated.items = AE5_HEADPHONE_GAIN_MAX; in ae5_headphone_gain_info()
5714 if (uinfo->value.enumerated.item >= AE5_HEADPHONE_GAIN_MAX) in ae5_headphone_gain_info()
5715 uinfo->value.enumerated.item = AE5_HEADPHONE_GAIN_MAX - 1; in ae5_headphone_gain_info()
5717 ae5_headphone_gain_presets[uinfo->value.enumerated.item].name, in ae5_headphone_gain_info()
5719 strcpy(uinfo->value.enumerated.name, namestr); in ae5_headphone_gain_info()
5720 return 0; in ae5_headphone_gain_info()
5726 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ae5_headphone_gain_get() local
5727 struct ca0132_spec *spec = codec->spec; in ae5_headphone_gain_get()
5729 ucontrol->value.enumerated.item[0] = spec->ae5_headphone_gain_val; in ae5_headphone_gain_get()
5730 return 0; in ae5_headphone_gain_get()
5736 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ae5_headphone_gain_put() local
5737 struct ca0132_spec *spec = codec->spec; in ae5_headphone_gain_put()
5738 int sel = ucontrol->value.enumerated.item[0]; in ae5_headphone_gain_put()
5742 return 0; in ae5_headphone_gain_put()
5744 codec_dbg(codec, "ae5_headphone_gain: boost=%d\n", in ae5_headphone_gain_put()
5747 spec->ae5_headphone_gain_val = sel; in ae5_headphone_gain_put()
5749 if (spec->out_enum_val == HEADPHONE_OUT) in ae5_headphone_gain_put()
5750 ae5_headphone_gain_set(codec, spec->ae5_headphone_gain_val); in ae5_headphone_gain_put()
5756 * Sound BlasterX AE-5 sound filter enumerated control.
5765 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ae5_sound_filter_info()
5766 uinfo->count = 1; in ae5_sound_filter_info()
5767 uinfo->value.enumerated.items = AE5_SOUND_FILTER_MAX; in ae5_sound_filter_info()
5768 if (uinfo->value.enumerated.item >= AE5_SOUND_FILTER_MAX) in ae5_sound_filter_info()
5769 uinfo->value.enumerated.item = AE5_SOUND_FILTER_MAX - 1; in ae5_sound_filter_info()
5771 ae5_filter_presets[uinfo->value.enumerated.item].name); in ae5_sound_filter_info()
5772 strcpy(uinfo->value.enumerated.name, namestr); in ae5_sound_filter_info()
5773 return 0; in ae5_sound_filter_info()
5779 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ae5_sound_filter_get() local
5780 struct ca0132_spec *spec = codec->spec; in ae5_sound_filter_get()
5782 ucontrol->value.enumerated.item[0] = spec->ae5_filter_val; in ae5_sound_filter_get()
5783 return 0; in ae5_sound_filter_get()
5789 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ae5_sound_filter_put() local
5790 struct ca0132_spec *spec = codec->spec; in ae5_sound_filter_put()
5791 int sel = ucontrol->value.enumerated.item[0]; in ae5_sound_filter_put()
5795 return 0; in ae5_sound_filter_put()
5797 codec_dbg(codec, "ae5_sound_filter: %s\n", in ae5_sound_filter_put()
5800 spec->ae5_filter_val = sel; in ae5_sound_filter_put()
5802 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, in ae5_sound_filter_put()
5810 * front microphone has no auto-detect, and we need a way to set the rear
5811 * as line-in
5816 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ca0132_alt_input_source_info()
5817 uinfo->count = 1; in ca0132_alt_input_source_info()
5818 uinfo->value.enumerated.items = IN_SRC_NUM_OF_INPUTS; in ca0132_alt_input_source_info()
5819 if (uinfo->value.enumerated.item >= IN_SRC_NUM_OF_INPUTS) in ca0132_alt_input_source_info()
5820 uinfo->value.enumerated.item = IN_SRC_NUM_OF_INPUTS - 1; in ca0132_alt_input_source_info()
5821 strcpy(uinfo->value.enumerated.name, in ca0132_alt_input_source_info()
5822 in_src_str[uinfo->value.enumerated.item]); in ca0132_alt_input_source_info()
5823 return 0; in ca0132_alt_input_source_info()
5829 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_input_source_get() local
5830 struct ca0132_spec *spec = codec->spec; in ca0132_alt_input_source_get()
5832 ucontrol->value.enumerated.item[0] = spec->in_enum_val; in ca0132_alt_input_source_get()
5833 return 0; in ca0132_alt_input_source_get()
5839 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_input_source_put() local
5840 struct ca0132_spec *spec = codec->spec; in ca0132_alt_input_source_put()
5841 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_input_source_put()
5845 * The AE-7 has no front microphone, so limit items to 2: rear mic and in ca0132_alt_input_source_put()
5846 * line-in. in ca0132_alt_input_source_put()
5852 return 0; in ca0132_alt_input_source_put()
5854 codec_dbg(codec, "ca0132_alt_input_select: sel=%d, preset=%s\n", in ca0132_alt_input_source_put()
5857 spec->in_enum_val = sel; in ca0132_alt_input_source_put()
5859 ca0132_alt_select_in(codec); in ca0132_alt_input_source_put()
5868 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ca0132_alt_output_select_get_info()
5869 uinfo->count = 1; in ca0132_alt_output_select_get_info()
5870 uinfo->value.enumerated.items = NUM_OF_OUTPUTS; in ca0132_alt_output_select_get_info()
5871 if (uinfo->value.enumerated.item >= NUM_OF_OUTPUTS) in ca0132_alt_output_select_get_info()
5872 uinfo->value.enumerated.item = NUM_OF_OUTPUTS - 1; in ca0132_alt_output_select_get_info()
5873 strcpy(uinfo->value.enumerated.name, in ca0132_alt_output_select_get_info()
5874 out_type_str[uinfo->value.enumerated.item]); in ca0132_alt_output_select_get_info()
5875 return 0; in ca0132_alt_output_select_get_info()
5881 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_output_select_get() local
5882 struct ca0132_spec *spec = codec->spec; in ca0132_alt_output_select_get()
5884 ucontrol->value.enumerated.item[0] = spec->out_enum_val; in ca0132_alt_output_select_get()
5885 return 0; in ca0132_alt_output_select_get()
5891 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_output_select_put() local
5892 struct ca0132_spec *spec = codec->spec; in ca0132_alt_output_select_put()
5893 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_output_select_put()
5898 return 0; in ca0132_alt_output_select_put()
5900 codec_dbg(codec, "ca0132_alt_output_select: sel=%d, preset=%s\n", in ca0132_alt_output_select_put()
5903 spec->out_enum_val = sel; in ca0132_alt_output_select_put()
5905 auto_jack = spec->vnode_lswitch[VNID_HP_ASEL - VNODE_START_NID]; in ca0132_alt_output_select_put()
5908 ca0132_alt_select_out(codec); in ca0132_alt_output_select_put()
5919 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ca0132_alt_speaker_channel_cfg_get_info()
5920 uinfo->count = 1; in ca0132_alt_speaker_channel_cfg_get_info()
5921 uinfo->value.enumerated.items = items; in ca0132_alt_speaker_channel_cfg_get_info()
5922 if (uinfo->value.enumerated.item >= items) in ca0132_alt_speaker_channel_cfg_get_info()
5923 uinfo->value.enumerated.item = items - 1; in ca0132_alt_speaker_channel_cfg_get_info()
5924 strcpy(uinfo->value.enumerated.name, in ca0132_alt_speaker_channel_cfg_get_info()
5925 speaker_channel_cfgs[uinfo->value.enumerated.item].name); in ca0132_alt_speaker_channel_cfg_get_info()
5926 return 0; in ca0132_alt_speaker_channel_cfg_get_info()
5932 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_speaker_channel_cfg_get() local
5933 struct ca0132_spec *spec = codec->spec; in ca0132_alt_speaker_channel_cfg_get()
5935 ucontrol->value.enumerated.item[0] = spec->channel_cfg_val; in ca0132_alt_speaker_channel_cfg_get()
5936 return 0; in ca0132_alt_speaker_channel_cfg_get()
5942 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_speaker_channel_cfg_put() local
5943 struct ca0132_spec *spec = codec->spec; in ca0132_alt_speaker_channel_cfg_put()
5944 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_speaker_channel_cfg_put()
5948 return 0; in ca0132_alt_speaker_channel_cfg_put()
5950 codec_dbg(codec, "ca0132_alt_speaker_channels: sel=%d, channels=%s\n", in ca0132_alt_speaker_channel_cfg_put()
5953 spec->channel_cfg_val = sel; in ca0132_alt_speaker_channel_cfg_put()
5955 if (spec->out_enum_val == SPEAKER_OUT) in ca0132_alt_speaker_channel_cfg_put()
5956 ca0132_alt_select_out(codec); in ca0132_alt_speaker_channel_cfg_put()
5972 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ca0132_alt_svm_setting_info()
5973 uinfo->count = 1; in ca0132_alt_svm_setting_info()
5974 uinfo->value.enumerated.items = NUM_OF_SVM_SETTINGS; in ca0132_alt_svm_setting_info()
5975 if (uinfo->value.enumerated.item >= NUM_OF_SVM_SETTINGS) in ca0132_alt_svm_setting_info()
5976 uinfo->value.enumerated.item = NUM_OF_SVM_SETTINGS - 1; in ca0132_alt_svm_setting_info()
5977 strcpy(uinfo->value.enumerated.name, in ca0132_alt_svm_setting_info()
5978 out_svm_set_enum_str[uinfo->value.enumerated.item]); in ca0132_alt_svm_setting_info()
5979 return 0; in ca0132_alt_svm_setting_info()
5985 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_svm_setting_get() local
5986 struct ca0132_spec *spec = codec->spec; in ca0132_alt_svm_setting_get()
5988 ucontrol->value.enumerated.item[0] = spec->smart_volume_setting; in ca0132_alt_svm_setting_get()
5989 return 0; in ca0132_alt_svm_setting_get()
5995 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_svm_setting_put() local
5996 struct ca0132_spec *spec = codec->spec; in ca0132_alt_svm_setting_put()
5997 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_svm_setting_put()
5999 unsigned int idx = SMART_VOLUME - EFFECT_START_NID; in ca0132_alt_svm_setting_put()
6003 return 0; in ca0132_alt_svm_setting_put()
6005 codec_dbg(codec, "ca0132_alt_svm_setting: sel=%d, preset=%s\n", in ca0132_alt_svm_setting_put()
6008 spec->smart_volume_setting = sel; in ca0132_alt_svm_setting_put()
6011 case 0: in ca0132_alt_svm_setting_put()
6025 dspio_set_uint_param(codec, ca0132_effects[idx].mid, in ca0132_alt_svm_setting_put()
6036 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ca0132_alt_eq_preset_info()
6037 uinfo->count = 1; in ca0132_alt_eq_preset_info()
6038 uinfo->value.enumerated.items = items; in ca0132_alt_eq_preset_info()
6039 if (uinfo->value.enumerated.item >= items) in ca0132_alt_eq_preset_info()
6040 uinfo->value.enumerated.item = items - 1; in ca0132_alt_eq_preset_info()
6041 strcpy(uinfo->value.enumerated.name, in ca0132_alt_eq_preset_info()
6042 ca0132_alt_eq_presets[uinfo->value.enumerated.item].name); in ca0132_alt_eq_preset_info()
6043 return 0; in ca0132_alt_eq_preset_info()
6049 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_eq_preset_get() local
6050 struct ca0132_spec *spec = codec->spec; in ca0132_alt_eq_preset_get()
6052 ucontrol->value.enumerated.item[0] = spec->eq_preset_val; in ca0132_alt_eq_preset_get()
6053 return 0; in ca0132_alt_eq_preset_get()
6059 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_eq_preset_put() local
6060 struct ca0132_spec *spec = codec->spec; in ca0132_alt_eq_preset_put()
6061 int i, err = 0; in ca0132_alt_eq_preset_put()
6062 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_eq_preset_put()
6066 return 0; in ca0132_alt_eq_preset_put()
6068 codec_dbg(codec, "%s: sel=%d, preset=%s\n", __func__, sel, in ca0132_alt_eq_preset_put()
6071 * Idx 0 is default. in ca0132_alt_eq_preset_put()
6074 for (i = 0; i < EQ_PRESET_MAX_PARAM_COUNT; i++) { in ca0132_alt_eq_preset_put()
6075 err = dspio_set_uint_param(codec, ca0132_alt_eq_enum.mid, in ca0132_alt_eq_preset_put()
6078 if (err < 0) in ca0132_alt_eq_preset_put()
6082 if (err >= 0) in ca0132_alt_eq_preset_put()
6083 spec->eq_preset_val = sel; in ca0132_alt_eq_preset_put()
6093 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; in ca0132_voicefx_info()
6094 uinfo->count = 1; in ca0132_voicefx_info()
6095 uinfo->value.enumerated.items = items; in ca0132_voicefx_info()
6096 if (uinfo->value.enumerated.item >= items) in ca0132_voicefx_info()
6097 uinfo->value.enumerated.item = items - 1; in ca0132_voicefx_info()
6098 strcpy(uinfo->value.enumerated.name, in ca0132_voicefx_info()
6099 ca0132_voicefx_presets[uinfo->value.enumerated.item].name); in ca0132_voicefx_info()
6100 return 0; in ca0132_voicefx_info()
6106 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_voicefx_get() local
6107 struct ca0132_spec *spec = codec->spec; in ca0132_voicefx_get()
6109 ucontrol->value.enumerated.item[0] = spec->voicefx_val; in ca0132_voicefx_get()
6110 return 0; in ca0132_voicefx_get()
6116 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_voicefx_put() local
6117 struct ca0132_spec *spec = codec->spec; in ca0132_voicefx_put()
6118 int i, err = 0; in ca0132_voicefx_put()
6119 int sel = ucontrol->value.enumerated.item[0]; in ca0132_voicefx_put()
6122 return 0; in ca0132_voicefx_put()
6124 codec_dbg(codec, "ca0132_voicefx_put: sel=%d, preset=%s\n", in ca0132_voicefx_put()
6128 * Idx 0 is default. in ca0132_voicefx_put()
6131 for (i = 0; i < VOICEFX_MAX_PARAM_COUNT; i++) { in ca0132_voicefx_put()
6132 err = dspio_set_uint_param(codec, ca0132_voicefx.mid, in ca0132_voicefx_put()
6135 if (err < 0) in ca0132_voicefx_put()
6139 if (err >= 0) { in ca0132_voicefx_put()
6140 spec->voicefx_val = sel; in ca0132_voicefx_put()
6142 ca0132_voicefx_set(codec, (sel ? 1 : 0)); in ca0132_voicefx_put()
6151 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_switch_get() local
6152 struct ca0132_spec *spec = codec->spec; in ca0132_switch_get()
6155 long *valp = ucontrol->value.integer.value; in ca0132_switch_get()
6160 *valp = spec->vnode_lswitch[nid - VNODE_START_NID]; in ca0132_switch_get()
6164 *valp = spec->vnode_rswitch[nid - VNODE_START_NID]; in ca0132_switch_get()
6167 return 0; in ca0132_switch_get()
6172 *valp = spec->effects_switch[nid - EFFECT_START_NID]; in ca0132_switch_get()
6173 return 0; in ca0132_switch_get()
6177 if (nid == spec->input_pins[0]) { in ca0132_switch_get()
6178 *valp = spec->cur_mic_boost; in ca0132_switch_get()
6179 return 0; in ca0132_switch_get()
6183 *valp = spec->zxr_gain_set; in ca0132_switch_get()
6184 return 0; in ca0132_switch_get()
6188 *valp = spec->speaker_range_val[nid - SPEAKER_FULL_RANGE_FRONT]; in ca0132_switch_get()
6189 return 0; in ca0132_switch_get()
6193 *valp = spec->bass_redirection_val; in ca0132_switch_get()
6194 return 0; in ca0132_switch_get()
6197 return 0; in ca0132_switch_get()
6203 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_switch_put() local
6204 struct ca0132_spec *spec = codec->spec; in ca0132_switch_put()
6207 long *valp = ucontrol->value.integer.value; in ca0132_switch_put()
6210 codec_dbg(codec, "ca0132_switch_put: nid=0x%x, val=%ld\n", in ca0132_switch_put()
6213 snd_hda_power_up(codec); in ca0132_switch_put()
6217 spec->vnode_lswitch[nid - VNODE_START_NID] = *valp; in ca0132_switch_put()
6221 spec->vnode_rswitch[nid - VNODE_START_NID] = *valp; in ca0132_switch_put()
6230 spec->effects_switch[nid - EFFECT_START_NID] = *valp; in ca0132_switch_put()
6231 changed = ca0132_pe_switch_set(codec); in ca0132_switch_put()
6237 spec->effects_switch[nid - EFFECT_START_NID] = *valp; in ca0132_switch_put()
6238 changed = ca0132_cvoice_switch_set(codec); in ca0132_switch_put()
6245 spec->effects_switch[nid - EFFECT_START_NID] = *valp; in ca0132_switch_put()
6246 changed = ca0132_effects_set(codec, nid, *valp); in ca0132_switch_put()
6251 if (nid == spec->input_pins[0]) { in ca0132_switch_put()
6252 spec->cur_mic_boost = *valp; in ca0132_switch_put()
6254 if (spec->in_enum_val != REAR_LINE_IN) in ca0132_switch_put()
6255 changed = ca0132_mic_boost_set(codec, *valp); in ca0132_switch_put()
6258 if (spec->cur_mic_type != DIGITAL_MIC) in ca0132_switch_put()
6259 changed = ca0132_mic_boost_set(codec, *valp); in ca0132_switch_put()
6266 spec->zxr_gain_set = *valp; in ca0132_switch_put()
6267 if (spec->cur_out_type == HEADPHONE_OUT) in ca0132_switch_put()
6268 changed = zxr_headphone_gain_set(codec, *valp); in ca0132_switch_put()
6270 changed = 0; in ca0132_switch_put()
6276 spec->speaker_range_val[nid - SPEAKER_FULL_RANGE_FRONT] = *valp; in ca0132_switch_put()
6277 if (spec->cur_out_type == SPEAKER_OUT) in ca0132_switch_put()
6278 ca0132_alt_set_full_range_speaker(codec); in ca0132_switch_put()
6280 changed = 0; in ca0132_switch_put()
6284 spec->bass_redirection_val = *valp; in ca0132_switch_put()
6285 if (spec->cur_out_type == SPEAKER_OUT) in ca0132_switch_put()
6286 ca0132_alt_surround_set_bass_redirection(codec, *valp); in ca0132_switch_put()
6288 changed = 0; in ca0132_switch_put()
6292 snd_hda_power_down(codec); in ca0132_switch_put()
6304 static void ca0132_alt_dsp_volume_put(struct hda_codec *codec, hda_nid_t nid) in ca0132_alt_dsp_volume_put() argument
6306 struct ca0132_spec *spec = codec->spec; in ca0132_alt_dsp_volume_put()
6315 lookup_val = spec->vnode_lvol[nid - VNODE_START_NID]; in ca0132_alt_dsp_volume_put()
6317 dspio_set_uint_param(codec, in ca0132_alt_dsp_volume_put()
6319 ca0132_alt_vol_ctls[dsp_dir].reqs[0], in ca0132_alt_dsp_volume_put()
6322 lookup_val = spec->vnode_rvol[nid - VNODE_START_NID]; in ca0132_alt_dsp_volume_put()
6324 dspio_set_uint_param(codec, in ca0132_alt_dsp_volume_put()
6329 dspio_set_uint_param(codec, in ca0132_alt_dsp_volume_put()
6337 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_volume_info() local
6338 struct ca0132_spec *spec = codec->spec; in ca0132_volume_info()
6348 nid = spec->shared_out_nid; in ca0132_volume_info()
6349 mutex_lock(&codec->control_mutex); in ca0132_volume_info()
6350 pval = kcontrol->private_value; in ca0132_volume_info()
6351 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir); in ca0132_volume_info()
6353 kcontrol->private_value = pval; in ca0132_volume_info()
6354 mutex_unlock(&codec->control_mutex); in ca0132_volume_info()
6358 nid = spec->shared_mic_nid; in ca0132_volume_info()
6359 mutex_lock(&codec->control_mutex); in ca0132_volume_info()
6360 pval = kcontrol->private_value; in ca0132_volume_info()
6361 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir); in ca0132_volume_info()
6363 kcontrol->private_value = pval; in ca0132_volume_info()
6364 mutex_unlock(&codec->control_mutex); in ca0132_volume_info()
6375 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_volume_get() local
6376 struct ca0132_spec *spec = codec->spec; in ca0132_volume_get()
6379 long *valp = ucontrol->value.integer.value; in ca0132_volume_get()
6383 *valp = spec->vnode_lvol[nid - VNODE_START_NID]; in ca0132_volume_get()
6387 *valp = spec->vnode_rvol[nid - VNODE_START_NID]; in ca0132_volume_get()
6390 return 0; in ca0132_volume_get()
6396 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_volume_put() local
6397 struct ca0132_spec *spec = codec->spec; in ca0132_volume_put()
6400 long *valp = ucontrol->value.integer.value; in ca0132_volume_put()
6401 hda_nid_t shared_nid = 0; in ca0132_volume_put()
6407 spec->vnode_lvol[nid - VNODE_START_NID] = *valp; in ca0132_volume_put()
6411 spec->vnode_rvol[nid - VNODE_START_NID] = *valp; in ca0132_volume_put()
6416 effective = ca0132_is_vnode_effective(codec, nid, &shared_nid); in ca0132_volume_put()
6421 snd_hda_power_up(codec); in ca0132_volume_put()
6422 mutex_lock(&codec->control_mutex); in ca0132_volume_put()
6423 pval = kcontrol->private_value; in ca0132_volume_put()
6424 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(shared_nid, ch, in ca0132_volume_put()
6425 0, dir); in ca0132_volume_put()
6427 kcontrol->private_value = pval; in ca0132_volume_put()
6428 mutex_unlock(&codec->control_mutex); in ca0132_volume_put()
6429 snd_hda_power_down(codec); in ca0132_volume_put()
6443 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_alt_volume_put() local
6444 struct ca0132_spec *spec = codec->spec; in ca0132_alt_volume_put()
6447 long *valp = ucontrol->value.integer.value; in ca0132_alt_volume_put()
6448 hda_nid_t vnid = 0; in ca0132_alt_volume_put()
6452 case 0x02: in ca0132_alt_volume_put()
6455 case 0x07: in ca0132_alt_volume_put()
6462 spec->vnode_lvol[vnid - VNODE_START_NID] = *valp; in ca0132_alt_volume_put()
6466 spec->vnode_rvol[vnid - VNODE_START_NID] = *valp; in ca0132_alt_volume_put()
6470 snd_hda_power_up(codec); in ca0132_alt_volume_put()
6471 ca0132_alt_dsp_volume_put(codec, vnid); in ca0132_alt_volume_put()
6472 mutex_lock(&codec->control_mutex); in ca0132_alt_volume_put()
6474 mutex_unlock(&codec->control_mutex); in ca0132_alt_volume_put()
6475 snd_hda_power_down(codec); in ca0132_alt_volume_put()
6483 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in ca0132_volume_tlv() local
6484 struct ca0132_spec *spec = codec->spec; in ca0132_volume_tlv()
6494 nid = spec->shared_out_nid; in ca0132_volume_tlv()
6495 mutex_lock(&codec->control_mutex); in ca0132_volume_tlv()
6496 pval = kcontrol->private_value; in ca0132_volume_tlv()
6497 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir); in ca0132_volume_tlv()
6499 kcontrol->private_value = pval; in ca0132_volume_tlv()
6500 mutex_unlock(&codec->control_mutex); in ca0132_volume_tlv()
6504 nid = spec->shared_mic_nid; in ca0132_volume_tlv()
6505 mutex_lock(&codec->control_mutex); in ca0132_volume_tlv()
6506 pval = kcontrol->private_value; in ca0132_volume_tlv()
6507 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir); in ca0132_volume_tlv()
6509 kcontrol->private_value = pval; in ca0132_volume_tlv()
6510 mutex_unlock(&codec->control_mutex); in ca0132_volume_tlv()
6519 static int ca0132_alt_add_effect_slider(struct hda_codec *codec, hda_nid_t nid, in ca0132_alt_add_effect_slider() argument
6525 HDA_CODEC_VOLUME_MONO(namestr, nid, 1, 0, type); in ca0132_alt_add_effect_slider()
6542 HDA_COMPOSE_AMP_VAL(nid, 1, 0, type); in ca0132_alt_add_effect_slider()
6546 return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec)); in ca0132_alt_add_effect_slider()
6554 static int add_fx_switch(struct hda_codec *codec, hda_nid_t nid, in add_fx_switch() argument
6557 struct ca0132_spec *spec = codec->spec; in add_fx_switch()
6570 return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec)); in add_fx_switch()
6573 static int add_voicefx(struct hda_codec *codec) in add_voicefx() argument
6577 VOICEFX, 1, 0, HDA_INPUT); in add_voicefx()
6581 return snd_hda_ctl_add(codec, VOICEFX, snd_ctl_new1(&knew, codec)); in add_voicefx()
6585 static int add_ca0132_alt_eq_presets(struct hda_codec *codec) in add_ca0132_alt_eq_presets() argument
6589 EQ_PRESET_ENUM, 1, 0, HDA_OUTPUT); in add_ca0132_alt_eq_presets()
6593 return snd_hda_ctl_add(codec, EQ_PRESET_ENUM, in add_ca0132_alt_eq_presets()
6594 snd_ctl_new1(&knew, codec)); in add_ca0132_alt_eq_presets()
6602 static int ca0132_alt_add_svm_enum(struct hda_codec *codec) in ca0132_alt_add_svm_enum() argument
6606 SMART_VOLUME_ENUM, 1, 0, HDA_OUTPUT); in ca0132_alt_add_svm_enum()
6610 return snd_hda_ctl_add(codec, SMART_VOLUME_ENUM, in ca0132_alt_add_svm_enum()
6611 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_svm_enum()
6619 static int ca0132_alt_add_output_enum(struct hda_codec *codec) in ca0132_alt_add_output_enum() argument
6623 OUTPUT_SOURCE_ENUM, 1, 0, HDA_OUTPUT); in ca0132_alt_add_output_enum()
6627 return snd_hda_ctl_add(codec, OUTPUT_SOURCE_ENUM, in ca0132_alt_add_output_enum()
6628 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_output_enum()
6636 static int ca0132_alt_add_speaker_channel_cfg_enum(struct hda_codec *codec) in ca0132_alt_add_speaker_channel_cfg_enum() argument
6640 SPEAKER_CHANNEL_CFG_ENUM, 1, 0, HDA_OUTPUT); in ca0132_alt_add_speaker_channel_cfg_enum()
6644 return snd_hda_ctl_add(codec, SPEAKER_CHANNEL_CFG_ENUM, in ca0132_alt_add_speaker_channel_cfg_enum()
6645 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_speaker_channel_cfg_enum()
6653 static int ca0132_alt_add_front_full_range_switch(struct hda_codec *codec) in ca0132_alt_add_front_full_range_switch() argument
6656 CA0132_CODEC_MUTE_MONO("Full-Range Front Speakers", in ca0132_alt_add_front_full_range_switch()
6659 return snd_hda_ctl_add(codec, SPEAKER_FULL_RANGE_FRONT, in ca0132_alt_add_front_full_range_switch()
6660 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_front_full_range_switch()
6663 static int ca0132_alt_add_rear_full_range_switch(struct hda_codec *codec) in ca0132_alt_add_rear_full_range_switch() argument
6666 CA0132_CODEC_MUTE_MONO("Full-Range Rear Speakers", in ca0132_alt_add_rear_full_range_switch()
6669 return snd_hda_ctl_add(codec, SPEAKER_FULL_RANGE_REAR, in ca0132_alt_add_rear_full_range_switch()
6670 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_rear_full_range_switch()
6675 * channel on speakers that are set as not being full-range. On configurations
6677 * replacement for X-Bass on configurations with an LFE channel.
6679 static int ca0132_alt_add_bass_redirection_crossover(struct hda_codec *codec) in ca0132_alt_add_bass_redirection_crossover() argument
6683 HDA_CODEC_VOLUME_MONO(namestr, BASS_REDIRECTION_XOVER, 1, 0, in ca0132_alt_add_bass_redirection_crossover()
6691 return snd_hda_ctl_add(codec, BASS_REDIRECTION_XOVER, in ca0132_alt_add_bass_redirection_crossover()
6692 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_bass_redirection_crossover()
6695 static int ca0132_alt_add_bass_redirection_switch(struct hda_codec *codec) in ca0132_alt_add_bass_redirection_switch() argument
6702 return snd_hda_ctl_add(codec, BASS_REDIRECTION, in ca0132_alt_add_bass_redirection_switch()
6703 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_bass_redirection_switch()
6708 * because the front microphone has no auto-detect, and Line-in has to be set
6711 static int ca0132_alt_add_input_enum(struct hda_codec *codec) in ca0132_alt_add_input_enum() argument
6715 INPUT_SOURCE_ENUM, 1, 0, HDA_INPUT); in ca0132_alt_add_input_enum()
6719 return snd_hda_ctl_add(codec, INPUT_SOURCE_ENUM, in ca0132_alt_add_input_enum()
6720 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_input_enum()
6724 * Add mic boost enumerated control. Switches through 0dB to 30dB. This adds
6727 static int ca0132_alt_add_mic_boost_enum(struct hda_codec *codec) in ca0132_alt_add_mic_boost_enum() argument
6731 MIC_BOOST_ENUM, 1, 0, HDA_INPUT); in ca0132_alt_add_mic_boost_enum()
6735 return snd_hda_ctl_add(codec, MIC_BOOST_ENUM, in ca0132_alt_add_mic_boost_enum()
6736 snd_ctl_new1(&knew, codec)); in ca0132_alt_add_mic_boost_enum()
6741 * Add headphone gain enumerated control for the AE-5. This switches between
6742 * three modes, low, medium, and high. When non-headphone outputs are selected,
6745 static int ae5_add_headphone_gain_enum(struct hda_codec *codec) in ae5_add_headphone_gain_enum() argument
6748 HDA_CODEC_MUTE_MONO("AE-5: Headphone Gain", in ae5_add_headphone_gain_enum()
6749 AE5_HEADPHONE_GAIN_ENUM, 1, 0, HDA_OUTPUT); in ae5_add_headphone_gain_enum()
6753 return snd_hda_ctl_add(codec, AE5_HEADPHONE_GAIN_ENUM, in ae5_add_headphone_gain_enum()
6754 snd_ctl_new1(&knew, codec)); in ae5_add_headphone_gain_enum()
6758 * Add sound filter enumerated control for the AE-5. This adds three different
6762 static int ae5_add_sound_filter_enum(struct hda_codec *codec) in ae5_add_sound_filter_enum() argument
6765 HDA_CODEC_MUTE_MONO("AE-5: Sound Filter", in ae5_add_sound_filter_enum()
6766 AE5_SOUND_FILTER_ENUM, 1, 0, HDA_OUTPUT); in ae5_add_sound_filter_enum()
6770 return snd_hda_ctl_add(codec, AE5_SOUND_FILTER_ENUM, in ae5_add_sound_filter_enum()
6771 snd_ctl_new1(&knew, codec)); in ae5_add_sound_filter_enum()
6774 static int zxr_add_headphone_gain_switch(struct hda_codec *codec) in zxr_add_headphone_gain_switch() argument
6780 return snd_hda_ctl_add(codec, ZXR_HEADPHONE_GAIN, in zxr_add_headphone_gain_switch()
6781 snd_ctl_new1(&knew, codec)); in zxr_add_headphone_gain_switch()
6794 * I think this has to do with the pin for rear surround being 0x11,
6795 * and the center/lfe being 0x10. Usually the pin order is the opposite.
6811 static void ca0132_alt_add_chmap_ctls(struct hda_codec *codec) in ca0132_alt_add_chmap_ctls() argument
6813 int err = 0; in ca0132_alt_add_chmap_ctls()
6816 list_for_each_entry(pcm, &codec->pcm_list_head, list) { in ca0132_alt_add_chmap_ctls()
6818 &pcm->stream[SNDRV_PCM_STREAM_PLAYBACK]; in ca0132_alt_add_chmap_ctls()
6823 if (hinfo->channels_max == 6) { in ca0132_alt_add_chmap_ctls()
6824 err = snd_pcm_add_chmap_ctls(pcm->pcm, in ca0132_alt_add_chmap_ctls()
6826 elem, hinfo->channels_max, 0, &chmap); in ca0132_alt_add_chmap_ctls()
6827 if (err < 0) in ca0132_alt_add_chmap_ctls()
6828 codec_dbg(codec, "snd_pcm_add_chmap_ctls failed!"); in ca0132_alt_add_chmap_ctls()
6842 HDA_CODEC_VOLUME("Analog-Mic2 Capture Volume", 0x08, 0, HDA_INPUT),
6843 HDA_CODEC_MUTE("Analog-Mic2 Capture Switch", 0x08, 0, HDA_INPUT),
6844 HDA_CODEC_VOLUME("What U Hear Capture Volume", 0x0a, 0, HDA_INPUT),
6845 HDA_CODEC_MUTE("What U Hear Capture Switch", 0x0a, 0, HDA_INPUT),
6846 CA0132_CODEC_MUTE_MONO("Mic1-Boost (30dB) Capture Switch",
6847 0x12, 1, HDA_INPUT),
6860 * Desktop specific control mixer. Removes auto-detect for mic, and adds
6865 CA0132_ALT_CODEC_VOL("Front Playback Volume", 0x02, HDA_OUTPUT),
6867 HDA_CODEC_VOLUME("Surround Playback Volume", 0x04, 0, HDA_OUTPUT),
6868 HDA_CODEC_MUTE("Surround Playback Switch", 0x04, 0, HDA_OUTPUT),
6869 HDA_CODEC_VOLUME_MONO("Center Playback Volume", 0x03, 1, 0, HDA_OUTPUT),
6870 HDA_CODEC_MUTE_MONO("Center Playback Switch", 0x03, 1, 0, HDA_OUTPUT),
6871 HDA_CODEC_VOLUME_MONO("LFE Playback Volume", 0x03, 2, 0, HDA_OUTPUT),
6872 HDA_CODEC_MUTE_MONO("LFE Playback Switch", 0x03, 2, 0, HDA_OUTPUT),
6873 CA0132_ALT_CODEC_VOL("Capture Volume", 0x07, HDA_INPUT),
6875 HDA_CODEC_VOLUME("What U Hear Capture Volume", 0x0a, 0, HDA_INPUT),
6876 HDA_CODEC_MUTE("What U Hear Capture Switch", 0x0a, 0, HDA_INPUT),
6887 CA0132_ALT_CODEC_VOL("Front Playback Volume", 0x02, HDA_OUTPUT),
6889 HDA_CODEC_VOLUME("Surround Playback Volume", 0x04, 0, HDA_OUTPUT),
6890 HDA_CODEC_MUTE("Surround Playback Switch", 0x04, 0, HDA_OUTPUT),
6891 HDA_CODEC_VOLUME_MONO("Center Playback Volume", 0x03, 1, 0, HDA_OUTPUT),
6892 HDA_CODEC_MUTE_MONO("Center Playback Switch", 0x03, 1, 0, HDA_OUTPUT),
6893 HDA_CODEC_VOLUME_MONO("LFE Playback Volume", 0x03, 2, 0, HDA_OUTPUT),
6894 HDA_CODEC_MUTE_MONO("LFE Playback Switch", 0x03, 2, 0, HDA_OUTPUT),
6897 HDA_CODEC_VOLUME("What U Hear Capture Volume", 0x0a, 0, HDA_INPUT),
6898 HDA_CODEC_MUTE("What U Hear Capture Switch", 0x0a, 0, HDA_INPUT),
6904 static int ca0132_build_controls(struct hda_codec *codec) in ca0132_build_controls() argument
6906 struct ca0132_spec *spec = codec->spec; in ca0132_build_controls()
6908 int err = 0; in ca0132_build_controls()
6911 for (i = 0; i < spec->num_mixers; i++) { in ca0132_build_controls()
6912 err = snd_hda_add_new_ctls(codec, spec->mixers[i]); in ca0132_build_controls()
6913 if (err < 0) in ca0132_build_controls()
6918 snd_hda_set_vmaster_tlv(codec, spec->dacs[0], HDA_OUTPUT, in ca0132_build_controls()
6919 spec->tlv); in ca0132_build_controls()
6920 snd_hda_add_vmaster(codec, "Master Playback Volume", in ca0132_build_controls()
6921 spec->tlv, ca0132_alt_follower_pfxs, in ca0132_build_controls()
6923 err = __snd_hda_add_vmaster(codec, "Master Playback Switch", in ca0132_build_controls()
6926 true, &spec->vmaster_mute.sw_kctl); in ca0132_build_controls()
6927 if (err < 0) in ca0132_build_controls()
6935 for (i = 0; i < num_fx; i++) { in ca0132_build_controls()
6938 if (i == (ECHO_CANCELLATION - IN_EFFECT_START_NID + in ca0132_build_controls()
6943 err = add_fx_switch(codec, ca0132_effects[i].nid, in ca0132_build_controls()
6946 if (err < 0) in ca0132_build_controls()
6950 * If codec has use_alt_controls set to true, add effect level sliders, in ca0132_build_controls()
6955 err = ca0132_alt_add_svm_enum(codec); in ca0132_build_controls()
6956 if (err < 0) in ca0132_build_controls()
6959 err = add_ca0132_alt_eq_presets(codec); in ca0132_build_controls()
6960 if (err < 0) in ca0132_build_controls()
6963 err = add_fx_switch(codec, PLAY_ENHANCEMENT, in ca0132_build_controls()
6964 "Enable OutFX", 0); in ca0132_build_controls()
6965 if (err < 0) in ca0132_build_controls()
6968 err = add_fx_switch(codec, CRYSTAL_VOICE, in ca0132_build_controls()
6970 if (err < 0) in ca0132_build_controls()
6973 num_sliders = OUT_EFFECTS_COUNT - 1; in ca0132_build_controls()
6974 for (i = 0; i < num_sliders; i++) { in ca0132_build_controls()
6975 err = ca0132_alt_add_effect_slider(codec, in ca0132_build_controls()
6979 if (err < 0) in ca0132_build_controls()
6983 err = ca0132_alt_add_effect_slider(codec, XBASS_XOVER, in ca0132_build_controls()
6984 "X-Bass Crossover", EFX_DIR_OUT); in ca0132_build_controls()
6986 if (err < 0) in ca0132_build_controls()
6989 err = add_fx_switch(codec, PLAY_ENHANCEMENT, in ca0132_build_controls()
6990 "PlayEnhancement", 0); in ca0132_build_controls()
6991 if (err < 0) in ca0132_build_controls()
6994 err = add_fx_switch(codec, CRYSTAL_VOICE, in ca0132_build_controls()
6996 if (err < 0) in ca0132_build_controls()
6999 err = add_voicefx(codec); in ca0132_build_controls()
7000 if (err < 0) in ca0132_build_controls()
7004 * If the codec uses alt_functions, you need the enumerated controls in ca0132_build_controls()
7009 err = ca0132_alt_add_output_enum(codec); in ca0132_build_controls()
7010 if (err < 0) in ca0132_build_controls()
7012 err = ca0132_alt_add_speaker_channel_cfg_enum(codec); in ca0132_build_controls()
7013 if (err < 0) in ca0132_build_controls()
7015 err = ca0132_alt_add_front_full_range_switch(codec); in ca0132_build_controls()
7016 if (err < 0) in ca0132_build_controls()
7018 err = ca0132_alt_add_rear_full_range_switch(codec); in ca0132_build_controls()
7019 if (err < 0) in ca0132_build_controls()
7021 err = ca0132_alt_add_bass_redirection_crossover(codec); in ca0132_build_controls()
7022 if (err < 0) in ca0132_build_controls()
7024 err = ca0132_alt_add_bass_redirection_switch(codec); in ca0132_build_controls()
7025 if (err < 0) in ca0132_build_controls()
7027 err = ca0132_alt_add_mic_boost_enum(codec); in ca0132_build_controls()
7028 if (err < 0) in ca0132_build_controls()
7032 * header on the card, and aux-in is handled by the DBPro board. in ca0132_build_controls()
7035 err = ca0132_alt_add_input_enum(codec); in ca0132_build_controls()
7036 if (err < 0) in ca0132_build_controls()
7044 err = ae5_add_headphone_gain_enum(codec); in ca0132_build_controls()
7045 if (err < 0) in ca0132_build_controls()
7047 err = ae5_add_sound_filter_enum(codec); in ca0132_build_controls()
7048 if (err < 0) in ca0132_build_controls()
7052 err = zxr_add_headphone_gain_switch(codec); in ca0132_build_controls()
7053 if (err < 0) in ca0132_build_controls()
7061 add_tuning_ctls(codec); in ca0132_build_controls()
7064 err = snd_hda_jack_add_kctls(codec, &spec->autocfg); in ca0132_build_controls()
7065 if (err < 0) in ca0132_build_controls()
7068 if (spec->dig_out) { in ca0132_build_controls()
7069 err = snd_hda_create_spdif_out_ctls(codec, spec->dig_out, in ca0132_build_controls()
7070 spec->dig_out); in ca0132_build_controls()
7071 if (err < 0) in ca0132_build_controls()
7073 err = snd_hda_create_spdif_share_sw(codec, &spec->multiout); in ca0132_build_controls()
7074 if (err < 0) in ca0132_build_controls()
7076 /* spec->multiout.share_spdif = 1; */ in ca0132_build_controls()
7079 if (spec->dig_in) { in ca0132_build_controls()
7080 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in); in ca0132_build_controls()
7081 if (err < 0) in ca0132_build_controls()
7086 ca0132_alt_add_chmap_ctls(codec); in ca0132_build_controls()
7088 return 0; in ca0132_build_controls()
7091 static int dbpro_build_controls(struct hda_codec *codec) in dbpro_build_controls() argument
7093 struct ca0132_spec *spec = codec->spec; in dbpro_build_controls()
7094 int err = 0; in dbpro_build_controls()
7096 if (spec->dig_out) { in dbpro_build_controls()
7097 err = snd_hda_create_spdif_out_ctls(codec, spec->dig_out, in dbpro_build_controls()
7098 spec->dig_out); in dbpro_build_controls()
7099 if (err < 0) in dbpro_build_controls()
7103 if (spec->dig_in) { in dbpro_build_controls()
7104 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in); in dbpro_build_controls()
7105 if (err < 0) in dbpro_build_controls()
7109 return 0; in dbpro_build_controls()
7155 static int ca0132_build_pcms(struct hda_codec *codec) in ca0132_build_pcms() argument
7157 struct ca0132_spec *spec = codec->spec; in ca0132_build_pcms()
7160 info = snd_hda_codec_pcm_new(codec, "CA0132 Analog"); in ca0132_build_pcms()
7162 return -ENOMEM; in ca0132_build_pcms()
7164 info->own_chmap = true; in ca0132_build_pcms()
7165 info->stream[SNDRV_PCM_STREAM_PLAYBACK].chmap in ca0132_build_pcms()
7168 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = ca0132_pcm_analog_playback; in ca0132_build_pcms()
7169 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->dacs[0]; in ca0132_build_pcms()
7170 info->stream[SNDRV_PCM_STREAM_PLAYBACK].channels_max = in ca0132_build_pcms()
7171 spec->multiout.max_channels; in ca0132_build_pcms()
7172 info->stream[SNDRV_PCM_STREAM_CAPTURE] = ca0132_pcm_analog_capture; in ca0132_build_pcms()
7173 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = 1; in ca0132_build_pcms()
7174 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[0]; in ca0132_build_pcms()
7178 info = snd_hda_codec_pcm_new(codec, "CA0132 Analog Mic-In2"); in ca0132_build_pcms()
7180 return -ENOMEM; in ca0132_build_pcms()
7181 info->stream[SNDRV_PCM_STREAM_CAPTURE] = in ca0132_build_pcms()
7183 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = 1; in ca0132_build_pcms()
7184 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[1]; in ca0132_build_pcms()
7187 info = snd_hda_codec_pcm_new(codec, "CA0132 What U Hear"); in ca0132_build_pcms()
7189 return -ENOMEM; in ca0132_build_pcms()
7190 info->stream[SNDRV_PCM_STREAM_CAPTURE] = ca0132_pcm_analog_capture; in ca0132_build_pcms()
7191 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = 1; in ca0132_build_pcms()
7192 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[2]; in ca0132_build_pcms()
7194 if (!spec->dig_out && !spec->dig_in) in ca0132_build_pcms()
7195 return 0; in ca0132_build_pcms()
7197 info = snd_hda_codec_pcm_new(codec, "CA0132 Digital"); in ca0132_build_pcms()
7199 return -ENOMEM; in ca0132_build_pcms()
7200 info->pcm_type = HDA_PCM_TYPE_SPDIF; in ca0132_build_pcms()
7201 if (spec->dig_out) { in ca0132_build_pcms()
7202 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = in ca0132_build_pcms()
7204 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->dig_out; in ca0132_build_pcms()
7206 if (spec->dig_in) { in ca0132_build_pcms()
7207 info->stream[SNDRV_PCM_STREAM_CAPTURE] = in ca0132_build_pcms()
7209 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in; in ca0132_build_pcms()
7212 return 0; in ca0132_build_pcms()
7215 static int dbpro_build_pcms(struct hda_codec *codec) in dbpro_build_pcms() argument
7217 struct ca0132_spec *spec = codec->spec; in dbpro_build_pcms()
7220 info = snd_hda_codec_pcm_new(codec, "CA0132 Alt Analog"); in dbpro_build_pcms()
7222 return -ENOMEM; in dbpro_build_pcms()
7223 info->stream[SNDRV_PCM_STREAM_CAPTURE] = ca0132_pcm_analog_capture; in dbpro_build_pcms()
7224 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = 1; in dbpro_build_pcms()
7225 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[0]; in dbpro_build_pcms()
7228 if (!spec->dig_out && !spec->dig_in) in dbpro_build_pcms()
7229 return 0; in dbpro_build_pcms()
7231 info = snd_hda_codec_pcm_new(codec, "CA0132 Digital"); in dbpro_build_pcms()
7233 return -ENOMEM; in dbpro_build_pcms()
7234 info->pcm_type = HDA_PCM_TYPE_SPDIF; in dbpro_build_pcms()
7235 if (spec->dig_out) { in dbpro_build_pcms()
7236 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = in dbpro_build_pcms()
7238 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->dig_out; in dbpro_build_pcms()
7240 if (spec->dig_in) { in dbpro_build_pcms()
7241 info->stream[SNDRV_PCM_STREAM_CAPTURE] = in dbpro_build_pcms()
7243 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in; in dbpro_build_pcms()
7246 return 0; in dbpro_build_pcms()
7249 static void init_output(struct hda_codec *codec, hda_nid_t pin, hda_nid_t dac) in init_output() argument
7252 snd_hda_set_pin_ctl(codec, pin, PIN_HP); in init_output()
7253 if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP) in init_output()
7254 snd_hda_codec_write(codec, pin, 0, in init_output()
7258 if (dac && (get_wcaps(codec, dac) & AC_WCAP_OUT_AMP)) in init_output()
7259 snd_hda_codec_write(codec, dac, 0, in init_output()
7263 static void init_input(struct hda_codec *codec, hda_nid_t pin, hda_nid_t adc) in init_input() argument
7266 snd_hda_set_pin_ctl(codec, pin, PIN_VREF80); in init_input()
7267 if (get_wcaps(codec, pin) & AC_WCAP_IN_AMP) in init_input()
7268 snd_hda_codec_write(codec, pin, 0, in init_input()
7270 AMP_IN_UNMUTE(0)); in init_input()
7272 if (adc && (get_wcaps(codec, adc) & AC_WCAP_IN_AMP)) { in init_input()
7273 snd_hda_codec_write(codec, adc, 0, AC_VERB_SET_AMP_GAIN_MUTE, in init_input()
7274 AMP_IN_UNMUTE(0)); in init_input()
7276 /* init to 0 dB and unmute. */ in init_input()
7277 snd_hda_codec_amp_stereo(codec, adc, HDA_INPUT, 0, in init_input()
7278 HDA_AMP_VOLMASK, 0x5a); in init_input()
7279 snd_hda_codec_amp_stereo(codec, adc, HDA_INPUT, 0, in init_input()
7280 HDA_AMP_MUTE, 0); in init_input()
7284 static void refresh_amp_caps(struct hda_codec *codec, hda_nid_t nid, int dir) in refresh_amp_caps() argument
7288 caps = snd_hda_param_read(codec, nid, dir == HDA_OUTPUT ? in refresh_amp_caps()
7290 snd_hda_override_amp_caps(codec, nid, dir, caps); in refresh_amp_caps()
7294 * Switch between Digital built-in mic and analog mic.
7296 static void ca0132_set_dmic(struct hda_codec *codec, int enable) in ca0132_set_dmic() argument
7298 struct ca0132_spec *spec = codec->spec; in ca0132_set_dmic()
7303 codec_dbg(codec, "ca0132_set_dmic: enable=%d\n", enable); in ca0132_set_dmic()
7305 oldval = stop_mic1(codec); in ca0132_set_dmic()
7306 ca0132_set_vipsource(codec, 0); in ca0132_set_dmic()
7308 /* set DMic input as 2-ch */ in ca0132_set_dmic()
7310 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_set_dmic()
7312 val = spec->dmic_ctl; in ca0132_set_dmic()
7313 val |= 0x80; in ca0132_set_dmic()
7314 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_set_dmic()
7317 if (!(spec->dmic_ctl & 0x20)) in ca0132_set_dmic()
7318 chipio_set_control_flag(codec, CONTROL_FLAG_DMIC, 1); in ca0132_set_dmic()
7322 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_set_dmic()
7324 val = spec->dmic_ctl; in ca0132_set_dmic()
7326 val &= 0x5f; in ca0132_set_dmic()
7327 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_set_dmic()
7330 if (!(spec->dmic_ctl & 0x20)) in ca0132_set_dmic()
7331 chipio_set_control_flag(codec, CONTROL_FLAG_DMIC, 0); in ca0132_set_dmic()
7333 ca0132_set_vipsource(codec, 1); in ca0132_set_dmic()
7334 resume_mic1(codec, oldval); in ca0132_set_dmic()
7340 static void ca0132_init_dmic(struct hda_codec *codec) in ca0132_init_dmic() argument
7342 struct ca0132_spec *spec = codec->spec; in ca0132_init_dmic()
7350 * Bit 2-0: MPIO select in ca0132_init_dmic()
7352 * Bit 7-4: reserved in ca0132_init_dmic()
7354 val = 0x01; in ca0132_init_dmic()
7355 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_init_dmic()
7359 * Bit 2-0: Data1 MPIO select in ca0132_init_dmic()
7361 * Bit 6-4: Data2 MPIO select in ca0132_init_dmic()
7364 val = 0x83; in ca0132_init_dmic()
7365 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_init_dmic()
7368 /* Use Ch-0 and Ch-1. Rate is 48K, mode 1. Disable DMic first. in ca0132_init_dmic()
7369 * Bit 3-0: Channel mask in ca0132_init_dmic()
7376 val = 0x33; in ca0132_init_dmic()
7378 val = 0x23; in ca0132_init_dmic()
7380 spec->dmic_ctl = val; in ca0132_init_dmic()
7381 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_init_dmic()
7388 static void ca0132_init_analog_mic2(struct hda_codec *codec) in ca0132_init_analog_mic2() argument
7390 struct ca0132_spec *spec = codec->spec; in ca0132_init_analog_mic2()
7392 mutex_lock(&spec->chipio_mutex); in ca0132_init_analog_mic2()
7393 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init_analog_mic2()
7394 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x20); in ca0132_init_analog_mic2()
7395 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init_analog_mic2()
7396 VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0x19); in ca0132_init_analog_mic2()
7397 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init_analog_mic2()
7398 VENDOR_CHIPIO_8051_DATA_WRITE, 0x00); in ca0132_init_analog_mic2()
7399 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init_analog_mic2()
7400 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x2D); in ca0132_init_analog_mic2()
7401 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init_analog_mic2()
7402 VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0x19); in ca0132_init_analog_mic2()
7403 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init_analog_mic2()
7404 VENDOR_CHIPIO_8051_DATA_WRITE, 0x00); in ca0132_init_analog_mic2()
7405 mutex_unlock(&spec->chipio_mutex); in ca0132_init_analog_mic2()
7408 static void ca0132_refresh_widget_caps(struct hda_codec *codec) in ca0132_refresh_widget_caps() argument
7410 struct ca0132_spec *spec = codec->spec; in ca0132_refresh_widget_caps()
7413 codec_dbg(codec, "ca0132_refresh_widget_caps.\n"); in ca0132_refresh_widget_caps()
7414 snd_hda_codec_update_widgets(codec); in ca0132_refresh_widget_caps()
7416 for (i = 0; i < spec->multiout.num_dacs; i++) in ca0132_refresh_widget_caps()
7417 refresh_amp_caps(codec, spec->dacs[i], HDA_OUTPUT); in ca0132_refresh_widget_caps()
7419 for (i = 0; i < spec->num_outputs; i++) in ca0132_refresh_widget_caps()
7420 refresh_amp_caps(codec, spec->out_pins[i], HDA_OUTPUT); in ca0132_refresh_widget_caps()
7422 for (i = 0; i < spec->num_inputs; i++) { in ca0132_refresh_widget_caps()
7423 refresh_amp_caps(codec, spec->adcs[i], HDA_INPUT); in ca0132_refresh_widget_caps()
7424 refresh_amp_caps(codec, spec->input_pins[i], HDA_INPUT); in ca0132_refresh_widget_caps()
7432 /* Non-zero values are floating point 0.000198. */
7433 0x394f9e38, 0x394f9e38, 0x00000000, 0x00000000, 0x00000000, 0x00000000
7437 /* Non-zero values are floating point 0.000220. */
7438 0x00000000, 0x00000000, 0x3966afcd, 0x3966afcd, 0x3966afcd, 0x3966afcd
7442 /* Non-zero values are floating point 0.000100. */
7443 0x00000000, 0x00000000, 0x38d1b717, 0x38d1b717, 0x38d1b717, 0x38d1b717
7449 static void ca0132_alt_init_speaker_tuning(struct hda_codec *codec) in ca0132_alt_init_speaker_tuning() argument
7451 struct ca0132_spec *spec = codec->spec; in ca0132_alt_init_speaker_tuning()
7472 dspio_set_uint_param(codec, 0x96, SPEAKER_TUNING_ENABLE_CENTER_EQ, tmp); in ca0132_alt_init_speaker_tuning()
7477 dspio_set_uint_param(codec, 0x96, i, tmp); in ca0132_alt_init_speaker_tuning()
7482 dspio_set_uint_param(codec, 0x96, i, tmp); in ca0132_alt_init_speaker_tuning()
7485 for (i = 0; i < 6; i++) in ca0132_alt_init_speaker_tuning()
7486 dspio_set_uint_param(codec, 0x96, in ca0132_alt_init_speaker_tuning()
7494 static void ca0132_alt_create_dummy_stream(struct hda_codec *codec) in ca0132_alt_create_dummy_stream() argument
7496 struct ca0132_spec *spec = codec->spec; in ca0132_alt_create_dummy_stream()
7500 SNDRV_PCM_FORMAT_S32_LE, 32, 0); in ca0132_alt_create_dummy_stream()
7502 snd_hda_codec_setup_stream(codec, spec->dacs[0], spec->dsp_stream_id, in ca0132_alt_create_dummy_stream()
7503 0, stream_format); in ca0132_alt_create_dummy_stream()
7505 snd_hda_codec_cleanup_stream(codec, spec->dacs[0]); in ca0132_alt_create_dummy_stream()
7509 * Initialize mic for non-chromebook ca0132 implementations.
7511 static void ca0132_alt_init_analog_mics(struct hda_codec *codec) in ca0132_alt_init_analog_mics() argument
7513 struct ca0132_spec *spec = codec->spec; in ca0132_alt_init_analog_mics()
7517 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); in ca0132_alt_init_analog_mics()
7518 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); in ca0132_alt_init_analog_mics()
7520 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_init_analog_mics()
7524 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_init_analog_mics()
7527 chipio_set_conn_rate(codec, MEM_CONNID_MICIN2, SR_96_000); in ca0132_alt_init_analog_mics()
7528 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT2, SR_96_000); in ca0132_alt_init_analog_mics()
7530 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_init_analog_mics()
7532 dspio_set_uint_param(codec, 0x80, 0x01, tmp); in ca0132_alt_init_analog_mics()
7536 * Sets the source of stream 0x14 to connpointID 0x48, and the destination
7537 * connpointID to 0x91. If this isn't done, the destination is 0x71, and
7541 static void sbz_connect_streams(struct hda_codec *codec) in sbz_connect_streams() argument
7543 struct ca0132_spec *spec = codec->spec; in sbz_connect_streams()
7545 mutex_lock(&spec->chipio_mutex); in sbz_connect_streams()
7547 codec_dbg(codec, "Connect Streams entered, mutex locked and loaded.\n"); in sbz_connect_streams()
7549 chipio_set_stream_channels(codec, 0x0C, 6); in sbz_connect_streams()
7550 chipio_set_stream_control(codec, 0x0C, 1); in sbz_connect_streams()
7552 /* This value is 0x43 for 96khz, and 0x83 for 192khz. */ in sbz_connect_streams()
7553 chipio_write_no_mutex(codec, 0x18a020, 0x00000043); in sbz_connect_streams()
7555 /* Setup stream 0x14 with it's source and destination points */ in sbz_connect_streams()
7556 chipio_set_stream_source_dest(codec, 0x14, 0x48, 0x91); in sbz_connect_streams()
7557 chipio_set_conn_rate_no_mutex(codec, 0x48, SR_96_000); in sbz_connect_streams()
7558 chipio_set_conn_rate_no_mutex(codec, 0x91, SR_96_000); in sbz_connect_streams()
7559 chipio_set_stream_channels(codec, 0x14, 2); in sbz_connect_streams()
7560 chipio_set_stream_control(codec, 0x14, 1); in sbz_connect_streams()
7562 codec_dbg(codec, "Connect Streams exited, mutex released.\n"); in sbz_connect_streams()
7564 mutex_unlock(&spec->chipio_mutex); in sbz_connect_streams()
7573 static void sbz_chipio_startup_data(struct hda_codec *codec) in sbz_chipio_startup_data() argument
7575 struct ca0132_spec *spec = codec->spec; in sbz_chipio_startup_data()
7577 mutex_lock(&spec->chipio_mutex); in sbz_chipio_startup_data()
7578 codec_dbg(codec, "Startup Data entered, mutex locked and loaded.\n"); in sbz_chipio_startup_data()
7581 chipio_write_no_mutex(codec, 0x190060, 0x0001f8c0); in sbz_chipio_startup_data()
7582 chipio_write_no_mutex(codec, 0x190064, 0x0001f9c1); in sbz_chipio_startup_data()
7583 chipio_write_no_mutex(codec, 0x190068, 0x0001fac6); in sbz_chipio_startup_data()
7584 chipio_write_no_mutex(codec, 0x19006c, 0x0001fbc7); in sbz_chipio_startup_data()
7586 chipio_write_no_mutex(codec, 0x19042c, 0x00000001); in sbz_chipio_startup_data()
7588 chipio_set_stream_channels(codec, 0x0C, 6); in sbz_chipio_startup_data()
7589 chipio_set_stream_control(codec, 0x0C, 1); in sbz_chipio_startup_data()
7592 chipio_write_no_mutex(codec, 0x190030, 0x0001e0c0); in sbz_chipio_startup_data()
7593 chipio_write_no_mutex(codec, 0x190034, 0x0001e1c1); in sbz_chipio_startup_data()
7594 chipio_write_no_mutex(codec, 0x190038, 0x0001e4c2); in sbz_chipio_startup_data()
7595 chipio_write_no_mutex(codec, 0x19003c, 0x0001e5c3); in sbz_chipio_startup_data()
7596 chipio_write_no_mutex(codec, 0x190040, 0x0001e2c4); in sbz_chipio_startup_data()
7597 chipio_write_no_mutex(codec, 0x190044, 0x0001e3c5); in sbz_chipio_startup_data()
7598 chipio_write_no_mutex(codec, 0x190048, 0x0001e8c6); in sbz_chipio_startup_data()
7599 chipio_write_no_mutex(codec, 0x19004c, 0x0001e9c7); in sbz_chipio_startup_data()
7600 chipio_write_no_mutex(codec, 0x190050, 0x0001ecc8); in sbz_chipio_startup_data()
7601 chipio_write_no_mutex(codec, 0x190054, 0x0001edc9); in sbz_chipio_startup_data()
7602 chipio_write_no_mutex(codec, 0x190058, 0x0001eaca); in sbz_chipio_startup_data()
7603 chipio_write_no_mutex(codec, 0x19005c, 0x0001ebcb); in sbz_chipio_startup_data()
7605 chipio_write_no_mutex(codec, 0x190038, 0x000140c2); in sbz_chipio_startup_data()
7606 chipio_write_no_mutex(codec, 0x19003c, 0x000141c3); in sbz_chipio_startup_data()
7607 chipio_write_no_mutex(codec, 0x190040, 0x000150c4); in sbz_chipio_startup_data()
7608 chipio_write_no_mutex(codec, 0x190044, 0x000151c5); in sbz_chipio_startup_data()
7609 chipio_write_no_mutex(codec, 0x190050, 0x000142c8); in sbz_chipio_startup_data()
7610 chipio_write_no_mutex(codec, 0x190054, 0x000143c9); in sbz_chipio_startup_data()
7611 chipio_write_no_mutex(codec, 0x190058, 0x000152ca); in sbz_chipio_startup_data()
7612 chipio_write_no_mutex(codec, 0x19005c, 0x000153cb); in sbz_chipio_startup_data()
7614 chipio_write_no_mutex(codec, 0x19042c, 0x00000001); in sbz_chipio_startup_data()
7616 codec_dbg(codec, "Startup Data exited, mutex released.\n"); in sbz_chipio_startup_data()
7617 mutex_unlock(&spec->chipio_mutex); in sbz_chipio_startup_data()
7621 * Custom DSP SCP commands where the src value is 0x00 instead of 0x20. This is
7624 static void ca0132_alt_dsp_scp_startup(struct hda_codec *codec) in ca0132_alt_dsp_scp_startup() argument
7626 struct ca0132_spec *spec = codec->spec; in ca0132_alt_dsp_scp_startup()
7633 for (i = 0; i < 2; i++) { in ca0132_alt_dsp_scp_startup()
7638 tmp = 0x00000003; in ca0132_alt_dsp_scp_startup()
7639 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp); in ca0132_alt_dsp_scp_startup()
7640 tmp = 0x00000000; in ca0132_alt_dsp_scp_startup()
7641 dspio_set_uint_param_no_source(codec, 0x80, 0x0A, tmp); in ca0132_alt_dsp_scp_startup()
7642 tmp = 0x00000001; in ca0132_alt_dsp_scp_startup()
7643 dspio_set_uint_param_no_source(codec, 0x80, 0x0B, tmp); in ca0132_alt_dsp_scp_startup()
7644 tmp = 0x00000004; in ca0132_alt_dsp_scp_startup()
7645 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp); in ca0132_alt_dsp_scp_startup()
7646 tmp = 0x00000005; in ca0132_alt_dsp_scp_startup()
7647 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp); in ca0132_alt_dsp_scp_startup()
7648 tmp = 0x00000000; in ca0132_alt_dsp_scp_startup()
7649 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp); in ca0132_alt_dsp_scp_startup()
7653 tmp = 0x00000000; in ca0132_alt_dsp_scp_startup()
7654 dspio_set_uint_param_no_source(codec, 0x80, 0x0A, tmp); in ca0132_alt_dsp_scp_startup()
7655 tmp = 0x00000001; in ca0132_alt_dsp_scp_startup()
7656 dspio_set_uint_param_no_source(codec, 0x80, 0x0B, tmp); in ca0132_alt_dsp_scp_startup()
7657 tmp = 0x00000004; in ca0132_alt_dsp_scp_startup()
7658 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp); in ca0132_alt_dsp_scp_startup()
7659 tmp = 0x00000005; in ca0132_alt_dsp_scp_startup()
7660 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp); in ca0132_alt_dsp_scp_startup()
7661 tmp = 0x00000000; in ca0132_alt_dsp_scp_startup()
7662 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp); in ca0132_alt_dsp_scp_startup()
7671 static void ca0132_alt_dsp_initial_mic_setup(struct hda_codec *codec) in ca0132_alt_dsp_initial_mic_setup() argument
7673 struct ca0132_spec *spec = codec->spec; in ca0132_alt_dsp_initial_mic_setup()
7676 chipio_set_stream_control(codec, 0x03, 0); in ca0132_alt_dsp_initial_mic_setup()
7677 chipio_set_stream_control(codec, 0x04, 0); in ca0132_alt_dsp_initial_mic_setup()
7679 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); in ca0132_alt_dsp_initial_mic_setup()
7680 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); in ca0132_alt_dsp_initial_mic_setup()
7683 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_dsp_initial_mic_setup()
7685 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_dsp_initial_mic_setup()
7686 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_dsp_initial_mic_setup()
7690 chipio_write(codec, 0x18b098, 0x0000000c); in ca0132_alt_dsp_initial_mic_setup()
7691 chipio_write(codec, 0x18b09C, 0x0000000c); in ca0132_alt_dsp_initial_mic_setup()
7694 chipio_write(codec, 0x18b098, 0x0000000c); in ca0132_alt_dsp_initial_mic_setup()
7695 chipio_write(codec, 0x18b09c, 0x0000004c); in ca0132_alt_dsp_initial_mic_setup()
7702 static void ae5_post_dsp_register_set(struct hda_codec *codec) in ae5_post_dsp_register_set() argument
7704 struct ca0132_spec *spec = codec->spec; in ae5_post_dsp_register_set()
7706 chipio_8051_write_direct(codec, 0x93, 0x10); in ae5_post_dsp_register_set()
7707 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_register_set()
7708 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x44); in ae5_post_dsp_register_set()
7709 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_register_set()
7710 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc2); in ae5_post_dsp_register_set()
7712 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7713 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7714 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7715 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7716 writeb(0x00, spec->mem_base + 0x100); in ae5_post_dsp_register_set()
7717 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7718 writeb(0x00, spec->mem_base + 0x100); in ae5_post_dsp_register_set()
7719 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7720 writeb(0x00, spec->mem_base + 0x100); in ae5_post_dsp_register_set()
7721 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7722 writeb(0x00, spec->mem_base + 0x100); in ae5_post_dsp_register_set()
7723 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7725 ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x3f); in ae5_post_dsp_register_set()
7726 ca0113_mmio_command_set(codec, 0x30, 0x2d, 0x3f); in ae5_post_dsp_register_set()
7727 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_post_dsp_register_set()
7730 static void ae5_post_dsp_param_setup(struct hda_codec *codec) in ae5_post_dsp_param_setup() argument
7735 * AE-5's registry values in Windows. in ae5_post_dsp_param_setup()
7737 chipio_set_control_param(codec, 3, 0); in ae5_post_dsp_param_setup()
7740 * change colors on the external LED strip connected to the AE-5. in ae5_post_dsp_param_setup()
7742 chipio_set_control_flag(codec, CONTROL_FLAG_ASI_96KHZ, 1); in ae5_post_dsp_param_setup()
7744 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x724, 0x83); in ae5_post_dsp_param_setup()
7745 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0); in ae5_post_dsp_param_setup()
7747 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_param_setup()
7748 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x92); in ae5_post_dsp_param_setup()
7749 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_param_setup()
7750 VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0xfa); in ae5_post_dsp_param_setup()
7751 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_param_setup()
7752 VENDOR_CHIPIO_8051_DATA_WRITE, 0x22); in ae5_post_dsp_param_setup()
7755 static void ae5_post_dsp_pll_setup(struct hda_codec *codec) in ae5_post_dsp_pll_setup() argument
7757 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7758 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x41); in ae5_post_dsp_pll_setup()
7759 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7760 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc8); in ae5_post_dsp_pll_setup()
7762 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7763 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x45); in ae5_post_dsp_pll_setup()
7764 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7765 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xcc); in ae5_post_dsp_pll_setup()
7767 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7768 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x40); in ae5_post_dsp_pll_setup()
7769 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7770 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xcb); in ae5_post_dsp_pll_setup()
7772 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7773 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x43); in ae5_post_dsp_pll_setup()
7774 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7775 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc7); in ae5_post_dsp_pll_setup()
7777 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7778 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x51); in ae5_post_dsp_pll_setup()
7779 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7780 VENDOR_CHIPIO_PLL_PMU_WRITE, 0x8d); in ae5_post_dsp_pll_setup()
7783 static void ae5_post_dsp_stream_setup(struct hda_codec *codec) in ae5_post_dsp_stream_setup() argument
7785 struct ca0132_spec *spec = codec->spec; in ae5_post_dsp_stream_setup()
7787 mutex_lock(&spec->chipio_mutex); in ae5_post_dsp_stream_setup()
7789 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x725, 0x81); in ae5_post_dsp_stream_setup()
7791 chipio_set_conn_rate_no_mutex(codec, 0x70, SR_96_000); in ae5_post_dsp_stream_setup()
7793 chipio_set_stream_channels(codec, 0x0C, 6); in ae5_post_dsp_stream_setup()
7794 chipio_set_stream_control(codec, 0x0C, 1); in ae5_post_dsp_stream_setup()
7796 chipio_set_stream_source_dest(codec, 0x5, 0x43, 0x0); in ae5_post_dsp_stream_setup()
7798 chipio_set_stream_source_dest(codec, 0x18, 0x9, 0xd0); in ae5_post_dsp_stream_setup()
7799 chipio_set_conn_rate_no_mutex(codec, 0xd0, SR_96_000); in ae5_post_dsp_stream_setup()
7800 chipio_set_stream_channels(codec, 0x18, 6); in ae5_post_dsp_stream_setup()
7801 chipio_set_stream_control(codec, 0x18, 1); in ae5_post_dsp_stream_setup()
7803 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_ASI, 4); in ae5_post_dsp_stream_setup()
7805 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_stream_setup()
7806 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x43); in ae5_post_dsp_stream_setup()
7807 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_stream_setup()
7808 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc7); in ae5_post_dsp_stream_setup()
7810 ca0113_mmio_command_set(codec, 0x48, 0x01, 0x80); in ae5_post_dsp_stream_setup()
7812 mutex_unlock(&spec->chipio_mutex); in ae5_post_dsp_stream_setup()
7815 static void ae5_post_dsp_startup_data(struct hda_codec *codec) in ae5_post_dsp_startup_data() argument
7817 struct ca0132_spec *spec = codec->spec; in ae5_post_dsp_startup_data()
7819 mutex_lock(&spec->chipio_mutex); in ae5_post_dsp_startup_data()
7821 chipio_write_no_mutex(codec, 0x189000, 0x0001f101); in ae5_post_dsp_startup_data()
7822 chipio_write_no_mutex(codec, 0x189004, 0x0001f101); in ae5_post_dsp_startup_data()
7823 chipio_write_no_mutex(codec, 0x189024, 0x00014004); in ae5_post_dsp_startup_data()
7824 chipio_write_no_mutex(codec, 0x189028, 0x0002000f); in ae5_post_dsp_startup_data()
7826 ca0113_mmio_command_set(codec, 0x48, 0x0a, 0x05); in ae5_post_dsp_startup_data()
7827 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_ASI, 7); in ae5_post_dsp_startup_data()
7828 ca0113_mmio_command_set(codec, 0x48, 0x0b, 0x12); in ae5_post_dsp_startup_data()
7829 ca0113_mmio_command_set(codec, 0x48, 0x04, 0x00); in ae5_post_dsp_startup_data()
7830 ca0113_mmio_command_set(codec, 0x48, 0x06, 0x48); in ae5_post_dsp_startup_data()
7831 ca0113_mmio_command_set(codec, 0x48, 0x0a, 0x05); in ae5_post_dsp_startup_data()
7832 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_post_dsp_startup_data()
7833 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00); in ae5_post_dsp_startup_data()
7834 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00); in ae5_post_dsp_startup_data()
7835 ca0113_mmio_gpio_set(codec, 0, true); in ae5_post_dsp_startup_data()
7836 ca0113_mmio_gpio_set(codec, 1, true); in ae5_post_dsp_startup_data()
7837 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x80); in ae5_post_dsp_startup_data()
7839 chipio_write_no_mutex(codec, 0x18b03c, 0x00000012); in ae5_post_dsp_startup_data()
7841 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00); in ae5_post_dsp_startup_data()
7842 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00); in ae5_post_dsp_startup_data()
7844 mutex_unlock(&spec->chipio_mutex); in ae5_post_dsp_startup_data()
7848 0x0001e0c0, 0x0001e1c1, 0x0001e4c2, 0x0001e5c3, 0x0001e2c4, 0x0001e3c5,
7849 0x0001e8c6, 0x0001e9c7, 0x0001ecc8, 0x0001edc9, 0x0001eaca, 0x0001ebcb
7852 static void ae7_post_dsp_setup_ports(struct hda_codec *codec) in ae7_post_dsp_setup_ports() argument
7854 struct ca0132_spec *spec = codec->spec; in ae7_post_dsp_setup_ports()
7857 mutex_lock(&spec->chipio_mutex); in ae7_post_dsp_setup_ports()
7859 chipio_set_stream_channels(codec, 0x0c, 6); in ae7_post_dsp_setup_ports()
7860 chipio_set_stream_control(codec, 0x0c, 1); in ae7_post_dsp_setup_ports()
7863 addr = 0x190030; in ae7_post_dsp_setup_ports()
7864 for (i = 0; i < count; i++) { in ae7_post_dsp_setup_ports()
7865 chipio_write_no_mutex(codec, addr, ae7_port_set_data[i]); in ae7_post_dsp_setup_ports()
7867 /* Addresses are incremented by 4-bytes. */ in ae7_post_dsp_setup_ports()
7868 addr += 0x04; in ae7_post_dsp_setup_ports()
7872 * Port setting always ends with a write of 0x1 to address 0x19042c. in ae7_post_dsp_setup_ports()
7874 chipio_write_no_mutex(codec, 0x19042c, 0x00000001); in ae7_post_dsp_setup_ports()
7876 ca0113_mmio_command_set(codec, 0x30, 0x30, 0x00); in ae7_post_dsp_setup_ports()
7877 ca0113_mmio_command_set(codec, 0x48, 0x0d, 0x40); in ae7_post_dsp_setup_ports()
7878 ca0113_mmio_command_set(codec, 0x48, 0x17, 0x00); in ae7_post_dsp_setup_ports()
7879 ca0113_mmio_command_set(codec, 0x48, 0x19, 0x00); in ae7_post_dsp_setup_ports()
7880 ca0113_mmio_command_set(codec, 0x48, 0x11, 0xff); in ae7_post_dsp_setup_ports()
7881 ca0113_mmio_command_set(codec, 0x48, 0x12, 0xff); in ae7_post_dsp_setup_ports()
7882 ca0113_mmio_command_set(codec, 0x48, 0x13, 0xff); in ae7_post_dsp_setup_ports()
7883 ca0113_mmio_command_set(codec, 0x48, 0x14, 0x7f); in ae7_post_dsp_setup_ports()
7885 mutex_unlock(&spec->chipio_mutex); in ae7_post_dsp_setup_ports()
7888 static void ae7_post_dsp_asi_stream_setup(struct hda_codec *codec) in ae7_post_dsp_asi_stream_setup() argument
7890 struct ca0132_spec *spec = codec->spec; in ae7_post_dsp_asi_stream_setup()
7892 mutex_lock(&spec->chipio_mutex); in ae7_post_dsp_asi_stream_setup()
7894 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x725, 0x81); in ae7_post_dsp_asi_stream_setup()
7895 ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x00); in ae7_post_dsp_asi_stream_setup()
7897 chipio_set_conn_rate_no_mutex(codec, 0x70, SR_96_000); in ae7_post_dsp_asi_stream_setup()
7898 chipio_set_stream_channels(codec, 0x0c, 6); in ae7_post_dsp_asi_stream_setup()
7899 chipio_set_stream_control(codec, 0x0c, 1); in ae7_post_dsp_asi_stream_setup()
7901 chipio_set_stream_source_dest(codec, 0x05, 0x43, 0x00); in ae7_post_dsp_asi_stream_setup()
7902 chipio_set_stream_source_dest(codec, 0x18, 0x09, 0xd0); in ae7_post_dsp_asi_stream_setup()
7904 chipio_set_conn_rate_no_mutex(codec, 0xd0, SR_96_000); in ae7_post_dsp_asi_stream_setup()
7905 chipio_set_stream_channels(codec, 0x18, 6); in ae7_post_dsp_asi_stream_setup()
7906 chipio_set_stream_control(codec, 0x18, 1); in ae7_post_dsp_asi_stream_setup()
7908 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_ASI, 4); in ae7_post_dsp_asi_stream_setup()
7910 mutex_unlock(&spec->chipio_mutex); in ae7_post_dsp_asi_stream_setup()
7913 static void ae7_post_dsp_pll_setup(struct hda_codec *codec) in ae7_post_dsp_pll_setup() argument
7916 0x41, 0x45, 0x40, 0x43, 0x51 in ae7_post_dsp_pll_setup()
7919 0xc8, 0xcc, 0xcb, 0xc7, 0x8d in ae7_post_dsp_pll_setup()
7923 for (i = 0; i < ARRAY_SIZE(addr); i++) { in ae7_post_dsp_pll_setup()
7924 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_pll_setup()
7926 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_pll_setup()
7931 static void ae7_post_dsp_asi_setup_ports(struct hda_codec *codec) in ae7_post_dsp_asi_setup_ports() argument
7933 struct ca0132_spec *spec = codec->spec; in ae7_post_dsp_asi_setup_ports()
7935 0x0b, 0x04, 0x06, 0x0a, 0x0c, 0x11, 0x12, 0x13, 0x14 in ae7_post_dsp_asi_setup_ports()
7938 0x12, 0x00, 0x48, 0x05, 0x5f, 0xff, 0xff, 0xff, 0x7f in ae7_post_dsp_asi_setup_ports()
7942 mutex_lock(&spec->chipio_mutex); in ae7_post_dsp_asi_setup_ports()
7944 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup_ports()
7945 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x43); in ae7_post_dsp_asi_setup_ports()
7946 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup_ports()
7947 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc7); in ae7_post_dsp_asi_setup_ports()
7949 chipio_write_no_mutex(codec, 0x189000, 0x0001f101); in ae7_post_dsp_asi_setup_ports()
7950 chipio_write_no_mutex(codec, 0x189004, 0x0001f101); in ae7_post_dsp_asi_setup_ports()
7951 chipio_write_no_mutex(codec, 0x189024, 0x00014004); in ae7_post_dsp_asi_setup_ports()
7952 chipio_write_no_mutex(codec, 0x189028, 0x0002000f); in ae7_post_dsp_asi_setup_ports()
7954 ae7_post_dsp_pll_setup(codec); in ae7_post_dsp_asi_setup_ports()
7955 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_ASI, 7); in ae7_post_dsp_asi_setup_ports()
7957 for (i = 0; i < ARRAY_SIZE(target); i++) in ae7_post_dsp_asi_setup_ports()
7958 ca0113_mmio_command_set(codec, 0x48, target[i], data[i]); in ae7_post_dsp_asi_setup_ports()
7960 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae7_post_dsp_asi_setup_ports()
7961 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00); in ae7_post_dsp_asi_setup_ports()
7962 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00); in ae7_post_dsp_asi_setup_ports()
7964 chipio_set_stream_source_dest(codec, 0x21, 0x64, 0x56); in ae7_post_dsp_asi_setup_ports()
7965 chipio_set_stream_channels(codec, 0x21, 2); in ae7_post_dsp_asi_setup_ports()
7966 chipio_set_conn_rate_no_mutex(codec, 0x56, SR_8_000); in ae7_post_dsp_asi_setup_ports()
7968 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_NODE_ID, 0x09); in ae7_post_dsp_asi_setup_ports()
7974 chipio_set_control_param_no_mutex(codec, 0x20, 0x21); in ae7_post_dsp_asi_setup_ports()
7976 chipio_write_no_mutex(codec, 0x18b038, 0x00000088); in ae7_post_dsp_asi_setup_ports()
7980 * seemingly sends data to the HDA node 0x09, which is the digital in ae7_post_dsp_asi_setup_ports()
7982 * know what data is being sent. Interestingly, the AE-5 seems to go in ae7_post_dsp_asi_setup_ports()
7984 * step, but the AE-7 does. in ae7_post_dsp_asi_setup_ports()
7987 ca0113_mmio_gpio_set(codec, 0, 1); in ae7_post_dsp_asi_setup_ports()
7988 ca0113_mmio_gpio_set(codec, 1, 1); in ae7_post_dsp_asi_setup_ports()
7990 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae7_post_dsp_asi_setup_ports()
7991 chipio_write_no_mutex(codec, 0x18b03c, 0x00000000); in ae7_post_dsp_asi_setup_ports()
7992 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00); in ae7_post_dsp_asi_setup_ports()
7993 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00); in ae7_post_dsp_asi_setup_ports()
7995 chipio_set_stream_source_dest(codec, 0x05, 0x43, 0x00); in ae7_post_dsp_asi_setup_ports()
7996 chipio_set_stream_source_dest(codec, 0x18, 0x09, 0xd0); in ae7_post_dsp_asi_setup_ports()
7998 chipio_set_conn_rate_no_mutex(codec, 0xd0, SR_96_000); in ae7_post_dsp_asi_setup_ports()
7999 chipio_set_stream_channels(codec, 0x18, 6); in ae7_post_dsp_asi_setup_ports()
8005 ae7_post_dsp_pll_setup(codec); in ae7_post_dsp_asi_setup_ports()
8006 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_ASI, 7); in ae7_post_dsp_asi_setup_ports()
8008 mutex_unlock(&spec->chipio_mutex); in ae7_post_dsp_asi_setup_ports()
8016 static void ae7_post_dsp_asi_setup(struct hda_codec *codec) in ae7_post_dsp_asi_setup() argument
8018 chipio_8051_write_direct(codec, 0x93, 0x10); in ae7_post_dsp_asi_setup()
8020 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup()
8021 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x44); in ae7_post_dsp_asi_setup()
8022 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup()
8023 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc2); in ae7_post_dsp_asi_setup()
8025 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae7_post_dsp_asi_setup()
8026 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f); in ae7_post_dsp_asi_setup()
8028 chipio_set_control_param(codec, 3, 3); in ae7_post_dsp_asi_setup()
8029 chipio_set_control_flag(codec, CONTROL_FLAG_ASI_96KHZ, 1); in ae7_post_dsp_asi_setup()
8031 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x724, 0x83); in ae7_post_dsp_asi_setup()
8032 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0); in ae7_post_dsp_asi_setup()
8033 snd_hda_codec_write(codec, 0x17, 0, 0x794, 0x00); in ae7_post_dsp_asi_setup()
8035 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup()
8036 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x92); in ae7_post_dsp_asi_setup()
8037 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup()
8038 VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0xfa); in ae7_post_dsp_asi_setup()
8039 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup()
8040 VENDOR_CHIPIO_8051_DATA_WRITE, 0x22); in ae7_post_dsp_asi_setup()
8042 ae7_post_dsp_pll_setup(codec); in ae7_post_dsp_asi_setup()
8043 ae7_post_dsp_asi_stream_setup(codec); in ae7_post_dsp_asi_setup()
8045 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup()
8046 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x43); in ae7_post_dsp_asi_setup()
8047 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup()
8048 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc7); in ae7_post_dsp_asi_setup()
8050 ae7_post_dsp_asi_setup_ports(codec); in ae7_post_dsp_asi_setup()
8056 static void ca0132_setup_defaults(struct hda_codec *codec) in ca0132_setup_defaults() argument
8058 struct ca0132_spec *spec = codec->spec; in ca0132_setup_defaults()
8063 if (spec->dsp_state != DSP_DOWNLOADED) in ca0132_setup_defaults()
8068 for (idx = 0; idx < num_fx; idx++) { in ca0132_setup_defaults()
8069 for (i = 0; i <= ca0132_effects[idx].params; i++) { in ca0132_setup_defaults()
8070 dspio_set_uint_param(codec, ca0132_effects[idx].mid, in ca0132_setup_defaults()
8078 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in ca0132_setup_defaults()
8081 dspio_set_uint_param(codec, 0x8f, 0x01, tmp); in ca0132_setup_defaults()
8085 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_setup_defaults()
8086 dspio_set_uint_param(codec, 0x80, 0x01, tmp); in ca0132_setup_defaults()
8090 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_setup_defaults()
8094 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in ca0132_setup_defaults()
8101 static void r3d_setup_defaults(struct hda_codec *codec) in r3d_setup_defaults() argument
8103 struct ca0132_spec *spec = codec->spec; in r3d_setup_defaults()
8108 if (spec->dsp_state != DSP_DOWNLOADED) in r3d_setup_defaults()
8111 ca0132_alt_dsp_scp_startup(codec); in r3d_setup_defaults()
8112 ca0132_alt_init_analog_mics(codec); in r3d_setup_defaults()
8116 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in r3d_setup_defaults()
8120 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in r3d_setup_defaults()
8121 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000); in r3d_setup_defaults()
8124 dspio_set_uint_param(codec, 0x32, 0x00, tmp); in r3d_setup_defaults()
8127 r3di_gpio_dsp_status_set(codec, R3DI_DSP_DOWNLOADED); in r3d_setup_defaults()
8131 ca0113_mmio_gpio_set(codec, 2, false); in r3d_setup_defaults()
8132 ca0113_mmio_gpio_set(codec, 4, true); in r3d_setup_defaults()
8137 for (idx = 0; idx < num_fx; idx++) { in r3d_setup_defaults()
8138 for (i = 0; i <= ca0132_effects[idx].params; i++) { in r3d_setup_defaults()
8139 dspio_set_uint_param(codec, in r3d_setup_defaults()
8151 static void sbz_setup_defaults(struct hda_codec *codec) in sbz_setup_defaults() argument
8153 struct ca0132_spec *spec = codec->spec; in sbz_setup_defaults()
8158 if (spec->dsp_state != DSP_DOWNLOADED) in sbz_setup_defaults()
8161 ca0132_alt_dsp_scp_startup(codec); in sbz_setup_defaults()
8162 ca0132_alt_init_analog_mics(codec); in sbz_setup_defaults()
8163 sbz_connect_streams(codec); in sbz_setup_defaults()
8164 sbz_chipio_startup_data(codec); in sbz_setup_defaults()
8166 chipio_set_stream_control(codec, 0x03, 1); in sbz_setup_defaults()
8167 chipio_set_stream_control(codec, 0x04, 1); in sbz_setup_defaults()
8174 dspio_set_uint_param(codec, 0x37, 0x08, tmp); in sbz_setup_defaults()
8175 dspio_set_uint_param(codec, 0x37, 0x10, tmp); in sbz_setup_defaults()
8179 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in sbz_setup_defaults()
8183 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in sbz_setup_defaults()
8184 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000); in sbz_setup_defaults()
8187 dspio_set_uint_param(codec, 0x32, 0x00, tmp); in sbz_setup_defaults()
8189 ca0132_alt_dsp_initial_mic_setup(codec); in sbz_setup_defaults()
8193 for (idx = 0; idx < num_fx; idx++) { in sbz_setup_defaults()
8194 for (i = 0; i <= ca0132_effects[idx].params; i++) { in sbz_setup_defaults()
8195 dspio_set_uint_param(codec, in sbz_setup_defaults()
8202 ca0132_alt_init_speaker_tuning(codec); in sbz_setup_defaults()
8204 ca0132_alt_create_dummy_stream(codec); in sbz_setup_defaults()
8208 * Setup default parameters for the Sound BlasterX AE-5 DSP.
8210 static void ae5_setup_defaults(struct hda_codec *codec) in ae5_setup_defaults() argument
8212 struct ca0132_spec *spec = codec->spec; in ae5_setup_defaults()
8217 if (spec->dsp_state != DSP_DOWNLOADED) in ae5_setup_defaults()
8220 ca0132_alt_dsp_scp_startup(codec); in ae5_setup_defaults()
8221 ca0132_alt_init_analog_mics(codec); in ae5_setup_defaults()
8222 chipio_set_stream_control(codec, 0x03, 1); in ae5_setup_defaults()
8223 chipio_set_stream_control(codec, 0x04, 1); in ae5_setup_defaults()
8227 dspio_set_uint_param(codec, 0x96, 0x29, tmp); in ae5_setup_defaults()
8228 dspio_set_uint_param(codec, 0x96, 0x2a, tmp); in ae5_setup_defaults()
8229 dspio_set_uint_param(codec, 0x80, 0x0d, tmp); in ae5_setup_defaults()
8230 dspio_set_uint_param(codec, 0x80, 0x0e, tmp); in ae5_setup_defaults()
8232 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f); in ae5_setup_defaults()
8233 ca0113_mmio_gpio_set(codec, 0, false); in ae5_setup_defaults()
8234 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ae5_setup_defaults()
8238 dspio_set_uint_param(codec, 0x37, 0x08, tmp); in ae5_setup_defaults()
8239 dspio_set_uint_param(codec, 0x37, 0x10, tmp); in ae5_setup_defaults()
8243 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in ae5_setup_defaults()
8247 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in ae5_setup_defaults()
8248 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000); in ae5_setup_defaults()
8251 dspio_set_uint_param(codec, 0x32, 0x00, tmp); in ae5_setup_defaults()
8253 ca0132_alt_dsp_initial_mic_setup(codec); in ae5_setup_defaults()
8254 ae5_post_dsp_register_set(codec); in ae5_setup_defaults()
8255 ae5_post_dsp_param_setup(codec); in ae5_setup_defaults()
8256 ae5_post_dsp_pll_setup(codec); in ae5_setup_defaults()
8257 ae5_post_dsp_stream_setup(codec); in ae5_setup_defaults()
8258 ae5_post_dsp_startup_data(codec); in ae5_setup_defaults()
8262 for (idx = 0; idx < num_fx; idx++) { in ae5_setup_defaults()
8263 for (i = 0; i <= ca0132_effects[idx].params; i++) { in ae5_setup_defaults()
8264 dspio_set_uint_param(codec, in ae5_setup_defaults()
8271 ca0132_alt_init_speaker_tuning(codec); in ae5_setup_defaults()
8273 ca0132_alt_create_dummy_stream(codec); in ae5_setup_defaults()
8277 * Setup default parameters for the Sound Blaster AE-7 DSP.
8279 static void ae7_setup_defaults(struct hda_codec *codec) in ae7_setup_defaults() argument
8281 struct ca0132_spec *spec = codec->spec; in ae7_setup_defaults()
8286 if (spec->dsp_state != DSP_DOWNLOADED) in ae7_setup_defaults()
8289 ca0132_alt_dsp_scp_startup(codec); in ae7_setup_defaults()
8290 ca0132_alt_init_analog_mics(codec); in ae7_setup_defaults()
8291 ae7_post_dsp_setup_ports(codec); in ae7_setup_defaults()
8294 dspio_set_uint_param(codec, 0x96, in ae7_setup_defaults()
8296 dspio_set_uint_param(codec, 0x96, in ae7_setup_defaults()
8299 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f); in ae7_setup_defaults()
8302 dspio_set_uint_param(codec, 0x80, 0x0d, tmp); in ae7_setup_defaults()
8303 dspio_set_uint_param(codec, 0x80, 0x0e, tmp); in ae7_setup_defaults()
8305 ca0113_mmio_gpio_set(codec, 0, false); in ae7_setup_defaults()
8309 dspio_set_uint_param(codec, 0x37, 0x08, tmp); in ae7_setup_defaults()
8310 dspio_set_uint_param(codec, 0x37, 0x10, tmp); in ae7_setup_defaults()
8314 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in ae7_setup_defaults()
8318 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in ae7_setup_defaults()
8319 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000); in ae7_setup_defaults()
8322 dspio_set_uint_param(codec, 0x32, 0x00, tmp); in ae7_setup_defaults()
8323 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ae7_setup_defaults()
8329 ca0132_alt_init_analog_mics(codec); in ae7_setup_defaults()
8331 ae7_post_dsp_asi_setup(codec); in ae7_setup_defaults()
8334 * Not sure why, but these are both set to 1. They're only set to 0 in ae7_setup_defaults()
8337 ca0113_mmio_gpio_set(codec, 0, true); in ae7_setup_defaults()
8338 ca0113_mmio_gpio_set(codec, 1, true); in ae7_setup_defaults()
8341 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x04); in ae7_setup_defaults()
8342 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x04); in ae7_setup_defaults()
8343 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x80); in ae7_setup_defaults()
8347 for (idx = 0; idx < num_fx; idx++) { in ae7_setup_defaults()
8348 for (i = 0; i <= ca0132_effects[idx].params; i++) { in ae7_setup_defaults()
8349 dspio_set_uint_param(codec, in ae7_setup_defaults()
8356 ca0132_alt_init_speaker_tuning(codec); in ae7_setup_defaults()
8358 ca0132_alt_create_dummy_stream(codec); in ae7_setup_defaults()
8364 static void ca0132_init_flags(struct hda_codec *codec) in ca0132_init_flags() argument
8366 struct ca0132_spec *spec = codec->spec; in ca0132_init_flags()
8369 chipio_set_control_flag(codec, CONTROL_FLAG_DSP_96KHZ, 1); in ca0132_init_flags()
8370 chipio_set_control_flag(codec, CONTROL_FLAG_DAC_96KHZ, 1); in ca0132_init_flags()
8371 chipio_set_control_flag(codec, CONTROL_FLAG_ADC_B_96KHZ, 1); in ca0132_init_flags()
8372 chipio_set_control_flag(codec, CONTROL_FLAG_ADC_C_96KHZ, 1); in ca0132_init_flags()
8373 chipio_set_control_flag(codec, CONTROL_FLAG_SRC_RATE_96KHZ, 1); in ca0132_init_flags()
8374 chipio_set_control_flag(codec, CONTROL_FLAG_IDLE_ENABLE, 0); in ca0132_init_flags()
8375 chipio_set_control_flag(codec, CONTROL_FLAG_SPDIF2OUT, 0); in ca0132_init_flags()
8376 chipio_set_control_flag(codec, in ca0132_init_flags()
8377 CONTROL_FLAG_PORT_D_10KOHM_LOAD, 0); in ca0132_init_flags()
8378 chipio_set_control_flag(codec, in ca0132_init_flags()
8381 chipio_set_control_flag(codec, CONTROL_FLAG_IDLE_ENABLE, 0); in ca0132_init_flags()
8382 chipio_set_control_flag(codec, in ca0132_init_flags()
8383 CONTROL_FLAG_PORT_A_COMMON_MODE, 0); in ca0132_init_flags()
8384 chipio_set_control_flag(codec, in ca0132_init_flags()
8385 CONTROL_FLAG_PORT_D_COMMON_MODE, 0); in ca0132_init_flags()
8386 chipio_set_control_flag(codec, in ca0132_init_flags()
8387 CONTROL_FLAG_PORT_A_10KOHM_LOAD, 0); in ca0132_init_flags()
8388 chipio_set_control_flag(codec, in ca0132_init_flags()
8389 CONTROL_FLAG_PORT_D_10KOHM_LOAD, 0); in ca0132_init_flags()
8390 chipio_set_control_flag(codec, CONTROL_FLAG_ADC_C_HIGH_PASS, 1); in ca0132_init_flags()
8397 static void ca0132_init_params(struct hda_codec *codec) in ca0132_init_params() argument
8399 struct ca0132_spec *spec = codec->spec; in ca0132_init_params()
8402 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000); in ca0132_init_params()
8403 chipio_set_conn_rate(codec, 0x0B, SR_48_000); in ca0132_init_params()
8404 chipio_set_control_param(codec, CONTROL_PARAM_SPDIF1_SOURCE, 0); in ca0132_init_params()
8405 chipio_set_control_param(codec, 0, 0); in ca0132_init_params()
8406 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, 0); in ca0132_init_params()
8409 chipio_set_control_param(codec, CONTROL_PARAM_PORTA_160OHM_GAIN, 6); in ca0132_init_params()
8410 chipio_set_control_param(codec, CONTROL_PARAM_PORTD_160OHM_GAIN, 6); in ca0132_init_params()
8413 static void ca0132_set_dsp_msr(struct hda_codec *codec, bool is96k) in ca0132_set_dsp_msr() argument
8415 chipio_set_control_flag(codec, CONTROL_FLAG_DSP_96KHZ, is96k); in ca0132_set_dsp_msr()
8416 chipio_set_control_flag(codec, CONTROL_FLAG_DAC_96KHZ, is96k); in ca0132_set_dsp_msr()
8417 chipio_set_control_flag(codec, CONTROL_FLAG_SRC_RATE_96KHZ, is96k); in ca0132_set_dsp_msr()
8418 chipio_set_control_flag(codec, CONTROL_FLAG_SRC_CLOCK_196MHZ, is96k); in ca0132_set_dsp_msr()
8419 chipio_set_control_flag(codec, CONTROL_FLAG_ADC_B_96KHZ, is96k); in ca0132_set_dsp_msr()
8420 chipio_set_control_flag(codec, CONTROL_FLAG_ADC_C_96KHZ, is96k); in ca0132_set_dsp_msr()
8422 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); in ca0132_set_dsp_msr()
8423 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); in ca0132_set_dsp_msr()
8424 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000); in ca0132_set_dsp_msr()
8427 static bool ca0132_download_dsp_images(struct hda_codec *codec) in ca0132_download_dsp_images() argument
8430 struct ca0132_spec *spec = codec->spec; in ca0132_download_dsp_images()
8443 codec->card->dev) != 0) in ca0132_download_dsp_images()
8444 codec_dbg(codec, "Desktop firmware not found."); in ca0132_download_dsp_images()
8446 codec_dbg(codec, "Desktop firmware selected."); in ca0132_download_dsp_images()
8450 codec->card->dev) != 0) in ca0132_download_dsp_images()
8451 codec_dbg(codec, "Recon3Di alt firmware not detected."); in ca0132_download_dsp_images()
8453 codec_dbg(codec, "Recon3Di firmware selected."); in ca0132_download_dsp_images()
8460 * exists for your particular codec. in ca0132_download_dsp_images()
8463 codec_dbg(codec, "Default firmware selected."); in ca0132_download_dsp_images()
8465 codec->card->dev) != 0) in ca0132_download_dsp_images()
8469 dsp_os_image = (struct dsp_image_seg *)(fw_entry->data); in ca0132_download_dsp_images()
8470 if (dspload_image(codec, dsp_os_image, 0, 0, true, 0)) { in ca0132_download_dsp_images()
8471 codec_err(codec, "ca0132 DSP load image failed\n"); in ca0132_download_dsp_images()
8475 dsp_loaded = dspload_wait_loaded(codec); in ca0132_download_dsp_images()
8483 static void ca0132_download_dsp(struct hda_codec *codec) in ca0132_download_dsp() argument
8485 struct ca0132_spec *spec = codec->spec; in ca0132_download_dsp()
8491 if (spec->dsp_state == DSP_DOWNLOAD_FAILED) in ca0132_download_dsp()
8494 chipio_enable_clocks(codec); in ca0132_download_dsp()
8495 if (spec->dsp_state != DSP_DOWNLOADED) { in ca0132_download_dsp()
8496 spec->dsp_state = DSP_DOWNLOADING; in ca0132_download_dsp()
8498 if (!ca0132_download_dsp_images(codec)) in ca0132_download_dsp()
8499 spec->dsp_state = DSP_DOWNLOAD_FAILED; in ca0132_download_dsp()
8501 spec->dsp_state = DSP_DOWNLOADED; in ca0132_download_dsp()
8505 if (spec->dsp_state == DSP_DOWNLOADED && !ca0132_use_alt_functions(spec)) in ca0132_download_dsp()
8506 ca0132_set_dsp_msr(codec, true); in ca0132_download_dsp()
8509 static void ca0132_process_dsp_response(struct hda_codec *codec, in ca0132_process_dsp_response() argument
8512 struct ca0132_spec *spec = codec->spec; in ca0132_process_dsp_response()
8514 codec_dbg(codec, "ca0132_process_dsp_response\n"); in ca0132_process_dsp_response()
8515 snd_hda_power_up_pm(codec); in ca0132_process_dsp_response()
8516 if (spec->wait_scp) { in ca0132_process_dsp_response()
8517 if (dspio_get_response_data(codec) >= 0) in ca0132_process_dsp_response()
8518 spec->wait_scp = 0; in ca0132_process_dsp_response()
8521 dspio_clear_response_queue(codec); in ca0132_process_dsp_response()
8522 snd_hda_power_down_pm(codec); in ca0132_process_dsp_response()
8525 static void hp_callback(struct hda_codec *codec, struct hda_jack_callback *cb) in hp_callback() argument
8527 struct ca0132_spec *spec = codec->spec; in hp_callback()
8530 /* Delay enabling the HP amp, to let the mic-detection in hp_callback()
8533 tbl = snd_hda_jack_tbl_get(codec, cb->nid); in hp_callback()
8535 tbl->block_report = 1; in hp_callback()
8536 schedule_delayed_work(&spec->unsol_hp_work, msecs_to_jiffies(500)); in hp_callback()
8539 static void amic_callback(struct hda_codec *codec, struct hda_jack_callback *cb) in amic_callback() argument
8541 struct ca0132_spec *spec = codec->spec; in amic_callback()
8544 ca0132_alt_select_in(codec); in amic_callback()
8546 ca0132_select_mic(codec); in amic_callback()
8549 static void ca0132_init_unsol(struct hda_codec *codec) in ca0132_init_unsol() argument
8551 struct ca0132_spec *spec = codec->spec; in ca0132_init_unsol()
8552 snd_hda_jack_detect_enable_callback(codec, spec->unsol_tag_hp, hp_callback); in ca0132_init_unsol()
8553 snd_hda_jack_detect_enable_callback(codec, spec->unsol_tag_amic1, in ca0132_init_unsol()
8555 snd_hda_jack_detect_enable_callback(codec, UNSOL_TAG_DSP, in ca0132_init_unsol()
8559 snd_hda_jack_detect_enable_callback(codec, in ca0132_init_unsol()
8560 spec->unsol_tag_front_hp, hp_callback); in ca0132_init_unsol()
8570 {0x15, VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE, 0x1},
8577 {0x01, AC_VERB_SET_POWER_STATE, 0x03},
8579 {0x15, VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE, 0},
8587 {0x15, 0x70D, 0xF0},
8588 {0x15, 0x70E, 0xFE},
8589 {0x15, 0x707, 0x75},
8590 {0x15, 0x707, 0xD3},
8591 {0x15, 0x707, 0x09},
8592 {0x15, 0x707, 0x53},
8593 {0x15, 0x707, 0xD4},
8594 {0x15, 0x707, 0xEF},
8595 {0x15, 0x707, 0x75},
8596 {0x15, 0x707, 0xD3},
8597 {0x15, 0x707, 0x09},
8598 {0x15, 0x707, 0x02},
8599 {0x15, 0x707, 0x37},
8600 {0x15, 0x707, 0x78},
8601 {0x15, 0x53C, 0xCE},
8602 {0x15, 0x575, 0xC9},
8603 {0x15, 0x53D, 0xCE},
8604 {0x15, 0x5B7, 0xC9},
8605 {0x15, 0x70D, 0xE8},
8606 {0x15, 0x70E, 0xFE},
8607 {0x15, 0x707, 0x02},
8608 {0x15, 0x707, 0x68},
8609 {0x15, 0x707, 0x62},
8610 {0x15, 0x53A, 0xCE},
8611 {0x15, 0x546, 0xC9},
8612 {0x15, 0x53B, 0xCE},
8613 {0x15, 0x5E8, 0xC9},
8619 {0x15, 0x70D, 0x20},
8620 {0x15, 0x70E, 0x19},
8621 {0x15, 0x707, 0x00},
8622 {0x15, 0x539, 0xCE},
8623 {0x15, 0x546, 0xC9},
8624 {0x15, 0x70D, 0xB7},
8625 {0x15, 0x70E, 0x09},
8626 {0x15, 0x707, 0x10},
8627 {0x15, 0x70D, 0xAF},
8628 {0x15, 0x70E, 0x09},
8629 {0x15, 0x707, 0x01},
8630 {0x15, 0x707, 0x05},
8631 {0x15, 0x70D, 0x73},
8632 {0x15, 0x70E, 0x09},
8633 {0x15, 0x707, 0x14},
8634 {0x15, 0x6FF, 0xC4},
8638 static void ca0132_init_chip(struct hda_codec *codec) in ca0132_init_chip() argument
8640 struct ca0132_spec *spec = codec->spec; in ca0132_init_chip()
8645 mutex_init(&spec->chipio_mutex); in ca0132_init_chip()
8647 spec->cur_out_type = SPEAKER_OUT; in ca0132_init_chip()
8649 spec->cur_mic_type = DIGITAL_MIC; in ca0132_init_chip()
8651 spec->cur_mic_type = REAR_MIC; in ca0132_init_chip()
8653 spec->cur_mic_boost = 0; in ca0132_init_chip()
8655 for (i = 0; i < VNODES_COUNT; i++) { in ca0132_init_chip()
8656 spec->vnode_lvol[i] = 0x5a; in ca0132_init_chip()
8657 spec->vnode_rvol[i] = 0x5a; in ca0132_init_chip()
8658 spec->vnode_lswitch[i] = 0; in ca0132_init_chip()
8659 spec->vnode_rswitch[i] = 0; in ca0132_init_chip()
8666 for (i = 0; i < num_fx; i++) { in ca0132_init_chip()
8667 on = (unsigned int)ca0132_effects[i].reqs[0]; in ca0132_init_chip()
8668 spec->effects_switch[i] = on ? 1 : 0; in ca0132_init_chip()
8672 * ca0132 codecs. Also sets x-bass crossover frequency to 80hz. in ca0132_init_chip()
8676 spec->speaker_range_val[0] = 1; in ca0132_init_chip()
8677 spec->speaker_range_val[1] = 1; in ca0132_init_chip()
8679 spec->xbass_xover_freq = 8; in ca0132_init_chip()
8680 for (i = 0; i < EFFECT_LEVEL_SLIDERS; i++) in ca0132_init_chip()
8681 spec->fx_ctl_val[i] = effect_slider_defaults[i]; in ca0132_init_chip()
8683 spec->bass_redirect_xover_freq = 8; in ca0132_init_chip()
8686 spec->voicefx_val = 0; in ca0132_init_chip()
8687 spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID] = 1; in ca0132_init_chip()
8688 spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID] = 0; in ca0132_init_chip()
8691 * The ZxR doesn't have a front panel header, and it's line-in is on in ca0132_init_chip()
8693 * to make sure that spec->in_enum_val is set properly. in ca0132_init_chip()
8696 spec->in_enum_val = REAR_MIC; in ca0132_init_chip()
8699 ca0132_init_tuning_defaults(codec); in ca0132_init_chip()
8707 static void r3di_gpio_shutdown(struct hda_codec *codec) in r3di_gpio_shutdown() argument
8709 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA, 0x00); in r3di_gpio_shutdown()
8715 static void sbz_region2_exit(struct hda_codec *codec) in sbz_region2_exit() argument
8717 struct ca0132_spec *spec = codec->spec; in sbz_region2_exit()
8720 for (i = 0; i < 4; i++) in sbz_region2_exit()
8721 writeb(0x0, spec->mem_base + 0x100); in sbz_region2_exit()
8722 for (i = 0; i < 8; i++) in sbz_region2_exit()
8723 writeb(0xb3, spec->mem_base + 0x304); in sbz_region2_exit()
8725 ca0113_mmio_gpio_set(codec, 0, false); in sbz_region2_exit()
8726 ca0113_mmio_gpio_set(codec, 1, false); in sbz_region2_exit()
8727 ca0113_mmio_gpio_set(codec, 4, true); in sbz_region2_exit()
8728 ca0113_mmio_gpio_set(codec, 5, false); in sbz_region2_exit()
8729 ca0113_mmio_gpio_set(codec, 7, false); in sbz_region2_exit()
8732 static void sbz_set_pin_ctl_default(struct hda_codec *codec) in sbz_set_pin_ctl_default() argument
8734 static const hda_nid_t pins[] = {0x0B, 0x0C, 0x0E, 0x12, 0x13}; in sbz_set_pin_ctl_default()
8737 snd_hda_codec_write(codec, 0x11, 0, in sbz_set_pin_ctl_default()
8738 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x40); in sbz_set_pin_ctl_default()
8740 for (i = 0; i < ARRAY_SIZE(pins); i++) in sbz_set_pin_ctl_default()
8741 snd_hda_codec_write(codec, pins[i], 0, in sbz_set_pin_ctl_default()
8742 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x00); in sbz_set_pin_ctl_default()
8745 static void ca0132_clear_unsolicited(struct hda_codec *codec) in ca0132_clear_unsolicited() argument
8747 static const hda_nid_t pins[] = {0x0B, 0x0E, 0x0F, 0x10, 0x11, 0x12, 0x13}; in ca0132_clear_unsolicited()
8750 for (i = 0; i < ARRAY_SIZE(pins); i++) { in ca0132_clear_unsolicited()
8751 snd_hda_codec_write(codec, pins[i], 0, in ca0132_clear_unsolicited()
8752 AC_VERB_SET_UNSOLICITED_ENABLE, 0x00); in ca0132_clear_unsolicited()
8757 static void sbz_gpio_shutdown_commands(struct hda_codec *codec, int dir, in sbz_gpio_shutdown_commands() argument
8760 if (dir >= 0) in sbz_gpio_shutdown_commands()
8761 snd_hda_codec_write(codec, 0x01, 0, in sbz_gpio_shutdown_commands()
8763 if (mask >= 0) in sbz_gpio_shutdown_commands()
8764 snd_hda_codec_write(codec, 0x01, 0, in sbz_gpio_shutdown_commands()
8767 if (data >= 0) in sbz_gpio_shutdown_commands()
8768 snd_hda_codec_write(codec, 0x01, 0, in sbz_gpio_shutdown_commands()
8772 static void zxr_dbpro_power_state_shutdown(struct hda_codec *codec) in zxr_dbpro_power_state_shutdown() argument
8774 static const hda_nid_t pins[] = {0x05, 0x0c, 0x09, 0x0e, 0x08, 0x11, 0x01}; in zxr_dbpro_power_state_shutdown()
8777 for (i = 0; i < ARRAY_SIZE(pins); i++) in zxr_dbpro_power_state_shutdown()
8778 snd_hda_codec_write(codec, pins[i], 0, in zxr_dbpro_power_state_shutdown()
8779 AC_VERB_SET_POWER_STATE, 0x03); in zxr_dbpro_power_state_shutdown()
8782 static void sbz_exit_chip(struct hda_codec *codec) in sbz_exit_chip() argument
8784 chipio_set_stream_control(codec, 0x03, 0); in sbz_exit_chip()
8785 chipio_set_stream_control(codec, 0x04, 0); in sbz_exit_chip()
8788 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, -1); in sbz_exit_chip()
8789 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x05); in sbz_exit_chip()
8790 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x01); in sbz_exit_chip()
8792 chipio_set_stream_control(codec, 0x14, 0); in sbz_exit_chip()
8793 chipio_set_stream_control(codec, 0x0C, 0); in sbz_exit_chip()
8795 chipio_set_conn_rate(codec, 0x41, SR_192_000); in sbz_exit_chip()
8796 chipio_set_conn_rate(codec, 0x91, SR_192_000); in sbz_exit_chip()
8798 chipio_write(codec, 0x18a020, 0x00000083); in sbz_exit_chip()
8800 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x03); in sbz_exit_chip()
8801 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x07); in sbz_exit_chip()
8802 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x06); in sbz_exit_chip()
8804 chipio_set_stream_control(codec, 0x0C, 0); in sbz_exit_chip()
8806 chipio_set_control_param(codec, 0x0D, 0x24); in sbz_exit_chip()
8808 ca0132_clear_unsolicited(codec); in sbz_exit_chip()
8809 sbz_set_pin_ctl_default(codec); in sbz_exit_chip()
8811 snd_hda_codec_write(codec, 0x0B, 0, in sbz_exit_chip()
8812 AC_VERB_SET_EAPD_BTLENABLE, 0x00); in sbz_exit_chip()
8814 sbz_region2_exit(codec); in sbz_exit_chip()
8817 static void r3d_exit_chip(struct hda_codec *codec) in r3d_exit_chip() argument
8819 ca0132_clear_unsolicited(codec); in r3d_exit_chip()
8820 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in r3d_exit_chip()
8821 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x5b); in r3d_exit_chip()
8824 static void ae5_exit_chip(struct hda_codec *codec) in ae5_exit_chip() argument
8826 chipio_set_stream_control(codec, 0x03, 0); in ae5_exit_chip()
8827 chipio_set_stream_control(codec, 0x04, 0); in ae5_exit_chip()
8829 ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f); in ae5_exit_chip()
8830 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_exit_chip()
8831 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_exit_chip()
8832 ca0113_mmio_command_set(codec, 0x30, 0x30, 0x00); in ae5_exit_chip()
8833 ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x00); in ae5_exit_chip()
8834 ca0113_mmio_command_set(codec, 0x30, 0x2d, 0x00); in ae5_exit_chip()
8835 ca0113_mmio_gpio_set(codec, 0, false); in ae5_exit_chip()
8836 ca0113_mmio_gpio_set(codec, 1, false); in ae5_exit_chip()
8838 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in ae5_exit_chip()
8839 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53); in ae5_exit_chip()
8841 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0); in ae5_exit_chip()
8843 chipio_set_stream_control(codec, 0x18, 0); in ae5_exit_chip()
8844 chipio_set_stream_control(codec, 0x0c, 0); in ae5_exit_chip()
8846 snd_hda_codec_write(codec, 0x01, 0, 0x724, 0x83); in ae5_exit_chip()
8849 static void ae7_exit_chip(struct hda_codec *codec) in ae7_exit_chip() argument
8851 chipio_set_stream_control(codec, 0x18, 0); in ae7_exit_chip()
8852 chipio_set_stream_source_dest(codec, 0x21, 0xc8, 0xc8); in ae7_exit_chip()
8853 chipio_set_stream_channels(codec, 0x21, 0); in ae7_exit_chip()
8854 chipio_set_control_param(codec, CONTROL_PARAM_NODE_ID, 0x09); in ae7_exit_chip()
8855 chipio_set_control_param(codec, 0x20, 0x01); in ae7_exit_chip()
8857 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0); in ae7_exit_chip()
8859 chipio_set_stream_control(codec, 0x18, 0); in ae7_exit_chip()
8860 chipio_set_stream_control(codec, 0x0c, 0); in ae7_exit_chip()
8862 ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x00); in ae7_exit_chip()
8863 snd_hda_codec_write(codec, 0x15, 0, 0x724, 0x83); in ae7_exit_chip()
8864 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae7_exit_chip()
8865 ca0113_mmio_command_set(codec, 0x30, 0x30, 0x00); in ae7_exit_chip()
8866 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x00); in ae7_exit_chip()
8867 ca0113_mmio_gpio_set(codec, 0, false); in ae7_exit_chip()
8868 ca0113_mmio_gpio_set(codec, 1, false); in ae7_exit_chip()
8869 ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f); in ae7_exit_chip()
8871 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in ae7_exit_chip()
8872 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53); in ae7_exit_chip()
8875 static void zxr_exit_chip(struct hda_codec *codec) in zxr_exit_chip() argument
8877 chipio_set_stream_control(codec, 0x03, 0); in zxr_exit_chip()
8878 chipio_set_stream_control(codec, 0x04, 0); in zxr_exit_chip()
8879 chipio_set_stream_control(codec, 0x14, 0); in zxr_exit_chip()
8880 chipio_set_stream_control(codec, 0x0C, 0); in zxr_exit_chip()
8882 chipio_set_conn_rate(codec, 0x41, SR_192_000); in zxr_exit_chip()
8883 chipio_set_conn_rate(codec, 0x91, SR_192_000); in zxr_exit_chip()
8885 chipio_write(codec, 0x18a020, 0x00000083); in zxr_exit_chip()
8887 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in zxr_exit_chip()
8888 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53); in zxr_exit_chip()
8890 ca0132_clear_unsolicited(codec); in zxr_exit_chip()
8891 sbz_set_pin_ctl_default(codec); in zxr_exit_chip()
8892 snd_hda_codec_write(codec, 0x0B, 0, AC_VERB_SET_EAPD_BTLENABLE, 0x00); in zxr_exit_chip()
8894 ca0113_mmio_gpio_set(codec, 5, false); in zxr_exit_chip()
8895 ca0113_mmio_gpio_set(codec, 2, false); in zxr_exit_chip()
8896 ca0113_mmio_gpio_set(codec, 3, false); in zxr_exit_chip()
8897 ca0113_mmio_gpio_set(codec, 0, false); in zxr_exit_chip()
8898 ca0113_mmio_gpio_set(codec, 4, true); in zxr_exit_chip()
8899 ca0113_mmio_gpio_set(codec, 0, true); in zxr_exit_chip()
8900 ca0113_mmio_gpio_set(codec, 5, true); in zxr_exit_chip()
8901 ca0113_mmio_gpio_set(codec, 2, false); in zxr_exit_chip()
8902 ca0113_mmio_gpio_set(codec, 3, false); in zxr_exit_chip()
8905 static void ca0132_exit_chip(struct hda_codec *codec) in ca0132_exit_chip() argument
8909 if (dspload_is_loaded(codec)) in ca0132_exit_chip()
8910 dsp_reset(codec); in ca0132_exit_chip()
8921 static void sbz_dsp_startup_check(struct hda_codec *codec) in sbz_dsp_startup_check() argument
8923 struct ca0132_spec *spec = codec->spec; in sbz_dsp_startup_check()
8925 unsigned int cur_address = 0x390; in sbz_dsp_startup_check()
8927 unsigned int failure = 0; in sbz_dsp_startup_check()
8930 if (spec->startup_check_entered) in sbz_dsp_startup_check()
8933 spec->startup_check_entered = true; in sbz_dsp_startup_check()
8935 for (i = 0; i < 4; i++) { in sbz_dsp_startup_check()
8936 chipio_read(codec, cur_address, &dsp_data_check[i]); in sbz_dsp_startup_check()
8937 cur_address += 0x4; in sbz_dsp_startup_check()
8939 for (i = 0; i < 4; i++) { in sbz_dsp_startup_check()
8940 if (dsp_data_check[i] == 0xa1a2a3a4) in sbz_dsp_startup_check()
8944 codec_dbg(codec, "Startup Check: %d ", failure); in sbz_dsp_startup_check()
8946 codec_info(codec, "DSP not initialized properly. Attempting to fix."); in sbz_dsp_startup_check()
8952 while (failure && (reload != 0)) { in sbz_dsp_startup_check()
8953 codec_info(codec, "Reloading... Tries left: %d", reload); in sbz_dsp_startup_check()
8954 sbz_exit_chip(codec); in sbz_dsp_startup_check()
8955 spec->dsp_state = DSP_DOWNLOAD_INIT; in sbz_dsp_startup_check()
8956 codec->patch_ops.init(codec); in sbz_dsp_startup_check()
8957 failure = 0; in sbz_dsp_startup_check()
8958 for (i = 0; i < 4; i++) { in sbz_dsp_startup_check()
8959 chipio_read(codec, cur_address, &dsp_data_check[i]); in sbz_dsp_startup_check()
8960 cur_address += 0x4; in sbz_dsp_startup_check()
8962 for (i = 0; i < 4; i++) { in sbz_dsp_startup_check()
8963 if (dsp_data_check[i] == 0xa1a2a3a4) in sbz_dsp_startup_check()
8966 reload--; in sbz_dsp_startup_check()
8970 codec_info(codec, "DSP fixed."); in sbz_dsp_startup_check()
8975 …codec_info(codec, "DSP failed to initialize properly. Either try a full shutdown or a suspend to c… in sbz_dsp_startup_check()
8979 * This is for the extra volume verbs 0x797 (left) and 0x798 (right). These add
8984 * to 0 just incase a value has lingered from a boot into Windows.
8986 static void ca0132_alt_vol_setup(struct hda_codec *codec) in ca0132_alt_vol_setup() argument
8988 snd_hda_codec_write(codec, 0x02, 0, 0x797, 0x00); in ca0132_alt_vol_setup()
8989 snd_hda_codec_write(codec, 0x02, 0, 0x798, 0x00); in ca0132_alt_vol_setup()
8990 snd_hda_codec_write(codec, 0x03, 0, 0x797, 0x00); in ca0132_alt_vol_setup()
8991 snd_hda_codec_write(codec, 0x03, 0, 0x798, 0x00); in ca0132_alt_vol_setup()
8992 snd_hda_codec_write(codec, 0x04, 0, 0x797, 0x00); in ca0132_alt_vol_setup()
8993 snd_hda_codec_write(codec, 0x04, 0, 0x798, 0x00); in ca0132_alt_vol_setup()
8994 snd_hda_codec_write(codec, 0x07, 0, 0x797, 0x00); in ca0132_alt_vol_setup()
8995 snd_hda_codec_write(codec, 0x07, 0, 0x798, 0x00); in ca0132_alt_vol_setup()
9001 static void sbz_pre_dsp_setup(struct hda_codec *codec) in sbz_pre_dsp_setup() argument
9003 struct ca0132_spec *spec = codec->spec; in sbz_pre_dsp_setup()
9005 writel(0x00820680, spec->mem_base + 0x01C); in sbz_pre_dsp_setup()
9006 writel(0x00820680, spec->mem_base + 0x01C); in sbz_pre_dsp_setup()
9008 chipio_write(codec, 0x18b0a4, 0x000000c2); in sbz_pre_dsp_setup()
9010 snd_hda_codec_write(codec, 0x11, 0, in sbz_pre_dsp_setup()
9011 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x44); in sbz_pre_dsp_setup()
9014 static void r3d_pre_dsp_setup(struct hda_codec *codec) in r3d_pre_dsp_setup() argument
9016 chipio_write(codec, 0x18b0a4, 0x000000c2); in r3d_pre_dsp_setup()
9018 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3d_pre_dsp_setup()
9019 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x1E); in r3d_pre_dsp_setup()
9020 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3d_pre_dsp_setup()
9021 VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0x1C); in r3d_pre_dsp_setup()
9022 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3d_pre_dsp_setup()
9023 VENDOR_CHIPIO_8051_DATA_WRITE, 0x5B); in r3d_pre_dsp_setup()
9025 snd_hda_codec_write(codec, 0x11, 0, in r3d_pre_dsp_setup()
9026 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x44); in r3d_pre_dsp_setup()
9029 static void r3di_pre_dsp_setup(struct hda_codec *codec) in r3di_pre_dsp_setup() argument
9031 chipio_write(codec, 0x18b0a4, 0x000000c2); in r3di_pre_dsp_setup()
9033 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3di_pre_dsp_setup()
9034 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x1E); in r3di_pre_dsp_setup()
9035 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3di_pre_dsp_setup()
9036 VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0x1C); in r3di_pre_dsp_setup()
9037 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3di_pre_dsp_setup()
9038 VENDOR_CHIPIO_8051_DATA_WRITE, 0x5B); in r3di_pre_dsp_setup()
9040 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3di_pre_dsp_setup()
9041 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x20); in r3di_pre_dsp_setup()
9042 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3di_pre_dsp_setup()
9043 VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0x19); in r3di_pre_dsp_setup()
9044 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3di_pre_dsp_setup()
9045 VENDOR_CHIPIO_8051_DATA_WRITE, 0x00); in r3di_pre_dsp_setup()
9046 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3di_pre_dsp_setup()
9047 VENDOR_CHIPIO_8051_DATA_WRITE, 0x40); in r3di_pre_dsp_setup()
9049 snd_hda_codec_write(codec, 0x11, 0, in r3di_pre_dsp_setup()
9050 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x04); in r3di_pre_dsp_setup()
9059 0x400, 0x408, 0x40c, 0x01c, 0xc0c, 0xc00, 0xc04, 0xc0c, 0xc0c, 0xc0c,
9060 0xc0c, 0xc08, 0xc08, 0xc08, 0xc08, 0xc08, 0xc04
9064 0x00000030, 0x00000000, 0x00000003, 0x00000003, 0x00000003,
9065 0x00000003, 0x000000c1, 0x000000f1, 0x00000001, 0x000000c7,
9066 0x000000c1, 0x00000080
9070 0x00000030, 0x00000000, 0x00000000, 0x00000003, 0x00000003,
9071 0x00000003, 0x00000001, 0x000000f1, 0x00000001, 0x000000c7,
9072 0x000000c1, 0x00000080
9076 0x400, 0x42c, 0x46c, 0x4ac, 0x4ec, 0x43c, 0x47c, 0x4bc, 0x4fc, 0x408,
9077 0x100, 0x410, 0x40c, 0x100, 0x100, 0x830, 0x86c, 0x800, 0x86c, 0x800,
9078 0x804, 0x20c, 0x01c, 0xc0c, 0xc00, 0xc04, 0xc0c, 0xc0c, 0xc0c, 0xc0c,
9079 0xc08, 0xc08, 0xc08, 0xc08, 0xc08, 0xc04, 0x01c
9083 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
9084 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000001,
9085 0x00000600, 0x00000014, 0x00000001, 0x0000060f, 0x0000070f,
9086 0x00000aff, 0x00000000, 0x0000006b, 0x00000001, 0x0000006b,
9087 0x00000057, 0x00800000, 0x00880680, 0x00000080, 0x00000030,
9088 0x00000000, 0x00000000, 0x00000003, 0x00000003, 0x00000003,
9089 0x00000001, 0x000000f1, 0x00000001, 0x000000c7, 0x000000c1,
9090 0x00000080, 0x00880680
9093 static void ca0132_mmio_init_sbz(struct hda_codec *codec) in ca0132_mmio_init_sbz() argument
9095 struct ca0132_spec *spec = codec->spec; in ca0132_mmio_init_sbz()
9100 for (i = 0; i < 3; i++) in ca0132_mmio_init_sbz()
9101 writel(0x00000000, spec->mem_base + addr[i]); in ca0132_mmio_init_sbz()
9106 tmp[0] = 0x00880480; in ca0132_mmio_init_sbz()
9107 tmp[1] = 0x00000080; in ca0132_mmio_init_sbz()
9110 tmp[0] = 0x00820680; in ca0132_mmio_init_sbz()
9111 tmp[1] = 0x00000083; in ca0132_mmio_init_sbz()
9114 tmp[0] = 0x00880680; in ca0132_mmio_init_sbz()
9115 tmp[1] = 0x00000083; in ca0132_mmio_init_sbz()
9118 tmp[0] = 0x00000000; in ca0132_mmio_init_sbz()
9119 tmp[1] = 0x00000000; in ca0132_mmio_init_sbz()
9123 for (i = 0; i < 2; i++) in ca0132_mmio_init_sbz()
9124 writel(tmp[i], spec->mem_base + addr[cur_addr + i]); in ca0132_mmio_init_sbz()
9139 for (i = 0; i < count; i++) in ca0132_mmio_init_sbz()
9140 writel(data[i], spec->mem_base + addr[cur_addr + i]); in ca0132_mmio_init_sbz()
9143 static void ca0132_mmio_init_ae5(struct hda_codec *codec) in ca0132_mmio_init_ae5() argument
9145 struct ca0132_spec *spec = codec->spec; in ca0132_mmio_init_ae5()
9154 writel(0x00000680, spec->mem_base + 0x1c); in ca0132_mmio_init_ae5()
9155 writel(0x00880680, spec->mem_base + 0x1c); in ca0132_mmio_init_ae5()
9158 for (i = 0; i < count; i++) { in ca0132_mmio_init_ae5()
9160 * AE-7 shares all writes with the AE-5, except that it writes in ca0132_mmio_init_ae5()
9161 * a different value to 0x20c. in ca0132_mmio_init_ae5()
9164 writel(0x00800001, spec->mem_base + addr[i]); in ca0132_mmio_init_ae5()
9168 writel(data[i], spec->mem_base + addr[i]); in ca0132_mmio_init_ae5()
9172 writel(0x00880680, spec->mem_base + 0x1c); in ca0132_mmio_init_ae5()
9175 static void ca0132_mmio_init(struct hda_codec *codec) in ca0132_mmio_init() argument
9177 struct ca0132_spec *spec = codec->spec; in ca0132_mmio_init()
9183 ca0132_mmio_init_sbz(codec); in ca0132_mmio_init()
9186 ca0132_mmio_init_ae5(codec); in ca0132_mmio_init()
9194 0x304, 0x304, 0x304, 0x304, 0x100, 0x304, 0x100, 0x304, 0x100, 0x304,
9195 0x100, 0x304, 0x86c, 0x800, 0x86c, 0x800, 0x804
9199 0x0f, 0x0e, 0x1f, 0x0c, 0x3f, 0x08, 0x7f, 0x00, 0xff, 0x00, 0x6b,
9200 0x01, 0x6b, 0x57
9205 * eventually resets the codec with the 0x7ff verb. Not quite sure why it does
9208 static void ae5_register_set(struct hda_codec *codec) in ae5_register_set() argument
9210 struct ca0132_spec *spec = codec->spec; in ae5_register_set()
9218 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_register_set()
9219 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x41); in ae5_register_set()
9220 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_register_set()
9221 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc8); in ae5_register_set()
9224 chipio_8051_write_direct(codec, 0x93, 0x10); in ae5_register_set()
9225 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_register_set()
9226 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x44); in ae5_register_set()
9227 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_register_set()
9228 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc2); in ae5_register_set()
9231 tmp[0] = 0x03; in ae5_register_set()
9232 tmp[1] = 0x03; in ae5_register_set()
9233 tmp[2] = 0x07; in ae5_register_set()
9235 tmp[0] = 0x0f; in ae5_register_set()
9236 tmp[1] = 0x0f; in ae5_register_set()
9237 tmp[2] = 0x0f; in ae5_register_set()
9240 for (i = cur_addr = 0; i < 3; i++, cur_addr++) in ae5_register_set()
9241 writeb(tmp[i], spec->mem_base + addr[cur_addr]); in ae5_register_set()
9247 for (i = 0; cur_addr < 12; i++, cur_addr++) in ae5_register_set()
9248 writeb(data[i], spec->mem_base + addr[cur_addr]); in ae5_register_set()
9251 writel(data[i], spec->mem_base + addr[cur_addr]); in ae5_register_set()
9253 writel(0x00800001, spec->mem_base + 0x20c); in ae5_register_set()
9256 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae5_register_set()
9257 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f); in ae5_register_set()
9259 ca0113_mmio_command_set(codec, 0x30, 0x2d, 0x3f); in ae5_register_set()
9262 chipio_8051_write_direct(codec, 0x90, 0x00); in ae5_register_set()
9263 chipio_8051_write_direct(codec, 0x90, 0x10); in ae5_register_set()
9266 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_register_set()
9268 chipio_write(codec, 0x18b0a4, 0x000000c2); in ae5_register_set()
9270 snd_hda_codec_write(codec, 0x01, 0, 0x7ff, 0x00); in ae5_register_set()
9271 snd_hda_codec_write(codec, 0x01, 0, 0x7ff, 0x00); in ae5_register_set()
9279 static void ca0132_alt_init(struct hda_codec *codec) in ca0132_alt_init() argument
9281 struct ca0132_spec *spec = codec->spec; in ca0132_alt_init()
9283 ca0132_alt_vol_setup(codec); in ca0132_alt_init()
9287 codec_dbg(codec, "SBZ alt_init"); in ca0132_alt_init()
9288 ca0132_gpio_init(codec); in ca0132_alt_init()
9289 sbz_pre_dsp_setup(codec); in ca0132_alt_init()
9290 snd_hda_sequence_write(codec, spec->chip_init_verbs); in ca0132_alt_init()
9291 snd_hda_sequence_write(codec, spec->desktop_init_verbs); in ca0132_alt_init()
9294 codec_dbg(codec, "R3DI alt_init"); in ca0132_alt_init()
9295 ca0132_gpio_init(codec); in ca0132_alt_init()
9296 ca0132_gpio_setup(codec); in ca0132_alt_init()
9297 r3di_gpio_dsp_status_set(codec, R3DI_DSP_DOWNLOADING); in ca0132_alt_init()
9298 r3di_pre_dsp_setup(codec); in ca0132_alt_init()
9299 snd_hda_sequence_write(codec, spec->chip_init_verbs); in ca0132_alt_init()
9300 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x6FF, 0xC4); in ca0132_alt_init()
9303 r3d_pre_dsp_setup(codec); in ca0132_alt_init()
9304 snd_hda_sequence_write(codec, spec->chip_init_verbs); in ca0132_alt_init()
9305 snd_hda_sequence_write(codec, spec->desktop_init_verbs); in ca0132_alt_init()
9308 ca0132_gpio_init(codec); in ca0132_alt_init()
9309 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_alt_init()
9310 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x49); in ca0132_alt_init()
9311 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_alt_init()
9312 VENDOR_CHIPIO_PLL_PMU_WRITE, 0x88); in ca0132_alt_init()
9313 chipio_write(codec, 0x18b030, 0x00000020); in ca0132_alt_init()
9314 snd_hda_sequence_write(codec, spec->chip_init_verbs); in ca0132_alt_init()
9315 snd_hda_sequence_write(codec, spec->desktop_init_verbs); in ca0132_alt_init()
9316 ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f); in ca0132_alt_init()
9319 ca0132_gpio_init(codec); in ca0132_alt_init()
9320 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_alt_init()
9321 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x49); in ca0132_alt_init()
9322 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_alt_init()
9323 VENDOR_CHIPIO_PLL_PMU_WRITE, 0x88); in ca0132_alt_init()
9324 snd_hda_sequence_write(codec, spec->chip_init_verbs); in ca0132_alt_init()
9325 snd_hda_sequence_write(codec, spec->desktop_init_verbs); in ca0132_alt_init()
9326 chipio_write(codec, 0x18b008, 0x000000f8); in ca0132_alt_init()
9327 chipio_write(codec, 0x18b008, 0x000000f0); in ca0132_alt_init()
9328 chipio_write(codec, 0x18b030, 0x00000020); in ca0132_alt_init()
9329 ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f); in ca0132_alt_init()
9332 snd_hda_sequence_write(codec, spec->chip_init_verbs); in ca0132_alt_init()
9333 snd_hda_sequence_write(codec, spec->desktop_init_verbs); in ca0132_alt_init()
9340 static int ca0132_init(struct hda_codec *codec) in ca0132_init() argument
9342 struct ca0132_spec *spec = codec->spec; in ca0132_init()
9343 struct auto_pin_cfg *cfg = &spec->autocfg; in ca0132_init()
9349 * there's only two reasons for it. One, the codec has awaken from a in ca0132_init()
9357 if (spec->dsp_state == DSP_DOWNLOADED) { in ca0132_init()
9358 dsp_loaded = dspload_is_loaded(codec); in ca0132_init()
9360 spec->dsp_reload = true; in ca0132_init()
9361 spec->dsp_state = DSP_DOWNLOAD_INIT; in ca0132_init()
9364 sbz_dsp_startup_check(codec); in ca0132_init()
9365 return 0; in ca0132_init()
9369 if (spec->dsp_state != DSP_DOWNLOAD_FAILED) in ca0132_init()
9370 spec->dsp_state = DSP_DOWNLOAD_INIT; in ca0132_init()
9371 spec->curr_chip_addx = INVALID_CHIP_ADDRESS; in ca0132_init()
9374 ca0132_mmio_init(codec); in ca0132_init()
9376 snd_hda_power_up_pm(codec); in ca0132_init()
9379 ae5_register_set(codec); in ca0132_init()
9381 ca0132_init_unsol(codec); in ca0132_init()
9382 ca0132_init_params(codec); in ca0132_init()
9383 ca0132_init_flags(codec); in ca0132_init()
9385 snd_hda_sequence_write(codec, spec->base_init_verbs); in ca0132_init()
9388 ca0132_alt_init(codec); in ca0132_init()
9390 ca0132_download_dsp(codec); in ca0132_init()
9392 ca0132_refresh_widget_caps(codec); in ca0132_init()
9397 r3d_setup_defaults(codec); in ca0132_init()
9401 sbz_setup_defaults(codec); in ca0132_init()
9404 ae5_setup_defaults(codec); in ca0132_init()
9407 ae7_setup_defaults(codec); in ca0132_init()
9410 ca0132_setup_defaults(codec); in ca0132_init()
9411 ca0132_init_analog_mic2(codec); in ca0132_init()
9412 ca0132_init_dmic(codec); in ca0132_init()
9416 for (i = 0; i < spec->num_outputs; i++) in ca0132_init()
9417 init_output(codec, spec->out_pins[i], spec->dacs[0]); in ca0132_init()
9419 init_output(codec, cfg->dig_out_pins[0], spec->dig_out); in ca0132_init()
9421 for (i = 0; i < spec->num_inputs; i++) in ca0132_init()
9422 init_input(codec, spec->input_pins[i], spec->adcs[i]); in ca0132_init()
9424 init_input(codec, cfg->dig_in_pin, spec->dig_in); in ca0132_init()
9427 snd_hda_sequence_write(codec, spec->chip_init_verbs); in ca0132_init()
9428 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init()
9429 VENDOR_CHIPIO_PARAM_EX_ID_SET, 0x0D); in ca0132_init()
9430 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init()
9431 VENDOR_CHIPIO_PARAM_EX_VALUE_SET, 0x20); in ca0132_init()
9435 ca0132_gpio_setup(codec); in ca0132_init()
9437 snd_hda_sequence_write(codec, spec->spec_init_verbs); in ca0132_init()
9439 ca0132_alt_select_out(codec); in ca0132_init()
9440 ca0132_alt_select_in(codec); in ca0132_init()
9442 ca0132_select_out(codec); in ca0132_init()
9443 ca0132_select_mic(codec); in ca0132_init()
9446 snd_hda_jack_report_sync(codec); in ca0132_init()
9452 if (spec->dsp_reload) { in ca0132_init()
9453 spec->dsp_reload = false; in ca0132_init()
9454 ca0132_pe_switch_set(codec); in ca0132_init()
9457 snd_hda_power_down_pm(codec); in ca0132_init()
9459 return 0; in ca0132_init()
9462 static int dbpro_init(struct hda_codec *codec) in dbpro_init() argument
9464 struct ca0132_spec *spec = codec->spec; in dbpro_init()
9465 struct auto_pin_cfg *cfg = &spec->autocfg; in dbpro_init()
9468 init_output(codec, cfg->dig_out_pins[0], spec->dig_out); in dbpro_init()
9469 init_input(codec, cfg->dig_in_pin, spec->dig_in); in dbpro_init()
9471 for (i = 0; i < spec->num_inputs; i++) in dbpro_init()
9472 init_input(codec, spec->input_pins[i], spec->adcs[i]); in dbpro_init()
9474 return 0; in dbpro_init()
9477 static void ca0132_free(struct hda_codec *codec) in ca0132_free() argument
9479 struct ca0132_spec *spec = codec->spec; in ca0132_free()
9481 cancel_delayed_work_sync(&spec->unsol_hp_work); in ca0132_free()
9482 snd_hda_power_up(codec); in ca0132_free()
9485 sbz_exit_chip(codec); in ca0132_free()
9488 zxr_exit_chip(codec); in ca0132_free()
9491 r3d_exit_chip(codec); in ca0132_free()
9494 ae5_exit_chip(codec); in ca0132_free()
9497 ae7_exit_chip(codec); in ca0132_free()
9500 r3di_gpio_shutdown(codec); in ca0132_free()
9506 snd_hda_sequence_write(codec, spec->base_exit_verbs); in ca0132_free()
9507 ca0132_exit_chip(codec); in ca0132_free()
9509 snd_hda_power_down(codec); in ca0132_free()
9511 if (spec->mem_base) in ca0132_free()
9512 pci_iounmap(codec->bus->pci, spec->mem_base); in ca0132_free()
9514 kfree(spec->spec_init_verbs); in ca0132_free()
9515 kfree(codec->spec); in ca0132_free()
9518 static void dbpro_free(struct hda_codec *codec) in dbpro_free() argument
9520 struct ca0132_spec *spec = codec->spec; in dbpro_free()
9522 zxr_dbpro_power_state_shutdown(codec); in dbpro_free()
9524 kfree(spec->spec_init_verbs); in dbpro_free()
9525 kfree(codec->spec); in dbpro_free()
9528 static void ca0132_reboot_notify(struct hda_codec *codec) in ca0132_reboot_notify() argument
9530 codec->patch_ops.free(codec); in ca0132_reboot_notify()
9534 static int ca0132_suspend(struct hda_codec *codec) in ca0132_suspend() argument
9536 struct ca0132_spec *spec = codec->spec; in ca0132_suspend()
9538 cancel_delayed_work_sync(&spec->unsol_hp_work); in ca0132_suspend()
9539 return 0; in ca0132_suspend()
9562 static void ca0132_config(struct hda_codec *codec) in ca0132_config() argument
9564 struct ca0132_spec *spec = codec->spec; in ca0132_config()
9566 spec->dacs[0] = 0x2; in ca0132_config()
9567 spec->dacs[1] = 0x3; in ca0132_config()
9568 spec->dacs[2] = 0x4; in ca0132_config()
9570 spec->multiout.dac_nids = spec->dacs; in ca0132_config()
9571 spec->multiout.num_dacs = 3; in ca0132_config()
9574 spec->multiout.max_channels = 2; in ca0132_config()
9576 spec->multiout.max_channels = 6; in ca0132_config()
9580 codec_dbg(codec, "%s: QUIRK_ALIENWARE applied.\n", __func__); in ca0132_config()
9581 snd_hda_apply_pincfgs(codec, alienware_pincfgs); in ca0132_config()
9584 codec_dbg(codec, "%s: QUIRK_SBZ applied.\n", __func__); in ca0132_config()
9585 snd_hda_apply_pincfgs(codec, sbz_pincfgs); in ca0132_config()
9588 codec_dbg(codec, "%s: QUIRK_ZXR applied.\n", __func__); in ca0132_config()
9589 snd_hda_apply_pincfgs(codec, zxr_pincfgs); in ca0132_config()
9592 codec_dbg(codec, "%s: QUIRK_R3D applied.\n", __func__); in ca0132_config()
9593 snd_hda_apply_pincfgs(codec, r3d_pincfgs); in ca0132_config()
9596 codec_dbg(codec, "%s: QUIRK_R3DI applied.\n", __func__); in ca0132_config()
9597 snd_hda_apply_pincfgs(codec, r3di_pincfgs); in ca0132_config()
9600 codec_dbg(codec, "%s: QUIRK_AE5 applied.\n", __func__); in ca0132_config()
9601 snd_hda_apply_pincfgs(codec, ae5_pincfgs); in ca0132_config()
9604 codec_dbg(codec, "%s: QUIRK_AE7 applied.\n", __func__); in ca0132_config()
9605 snd_hda_apply_pincfgs(codec, ae7_pincfgs); in ca0132_config()
9613 spec->num_outputs = 2; in ca0132_config()
9614 spec->out_pins[0] = 0x0b; /* speaker out */ in ca0132_config()
9615 spec->out_pins[1] = 0x0f; in ca0132_config()
9616 spec->shared_out_nid = 0x2; in ca0132_config()
9617 spec->unsol_tag_hp = 0x0f; in ca0132_config()
9619 spec->adcs[0] = 0x7; /* digital mic / analog mic1 */ in ca0132_config()
9620 spec->adcs[1] = 0x8; /* analog mic2 */ in ca0132_config()
9621 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9623 spec->num_inputs = 3; in ca0132_config()
9624 spec->input_pins[0] = 0x12; in ca0132_config()
9625 spec->input_pins[1] = 0x11; in ca0132_config()
9626 spec->input_pins[2] = 0x13; in ca0132_config()
9627 spec->shared_mic_nid = 0x7; in ca0132_config()
9628 spec->unsol_tag_amic1 = 0x11; in ca0132_config()
9632 spec->num_outputs = 2; in ca0132_config()
9633 spec->out_pins[0] = 0x0B; /* Line out */ in ca0132_config()
9634 spec->out_pins[1] = 0x0F; /* Rear headphone out */ in ca0132_config()
9635 spec->out_pins[2] = 0x10; /* Front Headphone / Center/LFE*/ in ca0132_config()
9636 spec->out_pins[3] = 0x11; /* Rear surround */ in ca0132_config()
9637 spec->shared_out_nid = 0x2; in ca0132_config()
9638 spec->unsol_tag_hp = spec->out_pins[1]; in ca0132_config()
9639 spec->unsol_tag_front_hp = spec->out_pins[2]; in ca0132_config()
9641 spec->adcs[0] = 0x7; /* Rear Mic / Line-in */ in ca0132_config()
9642 spec->adcs[1] = 0x8; /* Front Mic, but only if no DSP */ in ca0132_config()
9643 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9645 spec->num_inputs = 2; in ca0132_config()
9646 spec->input_pins[0] = 0x12; /* Rear Mic / Line-in */ in ca0132_config()
9647 spec->input_pins[1] = 0x13; /* What U Hear */ in ca0132_config()
9648 spec->shared_mic_nid = 0x7; in ca0132_config()
9649 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9652 spec->dig_out = 0x05; in ca0132_config()
9653 spec->multiout.dig_out_nid = spec->dig_out; in ca0132_config()
9654 spec->dig_in = 0x09; in ca0132_config()
9657 spec->num_outputs = 2; in ca0132_config()
9658 spec->out_pins[0] = 0x0B; /* Line out */ in ca0132_config()
9659 spec->out_pins[1] = 0x0F; /* Rear headphone out */ in ca0132_config()
9660 spec->out_pins[2] = 0x10; /* Center/LFE */ in ca0132_config()
9661 spec->out_pins[3] = 0x11; /* Rear surround */ in ca0132_config()
9662 spec->shared_out_nid = 0x2; in ca0132_config()
9663 spec->unsol_tag_hp = spec->out_pins[1]; in ca0132_config()
9664 spec->unsol_tag_front_hp = spec->out_pins[2]; in ca0132_config()
9666 spec->adcs[0] = 0x7; /* Rear Mic / Line-in */ in ca0132_config()
9667 spec->adcs[1] = 0x8; /* Not connected, no front mic */ in ca0132_config()
9668 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9670 spec->num_inputs = 2; in ca0132_config()
9671 spec->input_pins[0] = 0x12; /* Rear Mic / Line-in */ in ca0132_config()
9672 spec->input_pins[1] = 0x13; /* What U Hear */ in ca0132_config()
9673 spec->shared_mic_nid = 0x7; in ca0132_config()
9674 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9677 spec->adcs[0] = 0x8; /* ZxR DBPro Aux In */ in ca0132_config()
9679 spec->num_inputs = 1; in ca0132_config()
9680 spec->input_pins[0] = 0x11; /* RCA Line-in */ in ca0132_config()
9682 spec->dig_out = 0x05; in ca0132_config()
9683 spec->multiout.dig_out_nid = spec->dig_out; in ca0132_config()
9685 spec->dig_in = 0x09; in ca0132_config()
9689 spec->num_outputs = 2; in ca0132_config()
9690 spec->out_pins[0] = 0x0B; /* Line out */ in ca0132_config()
9691 spec->out_pins[1] = 0x11; /* Rear headphone out */ in ca0132_config()
9692 spec->out_pins[2] = 0x10; /* Front Headphone / Center/LFE*/ in ca0132_config()
9693 spec->out_pins[3] = 0x0F; /* Rear surround */ in ca0132_config()
9694 spec->shared_out_nid = 0x2; in ca0132_config()
9695 spec->unsol_tag_hp = spec->out_pins[1]; in ca0132_config()
9696 spec->unsol_tag_front_hp = spec->out_pins[2]; in ca0132_config()
9698 spec->adcs[0] = 0x7; /* Rear Mic / Line-in */ in ca0132_config()
9699 spec->adcs[1] = 0x8; /* Front Mic, but only if no DSP */ in ca0132_config()
9700 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9702 spec->num_inputs = 2; in ca0132_config()
9703 spec->input_pins[0] = 0x12; /* Rear Mic / Line-in */ in ca0132_config()
9704 spec->input_pins[1] = 0x13; /* What U Hear */ in ca0132_config()
9705 spec->shared_mic_nid = 0x7; in ca0132_config()
9706 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9709 spec->dig_out = 0x05; in ca0132_config()
9710 spec->multiout.dig_out_nid = spec->dig_out; in ca0132_config()
9713 spec->num_outputs = 2; in ca0132_config()
9714 spec->out_pins[0] = 0x0B; /* Line out */ in ca0132_config()
9715 spec->out_pins[1] = 0x0F; /* Rear headphone out */ in ca0132_config()
9716 spec->out_pins[2] = 0x10; /* Front Headphone / Center/LFE*/ in ca0132_config()
9717 spec->out_pins[3] = 0x11; /* Rear surround */ in ca0132_config()
9718 spec->shared_out_nid = 0x2; in ca0132_config()
9719 spec->unsol_tag_hp = spec->out_pins[1]; in ca0132_config()
9720 spec->unsol_tag_front_hp = spec->out_pins[2]; in ca0132_config()
9722 spec->adcs[0] = 0x07; /* Rear Mic / Line-in */ in ca0132_config()
9723 spec->adcs[1] = 0x08; /* Front Mic, but only if no DSP */ in ca0132_config()
9724 spec->adcs[2] = 0x0a; /* what u hear */ in ca0132_config()
9726 spec->num_inputs = 2; in ca0132_config()
9727 spec->input_pins[0] = 0x12; /* Rear Mic / Line-in */ in ca0132_config()
9728 spec->input_pins[1] = 0x13; /* What U Hear */ in ca0132_config()
9729 spec->shared_mic_nid = 0x7; in ca0132_config()
9730 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9733 spec->dig_out = 0x05; in ca0132_config()
9734 spec->multiout.dig_out_nid = spec->dig_out; in ca0132_config()
9737 spec->num_outputs = 2; in ca0132_config()
9738 spec->out_pins[0] = 0x0b; /* speaker out */ in ca0132_config()
9739 spec->out_pins[1] = 0x10; /* headphone out */ in ca0132_config()
9740 spec->shared_out_nid = 0x2; in ca0132_config()
9741 spec->unsol_tag_hp = spec->out_pins[1]; in ca0132_config()
9743 spec->adcs[0] = 0x7; /* digital mic / analog mic1 */ in ca0132_config()
9744 spec->adcs[1] = 0x8; /* analog mic2 */ in ca0132_config()
9745 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9747 spec->num_inputs = 3; in ca0132_config()
9748 spec->input_pins[0] = 0x12; in ca0132_config()
9749 spec->input_pins[1] = 0x11; in ca0132_config()
9750 spec->input_pins[2] = 0x13; in ca0132_config()
9751 spec->shared_mic_nid = 0x7; in ca0132_config()
9752 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9755 spec->dig_out = 0x05; in ca0132_config()
9756 spec->multiout.dig_out_nid = spec->dig_out; in ca0132_config()
9757 spec->dig_in = 0x09; in ca0132_config()
9762 static int ca0132_prepare_verbs(struct hda_codec *codec) in ca0132_prepare_verbs() argument
9766 struct ca0132_spec *spec = codec->spec; in ca0132_prepare_verbs()
9768 spec->chip_init_verbs = ca0132_init_verbs0; in ca0132_prepare_verbs()
9774 spec->desktop_init_verbs = ca0132_init_verbs1; in ca0132_prepare_verbs()
9775 spec->spec_init_verbs = kcalloc(NUM_SPEC_VERBS, in ca0132_prepare_verbs()
9778 if (!spec->spec_init_verbs) in ca0132_prepare_verbs()
9779 return -ENOMEM; in ca0132_prepare_verbs()
9782 spec->spec_init_verbs[0].nid = 0x0b; in ca0132_prepare_verbs()
9783 spec->spec_init_verbs[0].param = 0x78D; in ca0132_prepare_verbs()
9784 spec->spec_init_verbs[0].verb = 0x00; in ca0132_prepare_verbs()
9788 spec->spec_init_verbs[2].nid = 0x0b; in ca0132_prepare_verbs()
9789 spec->spec_init_verbs[2].param = AC_VERB_SET_EAPD_BTLENABLE; in ca0132_prepare_verbs()
9790 spec->spec_init_verbs[2].verb = 0x02; in ca0132_prepare_verbs()
9792 spec->spec_init_verbs[3].nid = 0x10; in ca0132_prepare_verbs()
9793 spec->spec_init_verbs[3].param = 0x78D; in ca0132_prepare_verbs()
9794 spec->spec_init_verbs[3].verb = 0x02; in ca0132_prepare_verbs()
9796 spec->spec_init_verbs[4].nid = 0x10; in ca0132_prepare_verbs()
9797 spec->spec_init_verbs[4].param = AC_VERB_SET_EAPD_BTLENABLE; in ca0132_prepare_verbs()
9798 spec->spec_init_verbs[4].verb = 0x02; in ca0132_prepare_verbs()
9801 /* Terminator: spec->spec_init_verbs[NUM_SPEC_VERBS-1] */ in ca0132_prepare_verbs()
9802 return 0; in ca0132_prepare_verbs()
9807 * Sound Blaster Z cards. However, they have different HDA codec subsystem
9811 static void sbz_detect_quirk(struct hda_codec *codec) in sbz_detect_quirk() argument
9813 struct ca0132_spec *spec = codec->spec; in sbz_detect_quirk()
9815 switch (codec->core.subsystem_id) { in sbz_detect_quirk()
9816 case 0x11020033: in sbz_detect_quirk()
9817 spec->quirk = QUIRK_ZXR; in sbz_detect_quirk()
9819 case 0x1102003f: in sbz_detect_quirk()
9820 spec->quirk = QUIRK_ZXR_DBPRO; in sbz_detect_quirk()
9823 spec->quirk = QUIRK_SBZ; in sbz_detect_quirk()
9828 static int patch_ca0132(struct hda_codec *codec) in patch_ca0132() argument
9834 codec_dbg(codec, "patch_ca0132\n"); in patch_ca0132()
9838 return -ENOMEM; in patch_ca0132()
9839 codec->spec = spec; in patch_ca0132()
9840 spec->codec = codec; in patch_ca0132()
9842 /* Detect codec quirk */ in patch_ca0132()
9843 quirk = snd_pci_quirk_lookup(codec->bus->pci, ca0132_quirks); in patch_ca0132()
9845 spec->quirk = quirk->value; in patch_ca0132()
9847 spec->quirk = QUIRK_NONE; in patch_ca0132()
9849 sbz_detect_quirk(codec); in patch_ca0132()
9852 codec->patch_ops = dbpro_patch_ops; in patch_ca0132()
9854 codec->patch_ops = ca0132_patch_ops; in patch_ca0132()
9856 codec->pcm_format_first = 1; in patch_ca0132()
9857 codec->no_sticky_stream = 1; in patch_ca0132()
9860 spec->dsp_state = DSP_DOWNLOAD_INIT; in patch_ca0132()
9861 spec->num_mixers = 1; in patch_ca0132()
9866 spec->mixers[0] = desktop_mixer; in patch_ca0132()
9867 snd_hda_codec_set_name(codec, "Sound Blaster Z"); in patch_ca0132()
9870 spec->mixers[0] = desktop_mixer; in patch_ca0132()
9871 snd_hda_codec_set_name(codec, "Sound Blaster ZxR"); in patch_ca0132()
9876 spec->mixers[0] = desktop_mixer; in patch_ca0132()
9877 snd_hda_codec_set_name(codec, "Recon3D"); in patch_ca0132()
9880 spec->mixers[0] = r3di_mixer; in patch_ca0132()
9881 snd_hda_codec_set_name(codec, "Recon3Di"); in patch_ca0132()
9884 spec->mixers[0] = desktop_mixer; in patch_ca0132()
9885 snd_hda_codec_set_name(codec, "Sound BlasterX AE-5"); in patch_ca0132()
9888 spec->mixers[0] = desktop_mixer; in patch_ca0132()
9889 snd_hda_codec_set_name(codec, "Sound Blaster AE-7"); in patch_ca0132()
9892 spec->mixers[0] = ca0132_mixer; in patch_ca0132()
9903 spec->use_alt_controls = true; in patch_ca0132()
9904 spec->use_alt_functions = true; in patch_ca0132()
9905 spec->use_pci_mmio = true; in patch_ca0132()
9908 spec->use_alt_controls = true; in patch_ca0132()
9909 spec->use_alt_functions = true; in patch_ca0132()
9910 spec->use_pci_mmio = false; in patch_ca0132()
9913 spec->use_alt_controls = false; in patch_ca0132()
9914 spec->use_alt_functions = false; in patch_ca0132()
9915 spec->use_pci_mmio = false; in patch_ca0132()
9920 if (spec->use_pci_mmio) { in patch_ca0132()
9921 spec->mem_base = pci_iomap(codec->bus->pci, 2, 0xC20); in patch_ca0132()
9922 if (spec->mem_base == NULL) { in patch_ca0132()
9923 codec_warn(codec, "pci_iomap failed! Setting quirk to QUIRK_NONE."); in patch_ca0132()
9924 spec->quirk = QUIRK_NONE; in patch_ca0132()
9929 spec->base_init_verbs = ca0132_base_init_verbs; in patch_ca0132()
9930 spec->base_exit_verbs = ca0132_base_exit_verbs; in patch_ca0132()
9932 INIT_DELAYED_WORK(&spec->unsol_hp_work, ca0132_unsol_hp_delayed); in patch_ca0132()
9934 ca0132_init_chip(codec); in patch_ca0132()
9936 ca0132_config(codec); in patch_ca0132()
9938 err = ca0132_prepare_verbs(codec); in patch_ca0132()
9939 if (err < 0) in patch_ca0132()
9942 err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL); in patch_ca0132()
9943 if (err < 0) in patch_ca0132()
9946 return 0; in patch_ca0132()
9949 ca0132_free(codec); in patch_ca0132()
9957 HDA_CODEC_ENTRY(0x11020011, "CA0132", patch_ca0132),
9963 MODULE_DESCRIPTION("Creative Sound Core3D codec");