Lines Matching +full:pch +full:- +full:msi +full:- +full:1
1 // SPDX-License-Identifier: GPL-2.0
19 #include <linux/dma-mapping.h>
22 #include "xhci-trace.h"
23 #include "xhci-debugfs.h"
24 #include "xhci-dbgcap.h"
42 struct xhci_segment *seg = ring->first_seg; in td_on_ring()
44 if (!td || !td->start_seg) in td_on_ring()
47 if (seg == td->start_seg) in td_on_ring()
49 seg = seg->next; in td_on_ring()
50 } while (seg && seg != ring->first_seg); in td_on_ring()
56 * xhci_handshake - spin reading hc until handshake completes or fails
66 * hardware flakeout), or the register reads as all-ones (hardware removed).
76 1, timeout_us); in xhci_handshake()
78 return -ENODEV; in xhci_handshake()
93 halted = readl(&xhci->op_regs->status) & STS_HALT; in xhci_quiesce()
97 cmd = readl(&xhci->op_regs->command); in xhci_quiesce()
99 writel(cmd, &xhci->op_regs->command); in xhci_quiesce()
116 ret = xhci_handshake(&xhci->op_regs->status, in xhci_halt()
122 xhci->xhc_state |= XHCI_STATE_HALTED; in xhci_halt()
123 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED; in xhci_halt()
135 temp = readl(&xhci->op_regs->command); in xhci_start()
139 writel(temp, &xhci->op_regs->command); in xhci_start()
145 ret = xhci_handshake(&xhci->op_regs->status, in xhci_start()
147 if (ret == -ETIMEDOUT) in xhci_start()
153 xhci->xhc_state = 0; in xhci_start()
171 state = readl(&xhci->op_regs->status); in xhci_reset()
175 return -ENODEV; in xhci_reset()
184 command = readl(&xhci->op_regs->command); in xhci_reset()
186 writel(command, &xhci->op_regs->command); in xhci_reset()
188 /* Existing Intel xHCI controllers require a delay of 1 mS, in xhci_reset()
195 if (xhci->quirks & XHCI_INTEL_HOST) in xhci_reset()
198 ret = xhci_handshake(&xhci->op_regs->command, CMD_RESET, 0, timeout_us); in xhci_reset()
202 if (xhci->quirks & XHCI_ASMEDIA_MODIFY_FLOWCONTROL) in xhci_reset()
203 usb_asmedia_modifyflowcontrol(to_pci_dev(xhci_to_hcd(xhci)->self.controller)); in xhci_reset()
211 ret = xhci_handshake(&xhci->op_regs->status, STS_CNR, 0, timeout_us); in xhci_reset()
213 xhci->usb2_rhub.bus_state.port_c_suspend = 0; in xhci_reset()
214 xhci->usb2_rhub.bus_state.suspended_ports = 0; in xhci_reset()
215 xhci->usb2_rhub.bus_state.resuming_ports = 0; in xhci_reset()
216 xhci->usb3_rhub.bus_state.port_c_suspend = 0; in xhci_reset()
217 xhci->usb3_rhub.bus_state.suspended_ports = 0; in xhci_reset()
218 xhci->usb3_rhub.bus_state.resuming_ports = 0; in xhci_reset()
225 struct device *dev = xhci_to_hcd(xhci)->self.sysdev; in xhci_zero_64b_regs()
244 if (!(xhci->quirks & XHCI_ZERO_64B_REGS) || !device_iommu_mapped(dev)) in xhci_zero_64b_regs()
250 val = readl(&xhci->op_regs->command); in xhci_zero_64b_regs()
252 writel(val, &xhci->op_regs->command); in xhci_zero_64b_regs()
255 val = readl(&xhci->op_regs->status); in xhci_zero_64b_regs()
257 writel(val, &xhci->op_regs->status); in xhci_zero_64b_regs()
260 val = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr); in xhci_zero_64b_regs()
262 xhci_write_64(xhci, 0, &xhci->op_regs->dcbaa_ptr); in xhci_zero_64b_regs()
263 val = xhci_read_64(xhci, &xhci->op_regs->cmd_ring); in xhci_zero_64b_regs()
265 xhci_write_64(xhci, 0, &xhci->op_regs->cmd_ring); in xhci_zero_64b_regs()
267 intrs = min_t(u32, HCS_MAX_INTRS(xhci->hcs_params1), in xhci_zero_64b_regs()
268 ARRAY_SIZE(xhci->run_regs->ir_set)); in xhci_zero_64b_regs()
273 ir = &xhci->run_regs->ir_set[i]; in xhci_zero_64b_regs()
274 val = xhci_read_64(xhci, &ir->erst_base); in xhci_zero_64b_regs()
276 xhci_write_64(xhci, 0, &ir->erst_base); in xhci_zero_64b_regs()
277 val= xhci_read_64(xhci, &ir->erst_dequeue); in xhci_zero_64b_regs()
279 xhci_write_64(xhci, 0, &ir->erst_dequeue); in xhci_zero_64b_regs()
283 err = xhci_handshake(&xhci->op_regs->status, in xhci_zero_64b_regs()
292 * Set up MSI
298 * TODO:Check with MSI Soc for sysdev in xhci_setup_msi()
300 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller); in xhci_setup_msi()
302 ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_MSI); in xhci_setup_msi()
305 "failed to allocate MSI entry"); in xhci_setup_msi()
309 ret = request_irq(pdev->irq, xhci_msi_irq, in xhci_setup_msi()
313 "disable MSI interrupt"); in xhci_setup_msi()
321 * Set up MSI-X
327 struct pci_dev *pdev = to_pci_dev(hcd->self.controller); in xhci_setup_msix()
330 * calculate number of msi-x vectors supported. in xhci_setup_msix()
331 * - HCS_MAX_INTRS: the max number of interrupts the host can handle, in xhci_setup_msix()
333 * - num_online_cpus: maximum msi-x vectors per CPUs core. in xhci_setup_msix()
334 * Add additional 1 vector to ensure always available interrupt. in xhci_setup_msix()
336 xhci->msix_count = min(num_online_cpus() + 1, in xhci_setup_msix()
337 HCS_MAX_INTRS(xhci->hcs_params1)); in xhci_setup_msix()
339 ret = pci_alloc_irq_vectors(pdev, xhci->msix_count, xhci->msix_count, in xhci_setup_msix()
343 "Failed to enable MSI-X"); in xhci_setup_msix()
347 for (i = 0; i < xhci->msix_count; i++) { in xhci_setup_msix()
354 hcd->msix_enabled = 1; in xhci_setup_msix()
358 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "disable MSI-X interrupt"); in xhci_setup_msix()
359 while (--i >= 0) in xhci_setup_msix()
365 /* Free any IRQs and disable MSI-X */
369 struct pci_dev *pdev = to_pci_dev(hcd->self.controller); in xhci_cleanup_msix()
371 if (xhci->quirks & XHCI_PLAT) in xhci_cleanup_msix()
375 if (hcd->irq > 0) in xhci_cleanup_msix()
378 if (hcd->msix_enabled) { in xhci_cleanup_msix()
381 for (i = 0; i < xhci->msix_count; i++) in xhci_cleanup_msix()
388 hcd->msix_enabled = 0; in xhci_cleanup_msix()
395 if (hcd->msix_enabled) { in xhci_msix_sync_irqs()
396 struct pci_dev *pdev = to_pci_dev(hcd->self.controller); in xhci_msix_sync_irqs()
399 for (i = 0; i < xhci->msix_count; i++) in xhci_msix_sync_irqs()
411 if (xhci->quirks & XHCI_PLAT) in xhci_try_enable_msi()
414 pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller); in xhci_try_enable_msi()
416 * Some Fresco Logic host controllers advertise MSI, but fail to in xhci_try_enable_msi()
417 * generate interrupts. Don't even try to enable MSI. in xhci_try_enable_msi()
419 if (xhci->quirks & XHCI_BROKEN_MSI) in xhci_try_enable_msi()
423 if (hcd->irq) in xhci_try_enable_msi()
424 free_irq(hcd->irq, hcd); in xhci_try_enable_msi()
425 hcd->irq = 0; in xhci_try_enable_msi()
429 /* fall back to msi*/ in xhci_try_enable_msi()
433 hcd->msi_enabled = 1; in xhci_try_enable_msi()
437 if (!pdev->irq) { in xhci_try_enable_msi()
438 xhci_err(xhci, "No msi-x/msi found and no IRQ in BIOS\n"); in xhci_try_enable_msi()
439 return -EINVAL; in xhci_try_enable_msi()
443 if (!strlen(hcd->irq_descr)) in xhci_try_enable_msi()
444 snprintf(hcd->irq_descr, sizeof(hcd->irq_descr), "%s:usb%d", in xhci_try_enable_msi()
445 hcd->driver->description, hcd->self.busnum); in xhci_try_enable_msi()
448 ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED, in xhci_try_enable_msi()
449 hcd->irq_descr, hcd); in xhci_try_enable_msi()
452 pdev->irq); in xhci_try_enable_msi()
455 hcd->irq = pdev->irq; in xhci_try_enable_msi()
485 rhub = &xhci->usb3_rhub; in compliance_mode_recovery()
487 for (i = 0; i < rhub->num_ports; i++) { in compliance_mode_recovery()
488 temp = readl(rhub->ports[i]->addr); in compliance_mode_recovery()
495 "Compliance mode detected->port %d", in compliance_mode_recovery()
496 i + 1); in compliance_mode_recovery()
499 hcd = xhci->shared_hcd; in compliance_mode_recovery()
501 if (hcd->state == HC_STATE_SUSPENDED) in compliance_mode_recovery()
508 if (xhci->port_status_u0 != ((1 << rhub->num_ports) - 1)) in compliance_mode_recovery()
509 mod_timer(&xhci->comp_mode_recovery_timer, in compliance_mode_recovery()
514 * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
525 xhci->port_status_u0 = 0; in compliance_mode_recovery_timer_init()
526 timer_setup(&xhci->comp_mode_recovery_timer, compliance_mode_recovery, in compliance_mode_recovery_timer_init()
528 xhci->comp_mode_recovery_timer.expires = jiffies + in compliance_mode_recovery_timer_init()
531 add_timer(&xhci->comp_mode_recovery_timer); in compliance_mode_recovery_timer_init()
538 * USB3.0 re-driver and that need the Compliance Mode Quirk.
540 * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
551 if (!(strstr(dmi_sys_vendor, "Hewlett-Packard"))) in xhci_compliance_mode_recovery_timer_quirk_check()
565 return (xhci->port_status_u0 == ((1 << xhci->usb3_rhub.num_ports) - 1)); in xhci_all_ports_seen_u0()
570 * Initialize memory for HCD and xHC (one-time init).
582 spin_lock_init(&xhci->lock); in xhci_init()
583 if (xhci->hci_version == 0x95 && link_quirk) { in xhci_init()
586 xhci->quirks |= XHCI_LINK_TRB_QUIRK; in xhci_init()
596 xhci->quirks |= XHCI_COMP_MODE_QUIRK; in xhci_init()
603 /*-------------------------------------------------------------------------*/
610 return -ENODEV; in xhci_run_finished()
612 xhci->shared_hcd->state = HC_STATE_RUNNING; in xhci_run_finished()
613 xhci->cmd_ring_state = CMD_RING_STATE_RUNNING; in xhci_run_finished()
615 if (xhci->quirks & XHCI_NEC_HOST) in xhci_run_finished()
633 * Setup MSI-X vectors and enable interrupts.
646 hcd->uses_new_polling = 1; in xhci_run()
656 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue); in xhci_run()
663 temp = readl(&xhci->ir_set->irq_control); in xhci_run()
665 temp |= (xhci->imod_interval / 250) & ER_IRQ_INTERVAL_MASK; in xhci_run()
666 writel(temp, &xhci->ir_set->irq_control); in xhci_run()
669 temp = readl(&xhci->op_regs->command); in xhci_run()
673 writel(temp, &xhci->op_regs->command); in xhci_run()
675 temp = readl(&xhci->ir_set->irq_pending); in xhci_run()
678 xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp)); in xhci_run()
679 writel(ER_IRQ_ENABLE(temp), &xhci->ir_set->irq_pending); in xhci_run()
681 if (xhci->quirks & XHCI_NEC_HOST) { in xhci_run()
686 return -ENOMEM; in xhci_run()
718 mutex_lock(&xhci->mutex); in xhci_stop()
722 mutex_unlock(&xhci->mutex); in xhci_stop()
728 spin_lock_irq(&xhci->lock); in xhci_stop()
729 xhci->xhc_state |= XHCI_STATE_HALTED; in xhci_stop()
730 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED; in xhci_stop()
733 spin_unlock_irq(&xhci->lock); in xhci_stop()
738 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && in xhci_stop()
740 del_timer_sync(&xhci->comp_mode_recovery_timer); in xhci_stop()
746 if (xhci->quirks & XHCI_AMD_PLL_FIX) in xhci_stop()
751 temp = readl(&xhci->op_regs->status); in xhci_stop()
752 writel((temp & ~0x1fff) | STS_EINT, &xhci->op_regs->status); in xhci_stop()
753 temp = readl(&xhci->ir_set->irq_pending); in xhci_stop()
754 writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending); in xhci_stop()
760 "xhci_stop completed - status = %x", in xhci_stop()
761 readl(&xhci->op_regs->status)); in xhci_stop()
762 mutex_unlock(&xhci->mutex); in xhci_stop()
766 * Shutdown HC (not bus-specific)
778 if (xhci->quirks & XHCI_SPURIOUS_REBOOT) in xhci_shutdown()
779 usb_disable_xhci_ports(to_pci_dev(hcd->self.sysdev)); in xhci_shutdown()
783 __func__, hcd->self.busnum); in xhci_shutdown()
784 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags); in xhci_shutdown()
785 del_timer_sync(&hcd->rh_timer); in xhci_shutdown()
787 if (xhci->shared_hcd) { in xhci_shutdown()
788 clear_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags); in xhci_shutdown()
789 del_timer_sync(&xhci->shared_hcd->rh_timer); in xhci_shutdown()
792 spin_lock_irq(&xhci->lock); in xhci_shutdown()
797 * firmware delay in ADL-P PCH if port are left in U3 at shutdown in xhci_shutdown()
799 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP || in xhci_shutdown()
800 xhci->quirks & XHCI_RESET_TO_DEFAULT) in xhci_shutdown()
803 spin_unlock_irq(&xhci->lock); in xhci_shutdown()
808 "xhci_shutdown completed - status = %x", in xhci_shutdown()
809 readl(&xhci->op_regs->status)); in xhci_shutdown()
816 xhci->s3.command = readl(&xhci->op_regs->command); in xhci_save_registers()
817 xhci->s3.dev_nt = readl(&xhci->op_regs->dev_notification); in xhci_save_registers()
818 xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr); in xhci_save_registers()
819 xhci->s3.config_reg = readl(&xhci->op_regs->config_reg); in xhci_save_registers()
820 xhci->s3.erst_size = readl(&xhci->ir_set->erst_size); in xhci_save_registers()
821 xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base); in xhci_save_registers()
822 xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue); in xhci_save_registers()
823 xhci->s3.irq_pending = readl(&xhci->ir_set->irq_pending); in xhci_save_registers()
824 xhci->s3.irq_control = readl(&xhci->ir_set->irq_control); in xhci_save_registers()
829 writel(xhci->s3.command, &xhci->op_regs->command); in xhci_restore_registers()
830 writel(xhci->s3.dev_nt, &xhci->op_regs->dev_notification); in xhci_restore_registers()
831 xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr); in xhci_restore_registers()
832 writel(xhci->s3.config_reg, &xhci->op_regs->config_reg); in xhci_restore_registers()
833 writel(xhci->s3.erst_size, &xhci->ir_set->erst_size); in xhci_restore_registers()
834 xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base); in xhci_restore_registers()
835 xhci_write_64(xhci, xhci->s3.erst_dequeue, &xhci->ir_set->erst_dequeue); in xhci_restore_registers()
836 writel(xhci->s3.irq_pending, &xhci->ir_set->irq_pending); in xhci_restore_registers()
837 writel(xhci->s3.irq_control, &xhci->ir_set->irq_control); in xhci_restore_registers()
845 val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring); in xhci_set_cmd_ring_deq()
847 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg, in xhci_set_cmd_ring_deq()
848 xhci->cmd_ring->dequeue) & in xhci_set_cmd_ring_deq()
850 xhci->cmd_ring->cycle_state; in xhci_set_cmd_ring_deq()
854 xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring); in xhci_set_cmd_ring_deq()
861 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
864 * middle of the ring (TRBs are 16-byte aligned).
871 ring = xhci->cmd_ring; in xhci_clear_command_ring()
872 seg = ring->deq_seg; in xhci_clear_command_ring()
874 memset(seg->trbs, 0, in xhci_clear_command_ring()
875 sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1)); in xhci_clear_command_ring()
876 seg->trbs[TRBS_PER_SEGMENT - 1].link.control &= in xhci_clear_command_ring()
878 seg = seg->next; in xhci_clear_command_ring()
879 } while (seg != ring->deq_seg); in xhci_clear_command_ring()
882 ring->deq_seg = ring->first_seg; in xhci_clear_command_ring()
883 ring->dequeue = ring->first_seg->trbs; in xhci_clear_command_ring()
884 ring->enq_seg = ring->deq_seg; in xhci_clear_command_ring()
885 ring->enqueue = ring->dequeue; in xhci_clear_command_ring()
887 ring->num_trbs_free = ring->num_segs * (TRBS_PER_SEGMENT - 1) - 1; in xhci_clear_command_ring()
890 * when the cycle bit is set to 1. in xhci_clear_command_ring()
892 ring->cycle_state = 1; in xhci_clear_command_ring()
896 * Yes, this will need to be re-written after resume, but we're paranoid in xhci_clear_command_ring()
921 spin_lock_irqsave(&xhci->lock, flags); in xhci_disable_hub_port_wake()
923 for (i = 0; i < rhub->num_ports; i++) { in xhci_disable_hub_port_wake()
924 portsc = readl(rhub->ports[i]->addr); in xhci_disable_hub_port_wake()
937 writel(t2, rhub->ports[i]->addr); in xhci_disable_hub_port_wake()
938 xhci_dbg(xhci, "config port %d-%d wake bits, portsc: 0x%x, write: 0x%x\n", in xhci_disable_hub_port_wake()
939 rhub->hcd->self.busnum, i + 1, portsc, t2); in xhci_disable_hub_port_wake()
942 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_disable_hub_port_wake()
952 status = readl(&xhci->op_regs->status); in xhci_pending_portevent()
961 port_index = xhci->usb2_rhub.num_ports; in xhci_pending_portevent()
962 ports = xhci->usb2_rhub.ports; in xhci_pending_portevent()
963 while (port_index--) { in xhci_pending_portevent()
964 portsc = readl(ports[port_index]->addr); in xhci_pending_portevent()
969 port_index = xhci->usb3_rhub.num_ports; in xhci_pending_portevent()
970 ports = xhci->usb3_rhub.ports; in xhci_pending_portevent()
971 while (port_index--) { in xhci_pending_portevent()
972 portsc = readl(ports[port_index]->addr); in xhci_pending_portevent()
981 * Stop HC (not bus-specific)
994 if (!hcd->state) in xhci_suspend()
997 if (hcd->state != HC_STATE_SUSPENDED || in xhci_suspend()
998 xhci->shared_hcd->state != HC_STATE_SUSPENDED) in xhci_suspend()
999 return -EINVAL; in xhci_suspend()
1002 xhci_disable_hub_port_wake(xhci, &xhci->usb3_rhub, do_wakeup); in xhci_suspend()
1003 xhci_disable_hub_port_wake(xhci, &xhci->usb2_rhub, do_wakeup); in xhci_suspend()
1012 __func__, hcd->self.busnum); in xhci_suspend()
1013 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags); in xhci_suspend()
1014 del_timer_sync(&hcd->rh_timer); in xhci_suspend()
1015 clear_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags); in xhci_suspend()
1016 del_timer_sync(&xhci->shared_hcd->rh_timer); in xhci_suspend()
1018 if (xhci->quirks & XHCI_SUSPEND_DELAY) in xhci_suspend()
1021 spin_lock_irq(&xhci->lock); in xhci_suspend()
1022 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); in xhci_suspend()
1023 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags); in xhci_suspend()
1024 /* step 1: stop endpoint */ in xhci_suspend()
1028 command = readl(&xhci->op_regs->command); in xhci_suspend()
1030 writel(command, &xhci->op_regs->command); in xhci_suspend()
1033 delay *= (xhci->quirks & XHCI_SLOW_SUSPEND) ? 10 : 1; in xhci_suspend()
1035 if (xhci_handshake(&xhci->op_regs->status, in xhci_suspend()
1038 spin_unlock_irq(&xhci->lock); in xhci_suspend()
1039 return -ETIMEDOUT; in xhci_suspend()
1047 command = readl(&xhci->op_regs->command); in xhci_suspend()
1049 writel(command, &xhci->op_regs->command); in xhci_suspend()
1050 xhci->broken_suspend = 0; in xhci_suspend()
1051 if (xhci_handshake(&xhci->op_regs->status, in xhci_suspend()
1062 res = readl(&xhci->op_regs->status); in xhci_suspend()
1063 if ((xhci->quirks & XHCI_SNPS_BROKEN_SUSPEND) && in xhci_suspend()
1066 xhci->broken_suspend = 1; in xhci_suspend()
1069 spin_unlock_irq(&xhci->lock); in xhci_suspend()
1070 return -ETIMEDOUT; in xhci_suspend()
1073 spin_unlock_irq(&xhci->lock); in xhci_suspend()
1079 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && in xhci_suspend()
1081 del_timer_sync(&xhci->comp_mode_recovery_timer); in xhci_suspend()
1088 /* synchronize irq when using MSI-X */ in xhci_suspend()
1096 * start xHC (not bus-specific)
1111 if (!hcd->state) in xhci_resume()
1118 if (time_before(jiffies, xhci->usb2_rhub.bus_state.next_statechange) || in xhci_resume()
1119 time_before(jiffies, xhci->usb3_rhub.bus_state.next_statechange)) in xhci_resume()
1122 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); in xhci_resume()
1123 set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags); in xhci_resume()
1125 spin_lock_irq(&xhci->lock); in xhci_resume()
1127 if (hibernated || xhci->quirks & XHCI_RESET_ON_RESUME || xhci->broken_suspend) in xhci_resume()
1135 retval = xhci_handshake(&xhci->op_regs->status, in xhci_resume()
1140 spin_unlock_irq(&xhci->lock); in xhci_resume()
1143 /* step 1: restore register */ in xhci_resume()
1149 command = readl(&xhci->op_regs->command); in xhci_resume()
1151 writel(command, &xhci->op_regs->command); in xhci_resume()
1157 if (xhci_handshake(&xhci->op_regs->status, in xhci_resume()
1160 spin_unlock_irq(&xhci->lock); in xhci_resume()
1161 return -ETIMEDOUT; in xhci_resume()
1165 temp = readl(&xhci->op_regs->status); in xhci_resume()
1167 /* re-initialize the HC on Restore Error, or Host Controller Error */ in xhci_resume()
1170 if (!xhci->broken_suspend) in xhci_resume()
1175 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && in xhci_resume()
1177 del_timer_sync(&xhci->comp_mode_recovery_timer); in xhci_resume()
1183 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub); in xhci_resume()
1184 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub); in xhci_resume()
1190 spin_unlock_irq(&xhci->lock); in xhci_resume()
1196 temp = readl(&xhci->op_regs->status); in xhci_resume()
1197 writel((temp & ~0x1fff) | STS_EINT, &xhci->op_regs->status); in xhci_resume()
1198 temp = readl(&xhci->ir_set->irq_pending); in xhci_resume()
1199 writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending); in xhci_resume()
1204 xhci_dbg(xhci, "xhci_stop completed - status = %x\n", in xhci_resume()
1205 readl(&xhci->op_regs->status)); in xhci_resume()
1214 secondary_hcd = xhci->shared_hcd; in xhci_resume()
1217 retval = xhci_init(hcd->primary_hcd); in xhci_resume()
1223 retval = xhci_run(hcd->primary_hcd); in xhci_resume()
1228 hcd->state = HC_STATE_SUSPENDED; in xhci_resume()
1229 xhci->shared_hcd->state = HC_STATE_SUSPENDED; in xhci_resume()
1234 command = readl(&xhci->op_regs->command); in xhci_resume()
1236 writel(command, &xhci->op_regs->command); in xhci_resume()
1237 xhci_handshake(&xhci->op_regs->status, STS_HALT, in xhci_resume()
1249 spin_unlock_irq(&xhci->lock); in xhci_resume()
1267 usb_hcd_resume_root_hub(xhci->shared_hcd); in xhci_resume()
1273 * be re-initialized Always after a system resume. Ports are subject in xhci_resume()
1277 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && !comp_timer_running) in xhci_resume()
1280 if (xhci->quirks & XHCI_ASMEDIA_MODIFY_FLOWCONTROL) in xhci_resume()
1281 usb_asmedia_modifyflowcontrol(to_pci_dev(hcd->self.controller)); in xhci_resume()
1283 /* Re-enable port polling. */ in xhci_resume()
1285 __func__, hcd->self.busnum); in xhci_resume()
1286 set_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags); in xhci_resume()
1287 usb_hcd_poll_rh_status(xhci->shared_hcd); in xhci_resume()
1288 set_bit(HCD_FLAG_POLL_RH, &hcd->flags); in xhci_resume()
1296 /*-------------------------------------------------------------------------*/
1314 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1316 * value to right shift 1 for the bitmask.
1318 * Index = (epnum * 2) + direction - 1,
1319 * where direction = 0 for OUT, 1 for IN.
1321 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1330 (usb_endpoint_dir_in(desc) ? 1 : 0) - 1; in xhci_get_endpoint_index()
1347 * bit 1, etc.
1351 return 1 << (xhci_get_endpoint_index(desc) + 1); in xhci_get_endpoint_flag()
1357 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
1362 return fls(added_ctxs) - 1; in xhci_last_valid_endpoint()
1365 /* Returns 1 if the arguments are OK;
1366 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1376 return -EINVAL; in xhci_check_args()
1378 if (!udev->parent) { in xhci_check_args()
1385 if (!udev->slot_id || !xhci->devs[udev->slot_id]) { in xhci_check_args()
1388 return -EINVAL; in xhci_check_args()
1391 virt_dev = xhci->devs[udev->slot_id]; in xhci_check_args()
1392 if (virt_dev->udev != udev) { in xhci_check_args()
1395 return -EINVAL; in xhci_check_args()
1399 if (xhci->xhc_state & XHCI_STATE_HALTED) in xhci_check_args()
1400 return -ENODEV; in xhci_check_args()
1402 return 1; in xhci_check_args()
1426 out_ctx = xhci->devs[slot_id]->out_ctx; in xhci_check_maxpacket()
1428 hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2)); in xhci_check_maxpacket()
1429 max_packet_size = usb_endpoint_maxp(&urb->dev->ep0.desc); in xhci_check_maxpacket()
1443 /* FIXME: This won't work if a non-default control endpoint in xhci_check_maxpacket()
1449 return -ENOMEM; in xhci_check_maxpacket()
1451 command->in_ctx = xhci->devs[slot_id]->in_ctx; in xhci_check_maxpacket()
1452 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx); in xhci_check_maxpacket()
1456 ret = -ENOMEM; in xhci_check_maxpacket()
1460 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx, in xhci_check_maxpacket()
1461 xhci->devs[slot_id]->out_ctx, ep_index); in xhci_check_maxpacket()
1463 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index); in xhci_check_maxpacket()
1464 ep_ctx->ep_info &= cpu_to_le32(~EP_STATE_MASK);/* must clear */ in xhci_check_maxpacket()
1465 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK); in xhci_check_maxpacket()
1466 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size)); in xhci_check_maxpacket()
1468 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG); in xhci_check_maxpacket()
1469 ctrl_ctx->drop_flags = 0; in xhci_check_maxpacket()
1471 ret = xhci_configure_endpoint(xhci, urb->dev, command, in xhci_check_maxpacket()
1477 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG); in xhci_check_maxpacket()
1479 kfree(command->completion); in xhci_check_maxpacket()
1486 * non-error returns are a promise to giveback() the urb later
1500 return -EINVAL; in xhci_urb_enqueue()
1501 ret = xhci_check_args(hcd, urb->dev, urb->ep, in xhci_urb_enqueue()
1504 return ret ? ret : -EINVAL; in xhci_urb_enqueue()
1506 slot_id = urb->dev->slot_id; in xhci_urb_enqueue()
1507 ep_index = xhci_get_endpoint_index(&urb->ep->desc); in xhci_urb_enqueue()
1508 ep_state = &xhci->devs[slot_id]->eps[ep_index].ep_state; in xhci_urb_enqueue()
1513 return -ESHUTDOWN; in xhci_urb_enqueue()
1515 if (xhci->devs[slot_id]->flags & VDEV_PORT_ERROR) { in xhci_urb_enqueue()
1517 return -ENODEV; in xhci_urb_enqueue()
1522 return -EOPNOTSUPP; in xhci_urb_enqueue()
1525 if (usb_endpoint_xfer_isoc(&urb->ep->desc)) in xhci_urb_enqueue()
1526 num_tds = urb->number_of_packets; in xhci_urb_enqueue()
1527 else if (usb_endpoint_is_bulk_out(&urb->ep->desc) && in xhci_urb_enqueue()
1528 urb->transfer_buffer_length > 0 && in xhci_urb_enqueue()
1529 urb->transfer_flags & URB_ZERO_PACKET && in xhci_urb_enqueue()
1530 !(urb->transfer_buffer_length % usb_endpoint_maxp(&urb->ep->desc))) in xhci_urb_enqueue()
1533 num_tds = 1; in xhci_urb_enqueue()
1537 return -ENOMEM; in xhci_urb_enqueue()
1539 urb_priv->num_tds = num_tds; in xhci_urb_enqueue()
1540 urb_priv->num_tds_done = 0; in xhci_urb_enqueue()
1541 urb->hcpriv = urb_priv; in xhci_urb_enqueue()
1545 if (usb_endpoint_xfer_control(&urb->ep->desc)) { in xhci_urb_enqueue()
1549 if (urb->dev->speed == USB_SPEED_FULL) { in xhci_urb_enqueue()
1554 urb->hcpriv = NULL; in xhci_urb_enqueue()
1560 spin_lock_irqsave(&xhci->lock, flags); in xhci_urb_enqueue()
1562 if (xhci->xhc_state & XHCI_STATE_DYING) { in xhci_urb_enqueue()
1563 xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for non-responsive xHCI host.\n", in xhci_urb_enqueue()
1564 urb->ep->desc.bEndpointAddress, urb); in xhci_urb_enqueue()
1565 ret = -ESHUTDOWN; in xhci_urb_enqueue()
1571 ret = -EINVAL; in xhci_urb_enqueue()
1576 ret = -EINVAL; in xhci_urb_enqueue()
1580 switch (usb_endpoint_type(&urb->ep->desc)) { in xhci_urb_enqueue()
1602 urb->hcpriv = NULL; in xhci_urb_enqueue()
1604 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_urb_enqueue()
1618 * 1) If the HC is in the middle of processing the URB to be canceled, we
1624 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1654 spin_lock_irqsave(&xhci->lock, flags); in xhci_urb_dequeue()
1664 vdev = xhci->devs[urb->dev->slot_id]; in xhci_urb_dequeue()
1665 urb_priv = urb->hcpriv; in xhci_urb_dequeue()
1669 ep_index = xhci_get_endpoint_index(&urb->ep->desc); in xhci_urb_dequeue()
1670 ep = &vdev->eps[ep_index]; in xhci_urb_dequeue()
1676 temp = readl(&xhci->op_regs->status); in xhci_urb_dequeue()
1677 if (temp == ~(u32)0 || xhci->xhc_state & XHCI_STATE_DYING) { in xhci_urb_dequeue()
1683 * check ring is not re-allocated since URB was enqueued. If it is, then in xhci_urb_dequeue()
1687 if (!td_on_ring(&urb_priv->td[0], ep_ring)) { in xhci_urb_dequeue()
1689 for (i = urb_priv->num_tds_done; i < urb_priv->num_tds; i++) { in xhci_urb_dequeue()
1690 td = &urb_priv->td[i]; in xhci_urb_dequeue()
1691 if (!list_empty(&td->cancelled_td_list)) in xhci_urb_dequeue()
1692 list_del_init(&td->cancelled_td_list); in xhci_urb_dequeue()
1697 if (xhci->xhc_state & XHCI_STATE_HALTED) { in xhci_urb_dequeue()
1700 for (i = urb_priv->num_tds_done; in xhci_urb_dequeue()
1701 i < urb_priv->num_tds; in xhci_urb_dequeue()
1703 td = &urb_priv->td[i]; in xhci_urb_dequeue()
1704 if (!list_empty(&td->td_list)) in xhci_urb_dequeue()
1705 list_del_init(&td->td_list); in xhci_urb_dequeue()
1706 if (!list_empty(&td->cancelled_td_list)) in xhci_urb_dequeue()
1707 list_del_init(&td->cancelled_td_list); in xhci_urb_dequeue()
1712 i = urb_priv->num_tds_done; in xhci_urb_dequeue()
1713 if (i < urb_priv->num_tds) in xhci_urb_dequeue()
1717 urb, urb->dev->devpath, in xhci_urb_dequeue()
1718 urb->ep->desc.bEndpointAddress, in xhci_urb_dequeue()
1720 urb_priv->td[i].start_seg, in xhci_urb_dequeue()
1721 urb_priv->td[i].first_trb)); in xhci_urb_dequeue()
1723 for (; i < urb_priv->num_tds; i++) { in xhci_urb_dequeue()
1724 td = &urb_priv->td[i]; in xhci_urb_dequeue()
1726 if (list_empty(&td->cancelled_td_list)) { in xhci_urb_dequeue()
1727 td->cancel_status = TD_DIRTY; in xhci_urb_dequeue()
1728 list_add_tail(&td->cancelled_td_list, in xhci_urb_dequeue()
1729 &ep->cancelled_td_list); in xhci_urb_dequeue()
1736 if (!(ep->ep_state & EP_STOP_CMD_PENDING)) { in xhci_urb_dequeue()
1739 ret = -ENOMEM; in xhci_urb_dequeue()
1742 ep->ep_state |= EP_STOP_CMD_PENDING; in xhci_urb_dequeue()
1743 ep->stop_cmd_timer.expires = jiffies + in xhci_urb_dequeue()
1745 add_timer(&ep->stop_cmd_timer); in xhci_urb_dequeue()
1746 xhci_queue_stop_endpoint(xhci, command, urb->dev->slot_id, in xhci_urb_dequeue()
1751 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_urb_dequeue()
1758 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_urb_dequeue()
1759 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN); in xhci_urb_dequeue()
1774 * the xhci->devs[slot_id] structure.
1788 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__); in xhci_drop_endpoint()
1792 if (xhci->xhc_state & XHCI_STATE_DYING) in xhci_drop_endpoint()
1793 return -ENODEV; in xhci_drop_endpoint()
1796 drop_flag = xhci_get_endpoint_flag(&ep->desc); in xhci_drop_endpoint()
1798 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n", in xhci_drop_endpoint()
1803 in_ctx = xhci->devs[udev->slot_id]->in_ctx; in xhci_drop_endpoint()
1804 out_ctx = xhci->devs[udev->slot_id]->out_ctx; in xhci_drop_endpoint()
1812 ep_index = xhci_get_endpoint_index(&ep->desc); in xhci_drop_endpoint()
1818 le32_to_cpu(ctrl_ctx->drop_flags) & in xhci_drop_endpoint()
1819 xhci_get_endpoint_flag(&ep->desc)) { in xhci_drop_endpoint()
1821 if (xhci->devs[udev->slot_id]->eps[ep_index].ring != NULL) in xhci_drop_endpoint()
1827 ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag); in xhci_drop_endpoint()
1828 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags); in xhci_drop_endpoint()
1830 ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag); in xhci_drop_endpoint()
1831 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags); in xhci_drop_endpoint()
1833 xhci_debugfs_remove_endpoint(xhci, xhci->devs[udev->slot_id], ep_index); in xhci_drop_endpoint()
1835 xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep); in xhci_drop_endpoint()
1838 (unsigned int) ep->desc.bEndpointAddress, in xhci_drop_endpoint()
1839 udev->slot_id, in xhci_drop_endpoint()
1857 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1872 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__); in xhci_add_endpoint()
1875 ep->hcpriv = NULL; in xhci_add_endpoint()
1879 if (xhci->xhc_state & XHCI_STATE_DYING) in xhci_add_endpoint()
1880 return -ENODEV; in xhci_add_endpoint()
1882 added_ctxs = xhci_get_endpoint_flag(&ep->desc); in xhci_add_endpoint()
1888 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n", in xhci_add_endpoint()
1893 virt_dev = xhci->devs[udev->slot_id]; in xhci_add_endpoint()
1894 in_ctx = virt_dev->in_ctx; in xhci_add_endpoint()
1902 ep_index = xhci_get_endpoint_index(&ep->desc); in xhci_add_endpoint()
1906 if (virt_dev->eps[ep_index].ring && in xhci_add_endpoint()
1907 !(le32_to_cpu(ctrl_ctx->drop_flags) & added_ctxs)) { in xhci_add_endpoint()
1910 (unsigned int) ep->desc.bEndpointAddress); in xhci_add_endpoint()
1911 return -EINVAL; in xhci_add_endpoint()
1917 if (le32_to_cpu(ctrl_ctx->add_flags) & added_ctxs) { in xhci_add_endpoint()
1929 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n", in xhci_add_endpoint()
1930 __func__, ep->desc.bEndpointAddress); in xhci_add_endpoint()
1931 return -ENOMEM; in xhci_add_endpoint()
1934 ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs); in xhci_add_endpoint()
1935 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags); in xhci_add_endpoint()
1939 * this re-adds a new state for the endpoint from the new endpoint in xhci_add_endpoint()
1940 * descriptors. We must drop and re-add this endpoint, so we leave the in xhci_add_endpoint()
1943 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags); in xhci_add_endpoint()
1946 ep->hcpriv = udev; in xhci_add_endpoint()
1948 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, ep_index); in xhci_add_endpoint()
1952 (unsigned int) ep->desc.bEndpointAddress, in xhci_add_endpoint()
1953 udev->slot_id, in xhci_add_endpoint()
1967 ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx); in xhci_zero_in_ctx()
1979 ctrl_ctx->drop_flags = 0; in xhci_zero_in_ctx()
1980 ctrl_ctx->add_flags = 0; in xhci_zero_in_ctx()
1981 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx); in xhci_zero_in_ctx()
1982 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK); in xhci_zero_in_ctx()
1984 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1)); in xhci_zero_in_ctx()
1985 for (i = 1; i < 31; i++) { in xhci_zero_in_ctx()
1986 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i); in xhci_zero_in_ctx()
1987 ep_ctx->ep_info = 0; in xhci_zero_in_ctx()
1988 ep_ctx->ep_info2 = 0; in xhci_zero_in_ctx()
1989 ep_ctx->deq = 0; in xhci_zero_in_ctx()
1990 ep_ctx->tx_info = 0; in xhci_zero_in_ctx()
2003 ret = -ETIME; in xhci_configure_endpoint_result()
2006 dev_warn(&udev->dev, in xhci_configure_endpoint_result()
2008 ret = -ENOMEM; in xhci_configure_endpoint_result()
2013 dev_warn(&udev->dev, in xhci_configure_endpoint_result()
2015 ret = -ENOSPC; in xhci_configure_endpoint_result()
2020 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, " in xhci_configure_endpoint_result()
2021 "add flag = 1, " in xhci_configure_endpoint_result()
2023 ret = -EINVAL; in xhci_configure_endpoint_result()
2026 dev_warn(&udev->dev, in xhci_configure_endpoint_result()
2028 ret = -ENODEV; in xhci_configure_endpoint_result()
2038 ret = -EINVAL; in xhci_configure_endpoint_result()
2053 ret = -ETIME; in xhci_evaluate_context_result()
2056 dev_warn(&udev->dev, in xhci_evaluate_context_result()
2058 ret = -EINVAL; in xhci_evaluate_context_result()
2061 dev_warn(&udev->dev, in xhci_evaluate_context_result()
2063 ret = -EINVAL; in xhci_evaluate_context_result()
2066 dev_warn(&udev->dev, in xhci_evaluate_context_result()
2068 ret = -EINVAL; in xhci_evaluate_context_result()
2071 dev_warn(&udev->dev, in xhci_evaluate_context_result()
2073 ret = -ENODEV; in xhci_evaluate_context_result()
2077 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n"); in xhci_evaluate_context_result()
2078 ret = -EINVAL; in xhci_evaluate_context_result()
2088 ret = -EINVAL; in xhci_evaluate_context_result()
2101 * (bit 1). The default control endpoint is added during the Address in xhci_count_num_new_endpoints()
2104 valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2; in xhci_count_num_new_endpoints()
2105 valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2; in xhci_count_num_new_endpoints()
2111 return hweight32(valid_add_flags) - in xhci_count_num_new_endpoints()
2121 valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2; in xhci_count_num_dropped_endpoints()
2122 valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2; in xhci_count_num_dropped_endpoints()
2124 return hweight32(valid_drop_flags) - in xhci_count_num_dropped_endpoints()
2134 * - the first configure endpoint command drops more endpoints than it adds
2135 * - a second configure endpoint command that adds more endpoints is queued
2136 * - the first configure endpoint command fails, so the config is unchanged
2137 * - the second command may succeed, even though there isn't enough resources
2139 * Must be called with xhci->lock held.
2147 if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) { in xhci_reserve_host_resources()
2151 xhci->num_active_eps, added_eps, in xhci_reserve_host_resources()
2152 xhci->limit_active_eps); in xhci_reserve_host_resources()
2153 return -ENOMEM; in xhci_reserve_host_resources()
2155 xhci->num_active_eps += added_eps; in xhci_reserve_host_resources()
2158 xhci->num_active_eps); in xhci_reserve_host_resources()
2166 * Must be called with xhci->lock held.
2174 xhci->num_active_eps -= num_failed_eps; in xhci_free_host_resources()
2178 xhci->num_active_eps); in xhci_free_host_resources()
2185 * Must be called with xhci->lock held.
2193 xhci->num_active_eps -= num_dropped_eps; in xhci_finish_resource_reservation()
2198 xhci->num_active_eps); in xhci_finish_resource_reservation()
2203 switch (udev->speed) { in xhci_get_block_size()
2216 return 1; in xhci_get_block_size()
2223 if (interval_bw->overhead[LS_OVERHEAD_TYPE]) in xhci_get_largest_overhead()
2225 if (interval_bw->overhead[FS_OVERHEAD_TYPE]) in xhci_get_largest_overhead()
2242 bw_table = &xhci->rh_bw[virt_dev->real_port - 1].bw_table; in xhci_check_tt_bw_table()
2243 tt_info = virt_dev->tt_info; in xhci_check_tt_bw_table()
2250 if (old_active_eps == 0 && tt_info->active_eps != 0) { in xhci_check_tt_bw_table()
2251 if (bw_table->bw_used + TT_HS_OVERHEAD > HS_BW_LIMIT) in xhci_check_tt_bw_table()
2252 return -ENOMEM; in xhci_check_tt_bw_table()
2270 if (virt_dev->bw_table->ss_bw_in > (SS_BW_LIMIT_IN - bw_reserved)) in xhci_check_ss_bw()
2271 return -ENOMEM; in xhci_check_ss_bw()
2274 if (virt_dev->bw_table->ss_bw_out > (SS_BW_LIMIT_OUT - bw_reserved)) in xhci_check_ss_bw()
2275 return -ENOMEM; in xhci_check_ss_bw()
2281 * This algorithm is a very conservative estimate of the worst-case scheduling
2289 * over-estimate.
2302 * For interval 1, we have two possible microframes to schedule those packets
2336 if (virt_dev->udev->speed >= USB_SPEED_SUPER) in xhci_check_bw_table()
2339 if (virt_dev->udev->speed == USB_SPEED_HIGH) { in xhci_check_bw_table()
2348 bw_table = virt_dev->bw_table; in xhci_check_bw_table()
2352 block_size = xhci_get_block_size(virt_dev->udev); in xhci_check_bw_table()
2357 if (virt_dev->tt_info) { in xhci_check_bw_table()
2360 virt_dev->real_port); in xhci_check_bw_table()
2364 return -ENOMEM; in xhci_check_bw_table()
2368 virt_dev->tt_info->slot_id, in xhci_check_bw_table()
2369 virt_dev->tt_info->ttport); in xhci_check_bw_table()
2373 virt_dev->real_port); in xhci_check_bw_table()
2379 bw_used = DIV_ROUND_UP(bw_table->interval0_esit_payload, block_size) + in xhci_check_bw_table()
2380 bw_table->interval_bw[0].num_packets * in xhci_check_bw_table()
2381 xhci_get_largest_overhead(&bw_table->interval_bw[0]); in xhci_check_bw_table()
2383 for (i = 1; i < XHCI_MAX_INTERVAL; i++) { in xhci_check_bw_table()
2394 bw_table->interval_bw[i].num_packets; in xhci_check_bw_table()
2399 if (list_empty(&bw_table->interval_bw[i].endpoints)) in xhci_check_bw_table()
2405 ep_entry = bw_table->interval_bw[i].endpoints.next; in xhci_check_bw_table()
2410 virt_ep->bw_info.max_packet_size, in xhci_check_bw_table()
2418 &bw_table->interval_bw[i]); in xhci_check_bw_table()
2423 * (1 << (i + 1)) possible scheduling opportunities? in xhci_check_bw_table()
2425 packets_transmitted = packets_remaining >> (i + 1); in xhci_check_bw_table()
2431 packets_remaining = packets_remaining % (1 << (i + 1)); in xhci_check_bw_table()
2457 return -ENOMEM; in xhci_check_bw_table()
2461 * Ok, we know we have some packets left over after even-handedly in xhci_check_bw_table()
2463 * fit into, so we over-schedule and say they will be scheduled every in xhci_check_bw_table()
2469 if (!virt_dev->tt_info && virt_dev->udev->speed == USB_SPEED_HIGH) { in xhci_check_bw_table()
2470 unsigned int port_index = virt_dev->real_port - 1; in xhci_check_bw_table()
2477 xhci->rh_bw[port_index].num_active_tts; in xhci_check_bw_table()
2484 (max_bandwidth - bw_used - bw_reserved) * 100 / in xhci_check_bw_table()
2491 return -ENOMEM; in xhci_check_bw_table()
2494 bw_table->bw_used = bw_used; in xhci_check_bw_table()
2512 unsigned int mps = DIV_ROUND_UP(ep_bw->max_packet_size, SS_BLOCK); in xhci_get_ss_bw_consumed()
2514 if (ep_bw->ep_interval == 0) in xhci_get_ss_bw_consumed()
2516 (ep_bw->mult * ep_bw->num_packets * in xhci_get_ss_bw_consumed()
2518 return DIV_ROUND_UP(ep_bw->mult * ep_bw->num_packets * in xhci_get_ss_bw_consumed()
2520 1 << ep_bw->ep_interval); in xhci_get_ss_bw_consumed()
2534 if (xhci_is_async_ep(ep_bw->type)) in xhci_drop_ep_from_interval_table()
2537 if (udev->speed >= USB_SPEED_SUPER) { in xhci_drop_ep_from_interval_table()
2538 if (xhci_is_sync_in_ep(ep_bw->type)) in xhci_drop_ep_from_interval_table()
2539 xhci->devs[udev->slot_id]->bw_table->ss_bw_in -= in xhci_drop_ep_from_interval_table()
2542 xhci->devs[udev->slot_id]->bw_table->ss_bw_out -= in xhci_drop_ep_from_interval_table()
2550 if (list_empty(&virt_ep->bw_endpoint_list)) in xhci_drop_ep_from_interval_table()
2555 if (udev->speed == USB_SPEED_HIGH) in xhci_drop_ep_from_interval_table()
2556 normalized_interval = ep_bw->ep_interval; in xhci_drop_ep_from_interval_table()
2558 normalized_interval = ep_bw->ep_interval - 3; in xhci_drop_ep_from_interval_table()
2561 bw_table->interval0_esit_payload -= ep_bw->max_esit_payload; in xhci_drop_ep_from_interval_table()
2562 interval_bw = &bw_table->interval_bw[normalized_interval]; in xhci_drop_ep_from_interval_table()
2563 interval_bw->num_packets -= ep_bw->num_packets; in xhci_drop_ep_from_interval_table()
2564 switch (udev->speed) { in xhci_drop_ep_from_interval_table()
2566 interval_bw->overhead[LS_OVERHEAD_TYPE] -= 1; in xhci_drop_ep_from_interval_table()
2569 interval_bw->overhead[FS_OVERHEAD_TYPE] -= 1; in xhci_drop_ep_from_interval_table()
2572 interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1; in xhci_drop_ep_from_interval_table()
2584 tt_info->active_eps -= 1; in xhci_drop_ep_from_interval_table()
2585 list_del_init(&virt_ep->bw_endpoint_list); in xhci_drop_ep_from_interval_table()
2599 if (xhci_is_async_ep(ep_bw->type)) in xhci_add_ep_to_interval_table()
2602 if (udev->speed == USB_SPEED_SUPER) { in xhci_add_ep_to_interval_table()
2603 if (xhci_is_sync_in_ep(ep_bw->type)) in xhci_add_ep_to_interval_table()
2604 xhci->devs[udev->slot_id]->bw_table->ss_bw_in += in xhci_add_ep_to_interval_table()
2607 xhci->devs[udev->slot_id]->bw_table->ss_bw_out += in xhci_add_ep_to_interval_table()
2615 if (udev->speed == USB_SPEED_HIGH) in xhci_add_ep_to_interval_table()
2616 normalized_interval = ep_bw->ep_interval; in xhci_add_ep_to_interval_table()
2618 normalized_interval = ep_bw->ep_interval - 3; in xhci_add_ep_to_interval_table()
2621 bw_table->interval0_esit_payload += ep_bw->max_esit_payload; in xhci_add_ep_to_interval_table()
2622 interval_bw = &bw_table->interval_bw[normalized_interval]; in xhci_add_ep_to_interval_table()
2623 interval_bw->num_packets += ep_bw->num_packets; in xhci_add_ep_to_interval_table()
2624 switch (udev->speed) { in xhci_add_ep_to_interval_table()
2626 interval_bw->overhead[LS_OVERHEAD_TYPE] += 1; in xhci_add_ep_to_interval_table()
2629 interval_bw->overhead[FS_OVERHEAD_TYPE] += 1; in xhci_add_ep_to_interval_table()
2632 interval_bw->overhead[HS_OVERHEAD_TYPE] += 1; in xhci_add_ep_to_interval_table()
2645 tt_info->active_eps += 1; in xhci_add_ep_to_interval_table()
2647 list_for_each_entry(smaller_ep, &interval_bw->endpoints, in xhci_add_ep_to_interval_table()
2649 if (ep_bw->max_packet_size >= in xhci_add_ep_to_interval_table()
2650 smaller_ep->bw_info.max_packet_size) { in xhci_add_ep_to_interval_table()
2652 list_add_tail(&virt_ep->bw_endpoint_list, in xhci_add_ep_to_interval_table()
2653 &smaller_ep->bw_endpoint_list); in xhci_add_ep_to_interval_table()
2658 list_add_tail(&virt_ep->bw_endpoint_list, in xhci_add_ep_to_interval_table()
2659 &interval_bw->endpoints); in xhci_add_ep_to_interval_table()
2667 if (!virt_dev->tt_info) in xhci_update_tt_active_eps()
2670 rh_bw_info = &xhci->rh_bw[virt_dev->real_port - 1]; in xhci_update_tt_active_eps()
2672 virt_dev->tt_info->active_eps != 0) { in xhci_update_tt_active_eps()
2673 rh_bw_info->num_active_tts += 1; in xhci_update_tt_active_eps()
2674 rh_bw_info->bw_table.bw_used += TT_HS_OVERHEAD; in xhci_update_tt_active_eps()
2676 virt_dev->tt_info->active_eps == 0) { in xhci_update_tt_active_eps()
2677 rh_bw_info->num_active_tts -= 1; in xhci_update_tt_active_eps()
2678 rh_bw_info->bw_table.bw_used -= TT_HS_OVERHEAD; in xhci_update_tt_active_eps()
2691 if (virt_dev->tt_info) in xhci_reserve_bandwidth()
2692 old_active_eps = virt_dev->tt_info->active_eps; in xhci_reserve_bandwidth()
2698 return -ENOMEM; in xhci_reserve_bandwidth()
2706 memcpy(&ep_bw_info[i], &virt_dev->eps[i].bw_info, in xhci_reserve_bandwidth()
2713 &virt_dev->eps[i].bw_info, in xhci_reserve_bandwidth()
2714 virt_dev->bw_table, in xhci_reserve_bandwidth()
2715 virt_dev->udev, in xhci_reserve_bandwidth()
2716 &virt_dev->eps[i], in xhci_reserve_bandwidth()
2717 virt_dev->tt_info); in xhci_reserve_bandwidth()
2720 xhci_update_bw_info(xhci, virt_dev->in_ctx, ctrl_ctx, virt_dev); in xhci_reserve_bandwidth()
2725 &virt_dev->eps[i].bw_info, in xhci_reserve_bandwidth()
2726 virt_dev->bw_table, in xhci_reserve_bandwidth()
2727 virt_dev->udev, in xhci_reserve_bandwidth()
2728 &virt_dev->eps[i], in xhci_reserve_bandwidth()
2729 virt_dev->tt_info); in xhci_reserve_bandwidth()
2750 &virt_dev->eps[i].bw_info, in xhci_reserve_bandwidth()
2751 virt_dev->bw_table, in xhci_reserve_bandwidth()
2752 virt_dev->udev, in xhci_reserve_bandwidth()
2753 &virt_dev->eps[i], in xhci_reserve_bandwidth()
2754 virt_dev->tt_info); in xhci_reserve_bandwidth()
2757 memcpy(&virt_dev->eps[i].bw_info, &ep_bw_info[i], in xhci_reserve_bandwidth()
2762 &virt_dev->eps[i].bw_info, in xhci_reserve_bandwidth()
2763 virt_dev->bw_table, in xhci_reserve_bandwidth()
2764 virt_dev->udev, in xhci_reserve_bandwidth()
2765 &virt_dev->eps[i], in xhci_reserve_bandwidth()
2766 virt_dev->tt_info); in xhci_reserve_bandwidth()
2768 return -ENOMEM; in xhci_reserve_bandwidth()
2787 return -EINVAL; in xhci_configure_endpoint()
2789 spin_lock_irqsave(&xhci->lock, flags); in xhci_configure_endpoint()
2791 if (xhci->xhc_state & XHCI_STATE_DYING) { in xhci_configure_endpoint()
2792 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_configure_endpoint()
2793 return -ESHUTDOWN; in xhci_configure_endpoint()
2796 virt_dev = xhci->devs[udev->slot_id]; in xhci_configure_endpoint()
2798 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx); in xhci_configure_endpoint()
2800 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_configure_endpoint()
2803 return -ENOMEM; in xhci_configure_endpoint()
2806 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) && in xhci_configure_endpoint()
2808 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_configure_endpoint()
2811 xhci->num_active_eps); in xhci_configure_endpoint()
2812 return -ENOMEM; in xhci_configure_endpoint()
2814 if ((xhci->quirks & XHCI_SW_BW_CHECKING) && in xhci_configure_endpoint()
2815 xhci_reserve_bandwidth(xhci, virt_dev, command->in_ctx)) { in xhci_configure_endpoint()
2816 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) in xhci_configure_endpoint()
2818 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_configure_endpoint()
2820 return -ENOMEM; in xhci_configure_endpoint()
2823 slot_ctx = xhci_get_slot_ctx(xhci, command->in_ctx); in xhci_configure_endpoint()
2830 command->in_ctx->dma, in xhci_configure_endpoint()
2831 udev->slot_id, must_succeed); in xhci_configure_endpoint()
2834 command->in_ctx->dma, in xhci_configure_endpoint()
2835 udev->slot_id, must_succeed); in xhci_configure_endpoint()
2837 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) in xhci_configure_endpoint()
2839 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_configure_endpoint()
2842 return -ENOMEM; in xhci_configure_endpoint()
2845 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_configure_endpoint()
2848 wait_for_completion(command->completion); in xhci_configure_endpoint()
2852 &command->status); in xhci_configure_endpoint()
2855 &command->status); in xhci_configure_endpoint()
2857 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) { in xhci_configure_endpoint()
2858 spin_lock_irqsave(&xhci->lock, flags); in xhci_configure_endpoint()
2866 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_configure_endpoint()
2871 ret = xhci_vendor_sync_dev_ctx(xhci, udev->slot_id); in xhci_configure_endpoint()
2882 struct xhci_virt_ep *ep = &vdev->eps[i]; in xhci_check_bw_drop_ep_streams()
2884 if (ep->ep_state & EP_HAS_STREAMS) { in xhci_check_bw_drop_ep_streams()
2887 xhci_free_stream_info(xhci, ep->stream_info); in xhci_check_bw_drop_ep_streams()
2888 ep->stream_info = NULL; in xhci_check_bw_drop_ep_streams()
2889 ep->ep_state &= ~EP_HAS_STREAMS; in xhci_check_bw_drop_ep_streams()
2900 * else should be touching the xhci->devs[slot_id] structure, so we
2901 * don't need to take the xhci->lock for manipulating that.
2917 if ((xhci->xhc_state & XHCI_STATE_DYING) || in xhci_check_bandwidth()
2918 (xhci->xhc_state & XHCI_STATE_REMOVING)) in xhci_check_bandwidth()
2919 return -ENODEV; in xhci_check_bandwidth()
2922 virt_dev = xhci->devs[udev->slot_id]; in xhci_check_bandwidth()
2926 return -ENOMEM; in xhci_check_bandwidth()
2928 command->in_ctx = virt_dev->in_ctx; in xhci_check_bandwidth()
2930 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */ in xhci_check_bandwidth()
2931 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx); in xhci_check_bandwidth()
2935 ret = -ENOMEM; in xhci_check_bandwidth()
2938 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG); in xhci_check_bandwidth()
2939 ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG); in xhci_check_bandwidth()
2940 ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG)); in xhci_check_bandwidth()
2943 if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) && in xhci_check_bandwidth()
2944 ctrl_ctx->drop_flags == 0) { in xhci_check_bandwidth()
2948 /* Fix up Context Entries field. Minimum value is EP0 == BIT(1). */ in xhci_check_bandwidth()
2949 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx); in xhci_check_bandwidth()
2950 for (i = 31; i >= 1; i--) { in xhci_check_bandwidth()
2953 if ((virt_dev->eps[i-1].ring && !(ctrl_ctx->drop_flags & le32)) in xhci_check_bandwidth()
2954 || (ctrl_ctx->add_flags & le32) || i == 1) { in xhci_check_bandwidth()
2955 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK); in xhci_check_bandwidth()
2956 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(i)); in xhci_check_bandwidth()
2968 for (i = 1; i < 31; i++) { in xhci_check_bandwidth()
2969 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) && in xhci_check_bandwidth()
2970 !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1)))) { in xhci_check_bandwidth()
2980 for (i = 1; i < 31; i++) { in xhci_check_bandwidth()
2981 if (!virt_dev->eps[i].new_ring) in xhci_check_bandwidth()
2986 if (virt_dev->eps[i].ring) { in xhci_check_bandwidth()
2990 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring; in xhci_check_bandwidth()
2991 virt_dev->eps[i].new_ring = NULL; in xhci_check_bandwidth()
2995 kfree(command->completion); in xhci_check_bandwidth()
3014 virt_dev = xhci->devs[udev->slot_id]; in xhci_reset_bandwidth()
3017 if (virt_dev->eps[i].new_ring) { in xhci_reset_bandwidth()
3022 xhci_ring_free(xhci, virt_dev->eps[i].new_ring); in xhci_reset_bandwidth()
3024 virt_dev->eps[i].new_ring = NULL; in xhci_reset_bandwidth()
3037 ctrl_ctx->add_flags = cpu_to_le32(add_flags); in xhci_setup_input_ctx_for_config_ep()
3038 ctrl_ctx->drop_flags = cpu_to_le32(drop_flags); in xhci_setup_input_ctx_for_config_ep()
3040 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG); in xhci_setup_input_ctx_for_config_ep()
3055 spin_lock_irqsave(&xhci->lock, flags); in xhci_endpoint_disable()
3057 udev = (struct usb_device *)host_ep->hcpriv; in xhci_endpoint_disable()
3058 if (!udev || !udev->slot_id) in xhci_endpoint_disable()
3061 vdev = xhci->devs[udev->slot_id]; in xhci_endpoint_disable()
3065 ep_index = xhci_get_endpoint_index(&host_ep->desc); in xhci_endpoint_disable()
3066 ep = &vdev->eps[ep_index]; in xhci_endpoint_disable()
3071 if (ep->ep_state & EP_CLEARING_TT) { in xhci_endpoint_disable()
3072 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_disable()
3073 schedule_timeout_uninterruptible(1); in xhci_endpoint_disable()
3077 if (ep->ep_state) in xhci_endpoint_disable()
3079 ep->ep_state); in xhci_endpoint_disable()
3081 host_ep->hcpriv = NULL; in xhci_endpoint_disable()
3082 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_disable()
3112 if (!host_ep->hcpriv) in xhci_endpoint_reset()
3114 udev = (struct usb_device *) host_ep->hcpriv; in xhci_endpoint_reset()
3115 vdev = xhci->devs[udev->slot_id]; in xhci_endpoint_reset()
3118 * vdev may be lost due to xHC restore error and re-initialization in xhci_endpoint_reset()
3122 if (!udev->slot_id || !vdev) in xhci_endpoint_reset()
3124 ep_index = xhci_get_endpoint_index(&host_ep->desc); in xhci_endpoint_reset()
3125 ep = &vdev->eps[ep_index]; in xhci_endpoint_reset()
3130 spin_lock_irqsave(&xhci->lock, flags); in xhci_endpoint_reset()
3131 if (ep->ep_state & EP_HARD_CLEAR_TOGGLE) { in xhci_endpoint_reset()
3132 ep->ep_state &= ~EP_HARD_CLEAR_TOGGLE; in xhci_endpoint_reset()
3133 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3136 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3137 /* Only interrupt and bulk ep's use data toggle, USB2 spec 5.5.4-> */ in xhci_endpoint_reset()
3138 if (usb_endpoint_xfer_control(&host_ep->desc) || in xhci_endpoint_reset()
3139 usb_endpoint_xfer_isoc(&host_ep->desc)) in xhci_endpoint_reset()
3142 ep_flag = xhci_get_endpoint_flag(&host_ep->desc); in xhci_endpoint_reset()
3155 spin_lock_irqsave(&xhci->lock, flags); in xhci_endpoint_reset()
3158 ep->ep_state |= EP_SOFT_CLEAR_TOGGLE; in xhci_endpoint_reset()
3166 if (!list_empty(&ep->ring->td_list)) { in xhci_endpoint_reset()
3167 dev_err(&udev->dev, "EP not empty, refuse reset\n"); in xhci_endpoint_reset()
3168 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3173 err = xhci_queue_stop_endpoint(xhci, stop_cmd, udev->slot_id, in xhci_endpoint_reset()
3176 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3184 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3186 wait_for_completion(stop_cmd->completion); in xhci_endpoint_reset()
3188 err = xhci_vendor_sync_dev_ctx(xhci, udev->slot_id); in xhci_endpoint_reset()
3195 spin_lock_irqsave(&xhci->lock, flags); in xhci_endpoint_reset()
3198 ctrl_ctx = xhci_get_input_control_ctx(cfg_cmd->in_ctx); in xhci_endpoint_reset()
3200 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3207 xhci_setup_input_ctx_for_config_ep(xhci, cfg_cmd->in_ctx, vdev->out_ctx, in xhci_endpoint_reset()
3209 xhci_endpoint_copy(xhci, cfg_cmd->in_ctx, vdev->out_ctx, ep_index); in xhci_endpoint_reset()
3211 err = xhci_queue_configure_endpoint(xhci, cfg_cmd, cfg_cmd->in_ctx->dma, in xhci_endpoint_reset()
3212 udev->slot_id, false); in xhci_endpoint_reset()
3214 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3222 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3224 wait_for_completion(cfg_cmd->completion); in xhci_endpoint_reset()
3226 err = xhci_vendor_sync_dev_ctx(xhci, udev->slot_id); in xhci_endpoint_reset()
3234 spin_lock_irqsave(&xhci->lock, flags); in xhci_endpoint_reset()
3235 if (ep->ep_state & EP_SOFT_CLEAR_TOGGLE) in xhci_endpoint_reset()
3236 ep->ep_state &= ~EP_SOFT_CLEAR_TOGGLE; in xhci_endpoint_reset()
3237 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3249 return -EINVAL; in xhci_check_streams_endpoint()
3250 ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__); in xhci_check_streams_endpoint()
3252 return ret ? ret : -EINVAL; in xhci_check_streams_endpoint()
3253 if (usb_ss_max_streams(&ep->ss_ep_comp) == 0) { in xhci_check_streams_endpoint()
3256 ep->desc.bEndpointAddress); in xhci_check_streams_endpoint()
3257 return -EINVAL; in xhci_check_streams_endpoint()
3260 ep_index = xhci_get_endpoint_index(&ep->desc); in xhci_check_streams_endpoint()
3261 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state; in xhci_check_streams_endpoint()
3266 ep->desc.bEndpointAddress); in xhci_check_streams_endpoint()
3269 return -EINVAL; in xhci_check_streams_endpoint()
3271 if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) { in xhci_check_streams_endpoint()
3274 ep->desc.bEndpointAddress); in xhci_check_streams_endpoint()
3275 return -EINVAL; in xhci_check_streams_endpoint()
3293 max_streams = HCC_MAX_PSA(xhci->hcc_params); in xhci_calculate_streams_entries()
3318 eps[i], udev->slot_id); in xhci_calculate_streams_and_bitmask()
3322 max_streams = usb_ss_max_streams(&eps[i]->ss_ep_comp); in xhci_calculate_streams_and_bitmask()
3323 if (max_streams < (*num_streams - 1)) { in xhci_calculate_streams_and_bitmask()
3325 eps[i]->desc.bEndpointAddress, in xhci_calculate_streams_and_bitmask()
3327 *num_streams = max_streams+1; in xhci_calculate_streams_and_bitmask()
3330 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc); in xhci_calculate_streams_and_bitmask()
3332 return -EINVAL; in xhci_calculate_streams_and_bitmask()
3348 slot_id = udev->slot_id; in xhci_calculate_no_streams_bitmask()
3349 if (!xhci->devs[slot_id]) in xhci_calculate_no_streams_bitmask()
3353 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_calculate_no_streams_bitmask()
3354 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state; in xhci_calculate_no_streams_bitmask()
3360 eps[i]->desc.bEndpointAddress); in xhci_calculate_no_streams_bitmask()
3369 eps[i]->desc.bEndpointAddress); in xhci_calculate_no_streams_bitmask()
3371 "with non-streams endpoint\n"); in xhci_calculate_no_streams_bitmask()
3374 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc); in xhci_calculate_no_streams_bitmask()
3411 return -EINVAL; in xhci_alloc_streams()
3416 num_streams += 1; in xhci_alloc_streams()
3422 if ((xhci->quirks & XHCI_BROKEN_STREAMS) || in xhci_alloc_streams()
3423 HCC_MAX_PSA(xhci->hcc_params) < 4) { in xhci_alloc_streams()
3425 return -ENOSYS; in xhci_alloc_streams()
3430 return -ENOMEM; in xhci_alloc_streams()
3432 ctrl_ctx = xhci_get_input_control_ctx(config_cmd->in_ctx); in xhci_alloc_streams()
3437 return -ENOMEM; in xhci_alloc_streams()
3444 spin_lock_irqsave(&xhci->lock, flags); in xhci_alloc_streams()
3449 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_alloc_streams()
3452 if (num_streams <= 1) { in xhci_alloc_streams()
3456 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_alloc_streams()
3457 return -EINVAL; in xhci_alloc_streams()
3459 vdev = xhci->devs[udev->slot_id]; in xhci_alloc_streams()
3464 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_alloc_streams()
3465 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS; in xhci_alloc_streams()
3467 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_alloc_streams()
3478 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_alloc_streams()
3479 max_packet = usb_endpoint_maxp(&eps[i]->desc); in xhci_alloc_streams()
3480 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci, in xhci_alloc_streams()
3484 if (!vdev->eps[ep_index].stream_info) in xhci_alloc_streams()
3495 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_alloc_streams()
3496 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index); in xhci_alloc_streams()
3498 xhci_endpoint_copy(xhci, config_cmd->in_ctx, in xhci_alloc_streams()
3499 vdev->out_ctx, ep_index); in xhci_alloc_streams()
3501 vdev->eps[ep_index].stream_info); in xhci_alloc_streams()
3506 xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx, in xhci_alloc_streams()
3507 vdev->out_ctx, ctrl_ctx, in xhci_alloc_streams()
3521 spin_lock_irqsave(&xhci->lock, flags); in xhci_alloc_streams()
3523 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_alloc_streams()
3524 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS; in xhci_alloc_streams()
3526 udev->slot_id, ep_index); in xhci_alloc_streams()
3527 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS; in xhci_alloc_streams()
3530 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_alloc_streams()
3533 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_alloc_streams()
3536 /* Subtract 1 for stream 0, which drivers can't use */ in xhci_alloc_streams()
3537 return num_streams - 1; in xhci_alloc_streams()
3542 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_alloc_streams()
3543 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info); in xhci_alloc_streams()
3544 vdev->eps[ep_index].stream_info = NULL; in xhci_alloc_streams()
3548 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS; in xhci_alloc_streams()
3549 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS; in xhci_alloc_streams()
3553 return -ENOMEM; in xhci_alloc_streams()
3576 vdev = xhci->devs[udev->slot_id]; in xhci_free_streams()
3579 spin_lock_irqsave(&xhci->lock, flags); in xhci_free_streams()
3583 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_free_streams()
3584 return -EINVAL; in xhci_free_streams()
3591 ep_index = xhci_get_endpoint_index(&eps[0]->desc); in xhci_free_streams()
3592 command = vdev->eps[ep_index].stream_info->free_streams_command; in xhci_free_streams()
3593 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx); in xhci_free_streams()
3595 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_free_streams()
3598 return -EINVAL; in xhci_free_streams()
3604 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_free_streams()
3605 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index); in xhci_free_streams()
3606 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |= in xhci_free_streams()
3609 xhci_endpoint_copy(xhci, command->in_ctx, in xhci_free_streams()
3610 vdev->out_ctx, ep_index); in xhci_free_streams()
3612 &vdev->eps[ep_index]); in xhci_free_streams()
3614 xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx, in xhci_free_streams()
3615 vdev->out_ctx, ctrl_ctx, in xhci_free_streams()
3617 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_free_streams()
3631 spin_lock_irqsave(&xhci->lock, flags); in xhci_free_streams()
3633 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_free_streams()
3634 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info); in xhci_free_streams()
3635 vdev->eps[ep_index].stream_info = NULL; in xhci_free_streams()
3639 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS; in xhci_free_streams()
3640 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS; in xhci_free_streams()
3642 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_free_streams()
3652 * Must be called with xhci->lock held.
3661 for (i = (drop_control_ep ? 0 : 1); i < 31; i++) { in xhci_free_device_endpoint_resources()
3662 if (virt_dev->eps[i].ring) { in xhci_free_device_endpoint_resources()
3663 drop_flags |= 1 << i; in xhci_free_device_endpoint_resources()
3667 xhci->num_active_eps -= num_dropped_eps; in xhci_free_device_endpoint_resources()
3673 xhci->num_active_eps); in xhci_free_device_endpoint_resources()
3680 * xhci_address_device(), and then re-set up the configuration. If this is
3682 * settings will be re-installed through the normal bandwidth allocation
3691 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3692 * re-allocate the device.
3710 slot_id = udev->slot_id; in xhci_discover_or_reset_device()
3711 virt_dev = xhci->devs[slot_id]; in xhci_discover_or_reset_device()
3714 "not exist. Re-allocate the device\n", slot_id); in xhci_discover_or_reset_device()
3716 if (ret == 1) in xhci_discover_or_reset_device()
3719 return -EINVAL; in xhci_discover_or_reset_device()
3722 if (virt_dev->tt_info) in xhci_discover_or_reset_device()
3723 old_active_eps = virt_dev->tt_info->active_eps; in xhci_discover_or_reset_device()
3725 if (virt_dev->udev != udev) { in xhci_discover_or_reset_device()
3728 * Re-allocate the device. in xhci_discover_or_reset_device()
3731 "not match the udev. Re-allocate the device\n", in xhci_discover_or_reset_device()
3734 if (ret == 1) in xhci_discover_or_reset_device()
3737 return -EINVAL; in xhci_discover_or_reset_device()
3741 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx); in xhci_discover_or_reset_device()
3742 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) == in xhci_discover_or_reset_device()
3758 return -ENOMEM; in xhci_discover_or_reset_device()
3762 spin_lock_irqsave(&xhci->lock, flags); in xhci_discover_or_reset_device()
3767 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_discover_or_reset_device()
3771 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_discover_or_reset_device()
3774 wait_for_completion(reset_device_cmd->completion); in xhci_discover_or_reset_device()
3787 ret = reset_device_cmd->status; in xhci_discover_or_reset_device()
3792 ret = -ETIME; in xhci_discover_or_reset_device()
3798 xhci_get_slot_state(xhci, virt_dev->out_ctx)); in xhci_discover_or_reset_device()
3811 ret = -EINVAL; in xhci_discover_or_reset_device()
3816 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) { in xhci_discover_or_reset_device()
3817 spin_lock_irqsave(&xhci->lock, flags); in xhci_discover_or_reset_device()
3820 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_discover_or_reset_device()
3824 for (i = 1; i < 31; i++) { in xhci_discover_or_reset_device()
3825 struct xhci_virt_ep *ep = &virt_dev->eps[i]; in xhci_discover_or_reset_device()
3827 if (ep->ep_state & EP_HAS_STREAMS) { in xhci_discover_or_reset_device()
3830 xhci_free_stream_info(xhci, ep->stream_info); in xhci_discover_or_reset_device()
3831 ep->stream_info = NULL; in xhci_discover_or_reset_device()
3832 ep->ep_state &= ~EP_HAS_STREAMS; in xhci_discover_or_reset_device()
3835 if (ep->ring) { in xhci_discover_or_reset_device()
3839 if (!list_empty(&virt_dev->eps[i].bw_endpoint_list)) in xhci_discover_or_reset_device()
3841 &virt_dev->eps[i].bw_info, in xhci_discover_or_reset_device()
3842 virt_dev->bw_table, in xhci_discover_or_reset_device()
3844 &virt_dev->eps[i], in xhci_discover_or_reset_device()
3845 virt_dev->tt_info); in xhci_discover_or_reset_device()
3846 xhci_clear_endpoint_bw_info(&virt_dev->eps[i].bw_info); in xhci_discover_or_reset_device()
3850 virt_dev->flags = 0; in xhci_discover_or_reset_device()
3875 if (xhci->quirks & XHCI_RESET_ON_RESUME) in xhci_free_dev()
3876 pm_runtime_put_noidle(hcd->self.controller); in xhci_free_dev()
3882 if (ret <= 0 && ret != -ENODEV) in xhci_free_dev()
3885 virt_dev = xhci->devs[udev->slot_id]; in xhci_free_dev()
3886 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx); in xhci_free_dev()
3891 virt_dev->eps[i].ep_state &= ~EP_STOP_CMD_PENDING; in xhci_free_dev()
3892 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer); in xhci_free_dev()
3894 virt_dev->udev = NULL; in xhci_free_dev()
3895 xhci_disable_slot(xhci, udev->slot_id); in xhci_free_dev()
3896 xhci_free_virt_device(xhci, udev->slot_id); in xhci_free_dev()
3908 return -ENOMEM; in xhci_disable_slot()
3912 spin_lock_irqsave(&xhci->lock, flags); in xhci_disable_slot()
3914 state = readl(&xhci->op_regs->status); in xhci_disable_slot()
3915 if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) || in xhci_disable_slot()
3916 (xhci->xhc_state & XHCI_STATE_HALTED)) { in xhci_disable_slot()
3917 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_disable_slot()
3919 return -ENODEV; in xhci_disable_slot()
3925 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_disable_slot()
3930 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_disable_slot()
3932 wait_for_completion(command->completion); in xhci_disable_slot()
3934 if (command->status != COMP_SUCCESS) in xhci_disable_slot()
3936 slot_id, command->status); in xhci_disable_slot()
3947 * Must be called with xhci->lock held.
3951 if (xhci->num_active_eps + 1 > xhci->limit_active_eps) { in xhci_reserve_host_control_ep_resources()
3954 "%u active, need to add 1, limit is %u.", in xhci_reserve_host_control_ep_resources()
3955 xhci->num_active_eps, xhci->limit_active_eps); in xhci_reserve_host_control_ep_resources()
3956 return -ENOMEM; in xhci_reserve_host_control_ep_resources()
3958 xhci->num_active_eps += 1; in xhci_reserve_host_control_ep_resources()
3960 "Adding 1 ep ctx, %u now active.", in xhci_reserve_host_control_ep_resources()
3961 xhci->num_active_eps); in xhci_reserve_host_control_ep_resources()
3968 * timed out, or allocating memory failed. Returns 1 on success.
3983 spin_lock_irqsave(&xhci->lock, flags); in xhci_alloc_dev()
3986 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_alloc_dev()
3992 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_alloc_dev()
3994 wait_for_completion(command->completion); in xhci_alloc_dev()
3995 slot_id = command->slot_id; in xhci_alloc_dev()
3997 if (!slot_id || command->status != COMP_SUCCESS) { in xhci_alloc_dev()
4001 readl(&xhci->cap_regs->hcs_params1))); in xhci_alloc_dev()
4008 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) { in xhci_alloc_dev()
4009 spin_lock_irqsave(&xhci->lock, flags); in xhci_alloc_dev()
4012 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_alloc_dev()
4015 xhci->num_active_eps); in xhci_alloc_dev()
4018 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_alloc_dev()
4036 vdev = xhci->devs[slot_id]; in xhci_alloc_dev()
4037 slot_ctx = xhci_get_slot_ctx(xhci, vdev->out_ctx); in xhci_alloc_dev()
4040 udev->slot_id = slot_id; in xhci_alloc_dev()
4048 if (xhci->quirks & XHCI_RESET_ON_RESUME) in xhci_alloc_dev()
4049 pm_runtime_get_noresume(hcd->self.controller); in xhci_alloc_dev()
4053 return 1; in xhci_alloc_dev()
4056 xhci_disable_slot(xhci, udev->slot_id); in xhci_alloc_dev()
4057 xhci_free_virt_device(xhci, udev->slot_id); in xhci_alloc_dev()
4079 mutex_lock(&xhci->mutex); in xhci_setup_device()
4081 if (xhci->xhc_state) { /* dying, removing or halted */ in xhci_setup_device()
4082 ret = -ESHUTDOWN; in xhci_setup_device()
4086 if (!udev->slot_id) { in xhci_setup_device()
4088 "Bad Slot ID %d", udev->slot_id); in xhci_setup_device()
4089 ret = -EINVAL; in xhci_setup_device()
4093 virt_dev = xhci->devs[udev->slot_id]; in xhci_setup_device()
4098 * a zero-dereference was observed once due to virt_dev = 0. in xhci_setup_device()
4102 udev->slot_id); in xhci_setup_device()
4103 ret = -EINVAL; in xhci_setup_device()
4106 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx); in xhci_setup_device()
4110 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) == in xhci_setup_device()
4119 ret = -ENOMEM; in xhci_setup_device()
4123 command->in_ctx = virt_dev->in_ctx; in xhci_setup_device()
4125 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx); in xhci_setup_device()
4126 ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx); in xhci_setup_device()
4130 ret = -EINVAL; in xhci_setup_device()
4134 * If this is the first Set Address since device plug-in or in xhci_setup_device()
4138 if (!slot_ctx->dev_info) in xhci_setup_device()
4143 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG); in xhci_setup_device()
4144 ctrl_ctx->drop_flags = 0; in xhci_setup_device()
4146 trace_xhci_address_ctx(xhci, virt_dev->in_ctx, in xhci_setup_device()
4147 le32_to_cpu(slot_ctx->dev_info) >> 27); in xhci_setup_device()
4150 spin_lock_irqsave(&xhci->lock, flags); in xhci_setup_device()
4152 ret = xhci_queue_address_device(xhci, command, virt_dev->in_ctx->dma, in xhci_setup_device()
4153 udev->slot_id, setup); in xhci_setup_device()
4155 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_setup_device()
4161 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_setup_device()
4164 wait_for_completion(command->completion); in xhci_setup_device()
4166 ret = xhci_vendor_sync_dev_ctx(xhci, udev->slot_id); in xhci_setup_device()
4177 switch (command->status) { in xhci_setup_device()
4181 ret = -ETIME; in xhci_setup_device()
4186 act, udev->slot_id); in xhci_setup_device()
4187 ret = -EINVAL; in xhci_setup_device()
4190 dev_warn(&udev->dev, "Device not responding to setup %s.\n", act); in xhci_setup_device()
4192 mutex_unlock(&xhci->mutex); in xhci_setup_device()
4193 ret = xhci_disable_slot(xhci, udev->slot_id); in xhci_setup_device()
4194 xhci_free_virt_device(xhci, udev->slot_id); in xhci_setup_device()
4197 kfree(command->completion); in xhci_setup_device()
4199 return -EPROTO; in xhci_setup_device()
4201 dev_warn(&udev->dev, in xhci_setup_device()
4203 ret = -ENODEV; in xhci_setup_device()
4212 act, command->status); in xhci_setup_device()
4213 trace_xhci_address_ctx(xhci, virt_dev->out_ctx, 1); in xhci_setup_device()
4214 ret = -EINVAL; in xhci_setup_device()
4219 temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr); in xhci_setup_device()
4224 udev->slot_id, in xhci_setup_device()
4225 &xhci->dcbaa->dev_context_ptrs[udev->slot_id], in xhci_setup_device()
4227 le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id])); in xhci_setup_device()
4230 (unsigned long long)virt_dev->out_ctx->dma); in xhci_setup_device()
4231 trace_xhci_address_ctx(xhci, virt_dev->in_ctx, in xhci_setup_device()
4232 le32_to_cpu(slot_ctx->dev_info) >> 27); in xhci_setup_device()
4234 * USB core uses address 1 for the roothubs, so we add one to the in xhci_setup_device()
4237 trace_xhci_address_ctx(xhci, virt_dev->out_ctx, in xhci_setup_device()
4238 le32_to_cpu(slot_ctx->dev_info) >> 27); in xhci_setup_device()
4240 ctrl_ctx->add_flags = 0; in xhci_setup_device()
4241 ctrl_ctx->drop_flags = 0; in xhci_setup_device()
4242 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx); in xhci_setup_device()
4243 udev->devaddr = (u8)(le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK); in xhci_setup_device()
4247 le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK); in xhci_setup_device()
4249 mutex_unlock(&xhci->mutex); in xhci_setup_device()
4251 kfree(command->completion); in xhci_setup_device()
4272 * to get the real index. The raw port number bases 1.
4279 return rhub->ports[port1 - 1]->hw_portnum + 1; in xhci_find_raw_port_number()
4296 spin_lock_irqsave(&xhci->lock, flags); in xhci_change_max_exit_latency()
4298 virt_dev = xhci->devs[udev->slot_id]; in xhci_change_max_exit_latency()
4302 * xHC was re-initialized. Exit latency will be set later after in xhci_change_max_exit_latency()
4303 * hub_port_finish_reset() is done and xhci->devs[] are re-allocated in xhci_change_max_exit_latency()
4306 if (!virt_dev || max_exit_latency == virt_dev->current_mel) { in xhci_change_max_exit_latency()
4307 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_change_max_exit_latency()
4312 command = xhci->lpm_command; in xhci_change_max_exit_latency()
4313 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx); in xhci_change_max_exit_latency()
4315 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_change_max_exit_latency()
4318 return -ENOMEM; in xhci_change_max_exit_latency()
4321 ret = xhci_vendor_sync_dev_ctx(xhci, udev->slot_id); in xhci_change_max_exit_latency()
4323 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_change_max_exit_latency()
4329 xhci_slot_copy(xhci, command->in_ctx, virt_dev->out_ctx); in xhci_change_max_exit_latency()
4330 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_change_max_exit_latency()
4332 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG); in xhci_change_max_exit_latency()
4333 slot_ctx = xhci_get_slot_ctx(xhci, command->in_ctx); in xhci_change_max_exit_latency()
4334 slot_ctx->dev_info2 &= cpu_to_le32(~((u32) MAX_EXIT)); in xhci_change_max_exit_latency()
4335 slot_ctx->dev_info2 |= cpu_to_le32(max_exit_latency); in xhci_change_max_exit_latency()
4336 slot_ctx->dev_state = 0; in xhci_change_max_exit_latency()
4346 spin_lock_irqsave(&xhci->lock, flags); in xhci_change_max_exit_latency()
4347 virt_dev->current_mel = max_exit_latency; in xhci_change_max_exit_latency()
4348 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_change_max_exit_latency()
4355 return xhci->vendor_ops; in xhci_vendor_get_ops()
4363 if (ops && ops->sync_dev_ctx) in xhci_vendor_sync_dev_ctx()
4364 return ops->sync_dev_ctx(xhci, slot_id); in xhci_vendor_sync_dev_ctx()
4372 if (ops && ops->usb_offload_skip_urb) in xhci_vendor_usb_offload_skip_urb()
4373 return ops->usb_offload_skip_urb(xhci, urb); in xhci_vendor_usb_offload_skip_urb()
4391 u2del = HCS_U2_LATENCY(xhci->hcs_params3); in xhci_calculate_hird_besl()
4392 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes); in xhci_calculate_hird_besl()
4408 besl_host = (u2del - 51) / 75 + 1; in xhci_calculate_hird_besl()
4426 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes); in xhci_calculate_usb2_hw_lpm_params()
4429 l1 = udev->l1_params.timeout / 256; in xhci_calculate_usb2_hw_lpm_params()
4434 hirdm = 1; in xhci_calculate_usb2_hw_lpm_params()
4452 if (xhci->quirks & XHCI_HW_LPM_DISABLE) in xhci_set_usb2_hardware_lpm()
4453 return -EPERM; in xhci_set_usb2_hardware_lpm()
4455 if (hcd->speed >= HCD_USB3 || !xhci->hw_lpm_support || in xhci_set_usb2_hardware_lpm()
4456 !udev->lpm_capable) in xhci_set_usb2_hardware_lpm()
4457 return -EPERM; in xhci_set_usb2_hardware_lpm()
4459 if (!udev->parent || udev->parent->parent || in xhci_set_usb2_hardware_lpm()
4460 udev->descriptor.bDeviceClass == USB_CLASS_HUB) in xhci_set_usb2_hardware_lpm()
4461 return -EPERM; in xhci_set_usb2_hardware_lpm()
4463 if (udev->usb2_hw_lpm_capable != 1) in xhci_set_usb2_hardware_lpm()
4464 return -EPERM; in xhci_set_usb2_hardware_lpm()
4466 spin_lock_irqsave(&xhci->lock, flags); in xhci_set_usb2_hardware_lpm()
4468 ports = xhci->usb2_rhub.ports; in xhci_set_usb2_hardware_lpm()
4469 port_num = udev->portnum - 1; in xhci_set_usb2_hardware_lpm()
4470 pm_addr = ports[port_num]->addr + PORTPMSC; in xhci_set_usb2_hardware_lpm()
4472 hlpm_addr = ports[port_num]->addr + PORTHLPMC; in xhci_set_usb2_hardware_lpm()
4475 enable ? "enable" : "disable", port_num + 1); in xhci_set_usb2_hardware_lpm()
4479 if (udev->usb2_hw_lpm_besl_capable) { in xhci_set_usb2_hardware_lpm()
4484 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes); in xhci_set_usb2_hardware_lpm()
4489 hird = udev->l1_params.besl; in xhci_set_usb2_hardware_lpm()
4492 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_set_usb2_hardware_lpm()
4494 /* USB 3.0 code dedicate one xhci->lpm_command->in_ctx in xhci_set_usb2_hardware_lpm()
4496 * context commands. It is protected by hcd->bandwidth in xhci_set_usb2_hardware_lpm()
4501 mutex_lock(hcd->bandwidth_mutex); in xhci_set_usb2_hardware_lpm()
4504 mutex_unlock(hcd->bandwidth_mutex); in xhci_set_usb2_hardware_lpm()
4508 spin_lock_irqsave(&xhci->lock, flags); in xhci_set_usb2_hardware_lpm()
4519 pm_val |= PORT_HIRD(hird) | PORT_RWE | PORT_L1DS(udev->slot_id); in xhci_set_usb2_hardware_lpm()
4531 if (udev->usb2_hw_lpm_besl_capable) { in xhci_set_usb2_hardware_lpm()
4532 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_set_usb2_hardware_lpm()
4533 mutex_lock(hcd->bandwidth_mutex); in xhci_set_usb2_hardware_lpm()
4535 mutex_unlock(hcd->bandwidth_mutex); in xhci_set_usb2_hardware_lpm()
4536 readl_poll_timeout(ports[port_num]->addr, pm_val, in xhci_set_usb2_hardware_lpm()
4543 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_set_usb2_hardware_lpm()
4549 * Return 1 if capability is supported
4557 for (i = 0; i < xhci->num_ext_caps; i++) { in xhci_check_usb2_port_capability()
4558 if (xhci->ext_caps[i] & capability) { in xhci_check_usb2_port_capability()
4559 /* port offsets starts at 1 */ in xhci_check_usb2_port_capability()
4560 port_offset = XHCI_EXT_PORT_OFF(xhci->ext_caps[i]) - 1; in xhci_check_usb2_port_capability()
4561 port_count = XHCI_EXT_PORT_COUNT(xhci->ext_caps[i]); in xhci_check_usb2_port_capability()
4564 return 1; in xhci_check_usb2_port_capability()
4573 int portnum = udev->portnum - 1; in xhci_update_device()
4575 if (hcd->speed >= HCD_USB3 || !udev->lpm_capable) in xhci_update_device()
4578 /* we only support lpm for non-hub device connected to root hub yet */ in xhci_update_device()
4579 if (!udev->parent || udev->parent->parent || in xhci_update_device()
4580 udev->descriptor.bDeviceClass == USB_CLASS_HUB) in xhci_update_device()
4583 if (xhci->hw_lpm_support == 1 && in xhci_update_device()
4586 udev->usb2_hw_lpm_capable = 1; in xhci_update_device()
4587 udev->l1_params.timeout = XHCI_L1_TIMEOUT; in xhci_update_device()
4588 udev->l1_params.besl = XHCI_DEFAULT_BESL; in xhci_update_device()
4591 udev->usb2_hw_lpm_besl_capable = 1; in xhci_update_device()
4597 /*---------------------- USB 3.0 Link PM functions ------------------------*/
4599 /* Service interval in nanoseconds = 2^(bInterval - 1) * 125us * 1000ns / 1us */
4603 return (1ULL << (desc->bInterval - 1)) * 125 * 1000; in xhci_service_interval_to_ns()
4617 sel = DIV_ROUND_UP(udev->u1_params.sel, 1000); in xhci_get_timeout_no_hub_lpm()
4618 pel = DIV_ROUND_UP(udev->u1_params.pel, 1000); in xhci_get_timeout_no_hub_lpm()
4623 sel = DIV_ROUND_UP(udev->u2_params.sel, 1000); in xhci_get_timeout_no_hub_lpm()
4624 pel = DIV_ROUND_UP(udev->u2_params.pel, 1000); in xhci_get_timeout_no_hub_lpm()
4629 dev_warn(&udev->dev, "%s: Can't get timeout for non-U1 or U2 state.\n", in xhci_get_timeout_no_hub_lpm()
4638 dev_dbg(&udev->dev, "Device-initiated %s disabled " in xhci_get_timeout_no_hub_lpm()
4642 dev_dbg(&udev->dev, "Device-initiated %s disabled " in xhci_get_timeout_no_hub_lpm()
4649 * - For control endpoints, U1 system exit latency (SEL) * 3
4650 * - For bulk endpoints, U1 SEL * 5
4651 * - For interrupt endpoints:
4652 * - Notification EPs, U1 SEL * 3
4653 * - Periodic EPs, max(105% of bInterval, U1 SEL * 2)
4654 * - For isochronous endpoints, max(105% of bInterval, U1 SEL * 2)
4667 timeout_ns = udev->u1_params.sel * 3; in xhci_calculate_intel_u1_timeout()
4670 timeout_ns = udev->u1_params.sel * 5; in xhci_calculate_intel_u1_timeout()
4675 timeout_ns = udev->u1_params.sel * 3; in xhci_calculate_intel_u1_timeout()
4683 if (timeout_ns < udev->u1_params.sel * 2) in xhci_calculate_intel_u1_timeout()
4684 timeout_ns = udev->u1_params.sel * 2; in xhci_calculate_intel_u1_timeout()
4693 /* Returns the hub-encoded U1 timeout value. */
4702 if (xhci_service_interval_to_ns(desc) <= udev->u1_params.mel) { in xhci_calculate_u1_timeout()
4703 dev_dbg(&udev->dev, "Disable U1, ESIT shorter than exit latency\n"); in xhci_calculate_u1_timeout()
4708 if (xhci->quirks & XHCI_INTEL_HOST) in xhci_calculate_u1_timeout()
4711 timeout_ns = udev->u1_params.sel; in xhci_calculate_u1_timeout()
4713 /* The U1 timeout is encoded in 1us intervals. in xhci_calculate_u1_timeout()
4717 timeout_ns = 1; in xhci_calculate_u1_timeout()
4722 * USB 3.0 hub, we have to disable hub-initiated U1. in xhci_calculate_u1_timeout()
4726 dev_dbg(&udev->dev, "Hub-initiated U1 disabled " in xhci_calculate_u1_timeout()
4732 * - 10 ms (to avoid the bandwidth impact on the scheduler)
4733 * - largest bInterval of any active periodic endpoint (to avoid going
4735 * - the U2 Exit Latency of the device
4750 u2_del_ns = le16_to_cpu(udev->bos->ss_cap->bU2DevExitLat) * 1000ULL; in xhci_calculate_intel_u2_timeout()
4757 /* Returns the hub-encoded U2 timeout value. */
4766 if (xhci_service_interval_to_ns(desc) <= udev->u2_params.mel) { in xhci_calculate_u2_timeout()
4767 dev_dbg(&udev->dev, "Disable U2, ESIT shorter than exit latency\n"); in xhci_calculate_u2_timeout()
4772 if (xhci->quirks & XHCI_INTEL_HOST) in xhci_calculate_u2_timeout()
4775 timeout_ns = udev->u2_params.sel; in xhci_calculate_u2_timeout()
4780 * USB 3.0 hub, we have to disable hub-initiated U2. in xhci_calculate_u2_timeout()
4784 dev_dbg(&udev->dev, "Hub-initiated U2 disabled " in xhci_calculate_u2_timeout()
4814 /* If we found we can't enable hub-initiated LPM, and in xhci_update_timeout_for_endpoint()
4816 * device-initiated LPM as well, then we will disable LPM in xhci_update_timeout_for_endpoint()
4821 return -E2BIG; in xhci_update_timeout_for_endpoint()
4836 for (j = 0; j < alt->desc.bNumEndpoints; j++) { in xhci_update_timeout_for_interface()
4838 &alt->endpoint[j].desc, state, timeout)) in xhci_update_timeout_for_interface()
4839 return -E2BIG; in xhci_update_timeout_for_interface()
4855 for (parent = udev->parent, num_hubs = 0; parent->parent; in xhci_check_intel_tier_policy()
4856 parent = parent->parent) in xhci_check_intel_tier_policy()
4862 dev_dbg(&udev->dev, "Disabling U1 link state for device" in xhci_check_intel_tier_policy()
4863 " below second-tier hub.\n"); in xhci_check_intel_tier_policy()
4864 dev_dbg(&udev->dev, "Plug device into first-tier hub " in xhci_check_intel_tier_policy()
4866 return -E2BIG; in xhci_check_intel_tier_policy()
4873 if (xhci->quirks & XHCI_INTEL_HOST) in xhci_check_tier_policy()
4880 * If the tier check or timeout setting functions return with a non-zero exit
4898 dev_warn(&udev->dev, "Can't enable unknown link state %i\n", in xhci_calculate_lpm_timeout()
4909 if (xhci_update_timeout_for_endpoint(xhci, udev, &udev->ep0.desc, in xhci_calculate_lpm_timeout()
4913 config = udev->actconfig; in xhci_calculate_lpm_timeout()
4917 for (i = 0; i < config->desc.bNumInterfaces; i++) { in xhci_calculate_lpm_timeout()
4919 struct usb_interface *intf = config->interface[i]; in xhci_calculate_lpm_timeout()
4924 /* Check if any currently bound drivers want hub-initiated LPM in xhci_calculate_lpm_timeout()
4927 if (intf->dev.driver) { in xhci_calculate_lpm_timeout()
4928 driver = to_usb_driver(intf->dev.driver); in xhci_calculate_lpm_timeout()
4929 if (driver && driver->disable_hub_initiated_lpm) { in xhci_calculate_lpm_timeout()
4930 dev_dbg(&udev->dev, "Hub-initiated %s disabled at request of driver %s\n", in xhci_calculate_lpm_timeout()
4931 state_name, driver->name); in xhci_calculate_lpm_timeout()
4940 if (!intf->cur_altsetting) in xhci_calculate_lpm_timeout()
4944 intf->cur_altsetting, in xhci_calculate_lpm_timeout()
4976 if ((udev->u1_params.timeout != USB3_LPM_DISABLED && !disabling_u1) || in calculate_max_exit_latency()
4978 u1_mel_us = DIV_ROUND_UP(udev->u1_params.mel, 1000); in calculate_max_exit_latency()
4979 if ((udev->u2_params.timeout != USB3_LPM_DISABLED && !disabling_u2) || in calculate_max_exit_latency()
4981 u2_mel_us = DIV_ROUND_UP(udev->u2_params.mel, 1000); in calculate_max_exit_latency()
4989 dev_warn(&udev->dev, "Link PM max exit latency of %lluus " in calculate_max_exit_latency()
4991 return -E2BIG; in calculate_max_exit_latency()
4996 /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
5006 /* The LPM timeout values are pretty host-controller specific, so don't in xhci_enable_usb3_lpm_timeout()
5007 * enable hub-initiated timeouts unless the vendor has provided in xhci_enable_usb3_lpm_timeout()
5010 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) || in xhci_enable_usb3_lpm_timeout()
5011 !xhci->devs[udev->slot_id]) in xhci_enable_usb3_lpm_timeout()
5035 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) || in xhci_disable_usb3_lpm_timeout()
5036 !xhci->devs[udev->slot_id]) in xhci_disable_usb3_lpm_timeout()
5068 /*-------------------------------------------------------------------------*/
5086 if (!hdev->parent) in xhci_update_hub_device()
5089 vdev = xhci->devs[hdev->slot_id]; in xhci_update_hub_device()
5092 return -EINVAL; in xhci_update_hub_device()
5097 return -ENOMEM; in xhci_update_hub_device()
5099 ctrl_ctx = xhci_get_input_control_ctx(config_cmd->in_ctx); in xhci_update_hub_device()
5104 return -ENOMEM; in xhci_update_hub_device()
5107 spin_lock_irqsave(&xhci->lock, flags); in xhci_update_hub_device()
5108 if (hdev->speed == USB_SPEED_HIGH && in xhci_update_hub_device()
5112 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_update_hub_device()
5113 return -ENOMEM; in xhci_update_hub_device()
5116 ret = xhci_vendor_sync_dev_ctx(xhci, hdev->slot_id); in xhci_update_hub_device()
5121 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_update_hub_device()
5125 xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx); in xhci_update_hub_device()
5126 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG); in xhci_update_hub_device()
5127 slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx); in xhci_update_hub_device()
5128 slot_ctx->dev_info |= cpu_to_le32(DEV_HUB); in xhci_update_hub_device()
5131 * but it may be already set to 1 when setup an xHCI virtual in xhci_update_hub_device()
5134 if (tt->multi) in xhci_update_hub_device()
5135 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT); in xhci_update_hub_device()
5136 else if (hdev->speed == USB_SPEED_FULL) in xhci_update_hub_device()
5137 slot_ctx->dev_info &= cpu_to_le32(~DEV_MTT); in xhci_update_hub_device()
5139 if (xhci->hci_version > 0x95) { in xhci_update_hub_device()
5142 (unsigned int) xhci->hci_version); in xhci_update_hub_device()
5143 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild)); in xhci_update_hub_device()
5144 /* Set TT think time - convert from ns to FS bit times. in xhci_update_hub_device()
5145 * 0 = 8 FS bit times, 1 = 16 FS bit times, in xhci_update_hub_device()
5149 * High-spped hub. in xhci_update_hub_device()
5151 think_time = tt->think_time; in xhci_update_hub_device()
5153 think_time = (think_time / 666) - 1; in xhci_update_hub_device()
5154 if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH) in xhci_update_hub_device()
5155 slot_ctx->tt_info |= in xhci_update_hub_device()
5160 (unsigned int) xhci->hci_version); in xhci_update_hub_device()
5162 slot_ctx->dev_state = 0; in xhci_update_hub_device()
5163 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_update_hub_device()
5166 (xhci->hci_version > 0x95) ? in xhci_update_hub_device()
5172 if (xhci->hci_version > 0x95) in xhci_update_hub_device()
5187 return readl(&xhci->run_regs->microframe_index) >> 3; in xhci_get_frame()
5197 struct device *dev = hcd->self.sysdev; in xhci_gen_setup()
5201 /* Accept arbitrarily long scatter-gather lists */ in xhci_gen_setup()
5202 hcd->self.sg_tablesize = ~0; in xhci_gen_setup()
5205 hcd->self.no_sg_constraint = 1; in xhci_gen_setup()
5208 hcd->self.no_stop_on_short = 1; in xhci_gen_setup()
5213 xhci->main_hcd = hcd; in xhci_gen_setup()
5214 xhci->usb2_rhub.hcd = hcd; in xhci_gen_setup()
5218 hcd->speed = HCD_USB2; in xhci_gen_setup()
5219 hcd->self.root_hub->speed = USB_SPEED_HIGH; in xhci_gen_setup()
5225 hcd->has_tt = 1; in xhci_gen_setup()
5230 * is a two digit BCD containig minor and sub-minor numbers. in xhci_gen_setup()
5236 if (xhci->usb3_rhub.min_rev == 0x1) in xhci_gen_setup()
5237 minor_rev = 1; in xhci_gen_setup()
5239 minor_rev = xhci->usb3_rhub.min_rev / 0x10; in xhci_gen_setup()
5243 hcd->speed = HCD_USB32; in xhci_gen_setup()
5244 hcd->self.root_hub->speed = USB_SPEED_SUPER_PLUS; in xhci_gen_setup()
5245 hcd->self.root_hub->rx_lanes = 2; in xhci_gen_setup()
5246 hcd->self.root_hub->tx_lanes = 2; in xhci_gen_setup()
5248 case 1: in xhci_gen_setup()
5249 hcd->speed = HCD_USB31; in xhci_gen_setup()
5250 hcd->self.root_hub->speed = USB_SPEED_SUPER_PLUS; in xhci_gen_setup()
5257 xhci->usb3_rhub.hcd = hcd; in xhci_gen_setup()
5264 mutex_init(&xhci->mutex); in xhci_gen_setup()
5265 xhci->cap_regs = hcd->regs; in xhci_gen_setup()
5266 xhci->op_regs = hcd->regs + in xhci_gen_setup()
5267 HC_LENGTH(readl(&xhci->cap_regs->hc_capbase)); in xhci_gen_setup()
5268 xhci->run_regs = hcd->regs + in xhci_gen_setup()
5269 (readl(&xhci->cap_regs->run_regs_off) & RTSOFF_MASK); in xhci_gen_setup()
5270 /* Cache read-only capability registers */ in xhci_gen_setup()
5271 xhci->hcs_params1 = readl(&xhci->cap_regs->hcs_params1); in xhci_gen_setup()
5272 xhci->hcs_params2 = readl(&xhci->cap_regs->hcs_params2); in xhci_gen_setup()
5273 xhci->hcs_params3 = readl(&xhci->cap_regs->hcs_params3); in xhci_gen_setup()
5274 xhci->hcc_params = readl(&xhci->cap_regs->hc_capbase); in xhci_gen_setup()
5275 xhci->hci_version = HC_VERSION(xhci->hcc_params); in xhci_gen_setup()
5276 xhci->hcc_params = readl(&xhci->cap_regs->hcc_params); in xhci_gen_setup()
5277 if (xhci->hci_version > 0x100) in xhci_gen_setup()
5278 xhci->hcc_params2 = readl(&xhci->cap_regs->hcc_params2); in xhci_gen_setup()
5280 xhci->quirks |= quirks; in xhci_gen_setup()
5288 if (xhci->hci_version > 0x96) in xhci_gen_setup()
5289 xhci->quirks |= XHCI_SPURIOUS_SUCCESS; in xhci_gen_setup()
5306 * On some xHCI controllers (e.g. R-Car SoCs), the AC64 bit (bit 0) in xhci_gen_setup()
5307 * of HCCPARAMS1 is set to 1. However, the xHCs don't support 64-bit in xhci_gen_setup()
5309 * bit of xhci->hcc_params to call dma_set_coherent_mask(dev, in xhci_gen_setup()
5312 if (xhci->quirks & XHCI_NO_64BIT_SUPPORT) in xhci_gen_setup()
5313 xhci->hcc_params &= ~BIT(0); in xhci_gen_setup()
5315 /* Set dma_mask and coherent_dma_mask to 64-bits, in xhci_gen_setup()
5316 * if xHC supports 64-bit addressing */ in xhci_gen_setup()
5317 if (HCC_64BIT_ADDR(xhci->hcc_params) && in xhci_gen_setup()
5319 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n"); in xhci_gen_setup()
5323 * This is to avoid error in cases where a 32-bit USB in xhci_gen_setup()
5324 * controller is used on a 64-bit capable system. in xhci_gen_setup()
5329 xhci_dbg(xhci, "Enabling 32-bit DMA addresses.\n"); in xhci_gen_setup()
5341 xhci->hcc_params, xhci->hci_version, xhci->quirks); in xhci_gen_setup()
5358 spin_lock_irqsave(&xhci->lock, flags); in xhci_clear_tt_buffer_complete()
5359 udev = (struct usb_device *)ep->hcpriv; in xhci_clear_tt_buffer_complete()
5360 slot_id = udev->slot_id; in xhci_clear_tt_buffer_complete()
5361 ep_index = xhci_get_endpoint_index(&ep->desc); in xhci_clear_tt_buffer_complete()
5363 xhci->devs[slot_id]->eps[ep_index].ep_state &= ~EP_CLEARING_TT; in xhci_clear_tt_buffer_complete()
5365 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_clear_tt_buffer_complete()
5369 .description = "xhci-hcd",
5443 drv->hcd_priv_size += over->extra_priv_size; in xhci_init_driver()
5444 if (over->reset) in xhci_init_driver()
5445 drv->reset = over->reset; in xhci_init_driver()
5446 if (over->start) in xhci_init_driver()
5447 drv->start = over->start; in xhci_init_driver()
5448 if (over->add_endpoint) in xhci_init_driver()
5449 drv->add_endpoint = over->add_endpoint; in xhci_init_driver()
5450 if (over->drop_endpoint) in xhci_init_driver()
5451 drv->drop_endpoint = over->drop_endpoint; in xhci_init_driver()
5452 if (over->check_bandwidth) in xhci_init_driver()
5453 drv->check_bandwidth = over->check_bandwidth; in xhci_init_driver()
5454 if (over->reset_bandwidth) in xhci_init_driver()
5455 drv->reset_bandwidth = over->reset_bandwidth; in xhci_init_driver()
5456 if (over->address_device) in xhci_init_driver()
5457 drv->address_device = over->address_device; in xhci_init_driver()
5458 if (over->bus_suspend) in xhci_init_driver()
5459 drv->bus_suspend = over->bus_suspend; in xhci_init_driver()
5460 if (over->bus_resume) in xhci_init_driver()
5461 drv->bus_resume = over->bus_resume; in xhci_init_driver()
5491 return -ENODEV; in xhci_hcd_init()