183 	void __iomem *regbase;  member
202 	writel_relaxed(SFC_RCVR_RESET, sfc->regbase + SFC_RCVR);  in rockchip_sfc_reset()
204 	err = readl_poll_timeout(sfc->regbase + SFC_RCVR, status,  in rockchip_sfc_reset()
211 	writel_relaxed(0xFFFFFFFF, sfc->regbase + SFC_ICLR);  in rockchip_sfc_reset()
220 	return  (u16)(readl(sfc->regbase + SFC_VER) & 0xffff);  in rockchip_sfc_get_version()
253 	writel(val, sfc->regbase + SFC_DLL_CTRL0);  in rockchip_sfc_set_delay_lines()
261 	reg = readl(sfc->regbase + SFC_IMR);  in rockchip_sfc_irq_unmask()
263 	writel(reg, sfc->regbase + SFC_IMR);  in rockchip_sfc_irq_unmask()
271 	reg = readl(sfc->regbase + SFC_IMR);  in rockchip_sfc_irq_mask()
273 	writel(reg, sfc->regbase + SFC_IMR);  in rockchip_sfc_irq_mask()
278 	writel(0, sfc->regbase + SFC_CTRL);  in rockchip_sfc_init()
279 	writel(0xFFFFFFFF, sfc->regbase + SFC_ICLR);  in rockchip_sfc_init()
282 		writel(SFC_LEN_CTRL_TRB_SEL, sfc->regbase + SFC_LEN_CTRL);  in rockchip_sfc_init()
292 	ret = readl_poll_timeout(sfc->regbase + SFC_FSR, status,  in rockchip_sfc_wait_txfifo_ready()
309 	ret = readl_poll_timeout(sfc->regbase + SFC_FSR, status,  in rockchip_sfc_wait_rxfifo_ready()
355 			writel(op->addr.nbytes * 8 - 1, sfc->regbase + SFC_ABIT);  in rockchip_sfc_xfer_setup()
373 		writel(len, sfc->regbase + SFC_LEN_EXT);  in rockchip_sfc_xfer_setup()
395 	writel(ctrl, sfc->regbase + SFC_CTRL);  in rockchip_sfc_xfer_setup()
396 	writel(cmd, sfc->regbase + SFC_CMD);  in rockchip_sfc_xfer_setup()
398 		writel(op->addr.val, sfc->regbase + SFC_ADDR);  in rockchip_sfc_xfer_setup()
417 		iowrite32_rep(sfc->regbase + SFC_DATA, buf, write_words);  in rockchip_sfc_write_fifo()
428 		writel(tmp, sfc->regbase + SFC_DATA);  in rockchip_sfc_write_fifo()
449 		ioread32_rep(sfc->regbase + SFC_DATA, buf, read_words);  in rockchip_sfc_read_fifo()
459 		tmp = readl(sfc->regbase + SFC_DATA);  in rockchip_sfc_read_fifo()
468 	writel(0xFFFFFFFF, sfc->regbase + SFC_ICLR);  in rockchip_sfc_fifo_transfer_dma()
469 	writel((u32)dma_buf, sfc->regbase + SFC_DMA_ADDR);  in rockchip_sfc_fifo_transfer_dma()
470 	writel(SFC_DMA_TRIGGER_START, sfc->regbase + SFC_DMA_TRIGGER);  in rockchip_sfc_fifo_transfer_dma()
517 	ret = readl_poll_timeout(sfc->regbase + SFC_SR, status,  in rockchip_sfc_xfer_done()
523 	ret = readl_poll_timeout(sfc->regbase + SFC_SR, status,  in rockchip_sfc_xfer_done()
704 	reg = readl(sfc->regbase + SFC_RISR);  in rockchip_sfc_irq_handler()
707 	writel_relaxed(reg, sfc->regbase + SFC_ICLR);  in rockchip_sfc_irq_handler()
741 	sfc->regbase = devm_ioremap_resource(dev, res);  in rockchip_sfc_probe()
742 	if (IS_ERR(sfc->regbase))  in rockchip_sfc_probe()
743 		return PTR_ERR(sfc->regbase);  in rockchip_sfc_probe()
816 		if (readl_poll_timeout(sfc->regbase + SFC_SR, status,  in rockchip_sfc_probe()