Lines Matching +full:offset +full:- +full:x
1 // SPDX-License-Identifier: GPL-2.0
7 * Author: Weixin Zhou <zwx@rock-chips.com>
9 * Based on the pinctrl-rk805/pinctrl-rockchip driver
21 #include <linux/pinctrl/pinconf-generic.h>
33 #include "pinctrl-utils.h"
78 .name = "rk628-"#fname, \
401 PINCTRL_BANK("rk628-gpio0", GPIO0_BASE, 12),
402 PINCTRL_BANK("rk628-gpio1", GPIO1_BASE, 14),
403 PINCTRL_BANK("rk628-gpio2", GPIO2_BASE, 24),
404 PINCTRL_BANK("rk628-gpio3", GPIO3_BASE, 13),
408 static int rk628_gpio_get(struct gpio_chip *chip, unsigned int offset) in rk628_gpio_get() argument
411 struct rk628_pctrl_info *pci = bank->pci; in rk628_gpio_get()
414 data_reg = bank->reg_base + GPIO_EXT_PORT; in rk628_gpio_get()
416 clk_enable(bank->clk); in rk628_gpio_get()
417 ret = regmap_read(pci->regmap, data_reg, &val); in rk628_gpio_get()
419 dev_err(pci->dev, "%s: regmap read failed!\n", __func__); in rk628_gpio_get()
420 clk_disable(bank->clk); in rk628_gpio_get()
422 val >>= offset; in rk628_gpio_get()
424 dev_dbg(pci->dev, "%s bank->name=%s dir_reg=0x%x offset=%x value=%x\n", in rk628_gpio_get()
425 __func__, bank->name, data_reg, offset, val); in rk628_gpio_get()
431 unsigned int offset, in rk628_gpio_set() argument
435 struct rk628_pctrl_info *pci = bank->pci; in rk628_gpio_set()
438 if (offset / 16) { in rk628_gpio_set()
439 data_reg = bank->reg_base + GPIO_SWPORT_DR_H; in rk628_gpio_set()
440 offset -= 16; in rk628_gpio_set()
442 data_reg = bank->reg_base + GPIO_SWPORT_DR_L; in rk628_gpio_set()
445 val = BIT(offset + 16) | BIT(offset); in rk628_gpio_set()
447 val = BIT(offset + 16) | (0xffff & ~BIT(offset)); in rk628_gpio_set()
449 clk_enable(bank->clk); in rk628_gpio_set()
450 ret = regmap_write(pci->regmap, data_reg, val); in rk628_gpio_set()
452 pr_err("%s: regmap write failed! bank->name=%s data_reg=0x%x offset=%d\n", in rk628_gpio_set()
453 __func__, bank->name, data_reg, offset); in rk628_gpio_set()
454 clk_disable(bank->clk); in rk628_gpio_set()
458 unsigned int offset) in rk628_gpio_direction_input() argument
460 return pinctrl_gpio_direction_input(chip->base + offset); in rk628_gpio_direction_input()
464 unsigned int offset, in rk628_gpio_direction_output() argument
467 rk628_gpio_set(chip, offset, value); in rk628_gpio_direction_output()
468 return pinctrl_gpio_direction_output(chip->base + offset); in rk628_gpio_direction_output()
471 static int rk628_gpio_get_direction(struct gpio_chip *chip, unsigned int offset) in rk628_gpio_get_direction() argument
474 struct rk628_pctrl_info *pci = bank->pci; in rk628_gpio_get_direction()
477 if (offset / 16) { in rk628_gpio_get_direction()
478 dir_reg = bank->reg_base + GPIO_SWPORT_DDR_H; in rk628_gpio_get_direction()
479 offset -= 16; in rk628_gpio_get_direction()
481 dir_reg = bank->reg_base + GPIO_SWPORT_DDR_L; in rk628_gpio_get_direction()
484 clk_enable(bank->clk); in rk628_gpio_get_direction()
485 ret = regmap_read(pci->regmap, dir_reg, &val); in rk628_gpio_get_direction()
487 dev_err(pci->dev, "%s: regmap read failed!\n", __func__); in rk628_gpio_get_direction()
488 clk_disable(bank->clk); in rk628_gpio_get_direction()
490 val = BIT(offset) & val; in rk628_gpio_get_direction()
495 static int rk628_gpio_to_irq(struct gpio_chip *gc, unsigned offset) in rk628_gpio_to_irq() argument
500 if (!bank->domain) in rk628_gpio_to_irq()
501 return -ENXIO; in rk628_gpio_to_irq()
503 virq = irq_create_mapping(bank->domain, offset); in rk628_gpio_to_irq()
505 pr_err("map interruptr fail, bank->irq=%d\n", bank->irq); in rk628_gpio_to_irq()
507 return (virq) ? : -ENXIO; in rk628_gpio_to_irq()
511 .label = "rk628-gpio",
521 .base = -1,
530 return pci->num_groups; in rk628_pinctrl_get_groups_count()
538 return pci->groups[group].name; in rk628_pinctrl_get_group_name()
548 *pins = pci->groups[group].pins; in rk628_pinctrl_get_group_pins()
549 *num_pins = pci->groups[group].npins; in rk628_pinctrl_get_group_pins()
566 return pci->num_functions; in rk628_pinctrl_get_funcs_count()
574 return pci->functions[function].name; in rk628_pinctrl_get_func_name()
584 *groups = pci->functions[function].groups; in rk628_pinctrl_get_func_groups()
585 *num_groups = pci->functions[function].ngroups; in rk628_pinctrl_get_func_groups()
590 static int rk628_calc_mux_offset(struct rk628_pctrl_info *pci, int mux, int reg, int offset) in rk628_calc_mux_offset() argument
596 regmap_read(pci->grf_regmap, reg, &orig); in rk628_calc_mux_offset()
598 val = BIT(offset) | orig; in rk628_calc_mux_offset()
600 val = ~BIT(offset) & orig; in rk628_calc_mux_offset()
603 if (offset >= 4 && offset < 8) { in rk628_calc_mux_offset()
604 offset += offset - 4; in rk628_calc_mux_offset()
605 val = 0x3 << (offset + 16) | (mux ? BIT(offset) : 0); in rk628_calc_mux_offset()
606 } else if (offset > 7) { in rk628_calc_mux_offset()
607 offset += 4; in rk628_calc_mux_offset()
608 val = BIT(offset + 16) | (mux ? BIT(offset) : 0); in rk628_calc_mux_offset()
610 val = BIT(offset + 16) | (mux ? BIT(offset) : 0); in rk628_calc_mux_offset()
614 if (offset == 13) in rk628_calc_mux_offset()
615 offset++; in rk628_calc_mux_offset()
616 if (offset > 11) in rk628_calc_mux_offset()
617 val = 0x3 << (offset + 16) | (mux ? BIT(offset) : 0); in rk628_calc_mux_offset()
619 val = BIT(offset + 16) | (mux ? BIT(offset) : 0); in rk628_calc_mux_offset()
622 val = BIT(offset + 16) | (mux ? BIT(offset) : 0); in rk628_calc_mux_offset()
625 offset -= 16; in rk628_calc_mux_offset()
626 val = 0x3 << ((offset*2) + 16) | (mux ? BIT(offset*2) : 0); in rk628_calc_mux_offset()
629 if (offset > 11) in rk628_calc_mux_offset()
630 val = 0x3 << (offset + 16) | (mux ? BIT(offset) : 0); in rk628_calc_mux_offset()
632 val = BIT(offset + 16) | (mux ? BIT(offset) : 0); in rk628_calc_mux_offset()
647 int mux = pci->functions[func_selector].mux_option; in rk628_pinctrl_set_mux()
648 int offset = pci->groups[group_selector].pins[0] % BANK_OFFSET; in rk628_pinctrl_set_mux() local
649 int reg = pci->groups[group_selector].iomux_base; in rk628_pinctrl_set_mux()
651 dev_dbg(pci->dev, "functions[%d]:%s mux=%s\n", in rk628_pinctrl_set_mux()
652 func_selector, pci->functions[func_selector].name, in rk628_pinctrl_set_mux()
655 val = rk628_calc_mux_offset(pci, mux, reg, offset); in rk628_pinctrl_set_mux()
657 dev_dbg(pci->dev, "groups[%d]:%s pin-number=%d reg=0x%x write-val=0x%8x\n", in rk628_pinctrl_set_mux()
659 pci->groups[group_selector].name, in rk628_pinctrl_set_mux()
660 pci->groups[group_selector].pins[0], in rk628_pinctrl_set_mux()
663 ret = regmap_write(pci->grf_regmap, reg, val); in rk628_pinctrl_set_mux()
665 dev_err(pci->dev, "%s regmap write failed!\n", __func__); in rk628_pinctrl_set_mux()
672 unsigned int offset, bool input) in rk628_pmx_gpio_set_direction() argument
679 chip = range->gc; in rk628_pmx_gpio_set_direction()
681 pin_offset = offset - range->pin_base; in rk628_pmx_gpio_set_direction()
684 dir_reg = bank->reg_base + GPIO_SWPORT_DDR_H; in rk628_pmx_gpio_set_direction()
685 pin_offset -= 16; in rk628_pmx_gpio_set_direction()
687 dir_reg = bank->reg_base + GPIO_SWPORT_DDR_L; in rk628_pmx_gpio_set_direction()
694 clk_enable(bank->clk); in rk628_pmx_gpio_set_direction()
695 ret = regmap_write(pci->regmap, dir_reg, val); in rk628_pmx_gpio_set_direction()
697 dev_err(pci->dev, "regmap update failed!\n"); in rk628_pmx_gpio_set_direction()
698 clk_disable(bank->clk); in rk628_pmx_gpio_set_direction()
724 dev_err(pci->dev, "Properties not supported\n"); in rk628_pinconf_get()
725 return -ENOTSUPP; in rk628_pinconf_get()
737 /* gpio0b_sl(0-3) gpio1b_sl(0-3 -5) gpio3a_sl(4-7)*/ in rk628_set_slew_rate()
749 -1, -1, in rk628_set_slew_rate()
757 int val, ret, offset = 0xff; in rk628_set_slew_rate() local
762 offset = i; in rk628_set_slew_rate()
767 if (offset == 0xff) { in rk628_set_slew_rate()
768 dev_err(pci->dev, "pin%u don't support set slew rate\n", pin); in rk628_set_slew_rate()
769 return -EINVAL; in rk628_set_slew_rate()
773 val = BIT(offset + 16) | BIT(offset); in rk628_set_slew_rate()
775 val = BIT(offset + 16); in rk628_set_slew_rate()
777 dev_dbg(pci->dev, " offset=%d 0x%x\n", offset, val); in rk628_set_slew_rate()
779 ret = regmap_write(pci->grf_regmap, GRF_GPIO_SR_CON, val); in rk628_set_slew_rate()
781 dev_err(pci->dev, "%s:regmap write failed! pin%u\n", in rk628_set_slew_rate()
793 struct pinctrl_gpio_range *range = pinctrl_find_gpio_range_from_pin(pci->pctl, pin); in rk628_calc_pull_reg_and_value()
797 int offset = pin - range->pin_base; in rk628_calc_pull_reg_and_value() local
799 switch (range->id) { in rk628_calc_pull_reg_and_value()
802 dev_err(pci->dev, "pin%u don't support pull up!\n", in rk628_calc_pull_reg_and_value()
804 return -EINVAL; in rk628_calc_pull_reg_and_value()
807 if (offset == 2) { in rk628_calc_pull_reg_and_value()
808 dev_err(pci->dev, "pin%u don't support pull!\n", in rk628_calc_pull_reg_and_value()
810 return -EINVAL; in rk628_calc_pull_reg_and_value()
813 if (offset < valid_pinnum[range->id]) { in rk628_calc_pull_reg_and_value()
814 *val = 0x3 << (2 * offset + 16) | pull << (2 * offset); in rk628_calc_pull_reg_and_value()
816 dev_dbg(pci->dev, "pin%u reg=0x%8x val=0x%8x\n", in rk628_calc_pull_reg_and_value()
823 dev_err(pci->dev, "pin%u don't support pull up!\n", in rk628_calc_pull_reg_and_value()
825 return -EINVAL; in rk628_calc_pull_reg_and_value()
828 if (offset == 2) { in rk628_calc_pull_reg_and_value()
829 dev_err(pci->dev, "pin%u don't support pull!\n", in rk628_calc_pull_reg_and_value()
831 return -EINVAL; in rk628_calc_pull_reg_and_value()
834 if (offset < valid_pinnum[range->id]) { in rk628_calc_pull_reg_and_value()
835 *val = 0x3 << (2 * offset + 16) | pull << (2 * offset); in rk628_calc_pull_reg_and_value()
837 dev_dbg(pci->dev, "pin%u reg=0x%8x val=0x%8x\n", in rk628_calc_pull_reg_and_value()
848 if (offset < valid_pinnum[range->id]) { in rk628_calc_pull_reg_and_value()
849 *reg = gpio2_regs[offset / 8]; in rk628_calc_pull_reg_and_value()
850 offset = offset % 8; in rk628_calc_pull_reg_and_value()
851 *val = 0x3 << (2 * offset + 16) | pull << (2 * offset); in rk628_calc_pull_reg_and_value()
852 dev_dbg(pci->dev, "pin%u reg=0x%8x val=0x%8x\n", in rk628_calc_pull_reg_and_value()
858 if (pull == GPIO_PULL_UP && (offset == 2 || offset == 11 || offset == 12)) { in rk628_calc_pull_reg_and_value()
859 dev_err(pci->dev, "pin%u don't support pull up!\n", in rk628_calc_pull_reg_and_value()
861 return -EINVAL; in rk628_calc_pull_reg_and_value()
862 } else if (pull == GPIO_PULL_DOWN && (offset == 9 || offset == 10)) { in rk628_calc_pull_reg_and_value()
863 dev_err(pci->dev, "pin%u don't support pull down!\n", in rk628_calc_pull_reg_and_value()
865 return -EINVAL; in rk628_calc_pull_reg_and_value()
868 if (offset == 0 || offset == 1 || offset == 3 || offset == 8) { in rk628_calc_pull_reg_and_value()
875 if ((offset > 7 && offset < valid_pinnum[range->id]) || offset < 4) { in rk628_calc_pull_reg_and_value()
876 *reg = gpio3_regs[offset / 8]; in rk628_calc_pull_reg_and_value()
877 offset = offset % 8; in rk628_calc_pull_reg_and_value()
878 *val = 0x3 << (2 * offset + 16) | pull << (2 * offset); in rk628_calc_pull_reg_and_value()
879 dev_dbg(pci->dev, "pin%u reg=0x%8x val=0x%8x\n", in rk628_calc_pull_reg_and_value()
888 return -EINVAL; in rk628_calc_pull_reg_and_value()
897 struct pinctrl_gpio_range *range = pinctrl_find_gpio_range_from_pin(pci->pctl, pin); in rk628_calc_strength_reg_and_value()
914 int offset = pin - range->pin_base; in rk628_calc_strength_reg_and_value() local
916 switch (range->id) { in rk628_calc_strength_reg_and_value()
919 if (offset < valid_pinnum[range->id]) { in rk628_calc_strength_reg_and_value()
920 dev_err(pci->dev, "pin%u don't support driver strength settings!\n", in rk628_calc_strength_reg_and_value()
922 return -EINVAL; in rk628_calc_strength_reg_and_value()
925 offset -= valid_pinnum[range->id]; in rk628_calc_strength_reg_and_value()
927 *val = 0x3 << (2 * offset + 16) | strength << (2 * offset); in rk628_calc_strength_reg_and_value()
928 *reg = gpio_regs[range->id][0]; in rk628_calc_strength_reg_and_value()
929 dev_dbg(pci->dev, "pin%u reg=0x%8x val=0x%8x\n", in rk628_calc_strength_reg_and_value()
934 if (offset < valid_pinnum[range->id]) { in rk628_calc_strength_reg_and_value()
935 *reg = gpio_regs[range->id][offset / 4]; in rk628_calc_strength_reg_and_value()
936 offset = offset % 4; in rk628_calc_strength_reg_and_value()
937 *val = 0x7 << (4 * offset + 16) | strength << (4 * offset); in rk628_calc_strength_reg_and_value()
938 dev_dbg(pci->dev, "pin%u reg=0x%8x val=0x%8x\n", in rk628_calc_strength_reg_and_value()
947 return -EINVAL; in rk628_calc_strength_reg_and_value()
956 struct pinctrl_gpio_range *range = pinctrl_find_gpio_range_from_pin(pci->pctl, pin); in rk628_calc_schmitt_reg_and_value()
960 int offset = pin - range->pin_base; in rk628_calc_schmitt_reg_and_value() local
962 switch (range->id) { in rk628_calc_schmitt_reg_and_value()
967 if (offset < valid_pinnum[range->id]) { in rk628_calc_schmitt_reg_and_value()
968 *reg = gpio2_regs[offset / 8]; in rk628_calc_schmitt_reg_and_value()
969 offset = offset % 8; in rk628_calc_schmitt_reg_and_value()
970 *val = BIT(offset + 16) | enable << (offset); in rk628_calc_schmitt_reg_and_value()
971 dev_dbg(pci->dev, "pin%u reg=0x%8x val=0x%8x\n", in rk628_calc_schmitt_reg_and_value()
977 if (offset == 0 || offset == 1 || offset == 3 || offset == 8) { in rk628_calc_schmitt_reg_and_value()
979 *val = BIT(offset + 16) | enable << (offset); in rk628_calc_schmitt_reg_and_value()
980 dev_dbg(pci->dev, "pin%u reg=0x%8x val=0x%8x\n", in rk628_calc_schmitt_reg_and_value()
989 dev_err(pci->dev, "pin%u don't support schmitt settings!\n", in rk628_calc_schmitt_reg_and_value()
992 return -ENOTSUPP; in rk628_calc_schmitt_reg_and_value()
1001 dev_err(pci->dev, "pin%u can not find reg or not support!\n", pin); in rk628_set_pull()
1005 ret = regmap_write(pci->grf_regmap, reg, val); in rk628_set_pull()
1008 dev_err(pci->dev, "%s:regmap write failed! pin%u\n", in rk628_set_pull()
1020 dev_err(pci->dev, "pin%u can not find reg or not support!\n", pin); in rk628_set_drive_perpin()
1024 ret = regmap_write(pci->grf_regmap, reg, val); in rk628_set_drive_perpin()
1027 dev_err(pci->dev, "%s:regmap write failed! pin%u\n", in rk628_set_drive_perpin()
1039 dev_err(pci->dev, "pin%u can not find reg or not support!\n", pin); in rk628_set_schmitt()
1043 ret = regmap_write(pci->grf_regmap, reg, val); in rk628_set_schmitt()
1046 dev_err(pci->dev, "%s:regmap write failed! pin%u\n", in rk628_set_schmitt()
1072 dev_err(pci->dev, in rk628_pinconf_set()
1089 struct pinctrl_gpio_range *range = pinctrl_find_gpio_range_from_pin(pci->pctl, pin); in rk628_pinconf_set()
1091 rk628_gpio_direction_output(range->gc, pin - range->pin_base, arg); in rk628_pinconf_set()
1095 dev_err(pci->dev, "Properties not supported param=%d\n", param); in rk628_pinconf_set()
1109 .name = "rk628-pinctrl",
1129 if (of_property_read_string(func_np, "function", &func->name)) in rk628_pinctrl_create_function()
1130 return -1; in rk628_pinctrl_create_function()
1132 func->mux_option = PINMUX_FUNC1; in rk628_pinctrl_create_function()
1135 if (!strcmp(func_sel[i], func->name)) in rk628_pinctrl_create_function()
1136 func->mux_option = PINMUX_FUNC0; in rk628_pinctrl_create_function()
1139 dev_dbg(dev, "%s func->name=%s\n", __func__, func->name); in rk628_pinctrl_create_function()
1142 dev_err(dev, "invalid pin list in %s node", func_np->name); in rk628_pinctrl_create_function()
1143 return -EINVAL; in rk628_pinctrl_create_function()
1146 func->groups = devm_kzalloc(dev, npins * sizeof(char *), GFP_KERNEL); in rk628_pinctrl_create_function()
1147 if (!func->groups) in rk628_pinctrl_create_function()
1148 return -ENOMEM; in rk628_pinctrl_create_function()
1158 i, func_np->name); in rk628_pinctrl_create_function()
1161 dev_dbg(dev, "%s func->groups[%d]=%s\n", __func__, i, gname); in rk628_pinctrl_create_function()
1163 func->groups[i] = gname; in rk628_pinctrl_create_function()
1166 func->ngroups = npins; in rk628_pinctrl_create_function()
1173 struct device_node *dev_np = dev->of_node; in rk628_pinctrl_parse_gpiobank()
1181 if (!of_find_property(cfg_np, "gpio-controller", NULL)) in rk628_pinctrl_parse_gpiobank()
1183 bank = pci->pin_banks; in rk628_pinctrl_parse_gpiobank()
1184 for (i = 0; i < pci->nr_banks; ++i, ++bank) { in rk628_pinctrl_parse_gpiobank()
1185 if (strcmp(bank->name, cfg_np->name)) in rk628_pinctrl_parse_gpiobank()
1187 bank->of_node = cfg_np; in rk628_pinctrl_parse_gpiobank()
1189 bank->clk = devm_get_clk_from_child(dev, in rk628_pinctrl_parse_gpiobank()
1190 bank->of_node, in rk628_pinctrl_parse_gpiobank()
1192 if (IS_ERR(bank->clk)) in rk628_pinctrl_parse_gpiobank()
1193 return PTR_ERR(bank->clk); in rk628_pinctrl_parse_gpiobank()
1194 clk_prepare(bank->clk); in rk628_pinctrl_parse_gpiobank()
1197 if (count == pci->nr_banks) in rk628_pinctrl_parse_gpiobank()
1210 struct device_node *dev_np = dev->of_node; in rk628_pinctrl_create_functions()
1238 func_cnt, func_cnt - 1); in rk628_pinctrl_create_functions()
1242 return ERR_PTR(-ENOMEM); in rk628_pinctrl_create_functions()
1270 func->mux_option = PINMUX_FUNC0; in rk628_pinctrl_create_functions()
1272 dev_dbg(dev, "count %d is for %s function\n", func_cnt, func->name); in rk628_pinctrl_create_functions()
1282 struct device *dev = &pdev->dev; in rk628_pinctrl_parse_dt()
1297 pci->functions = functions; in rk628_pinctrl_parse_dt()
1298 pci->num_functions = func_cnt; in rk628_pinctrl_parse_dt()
1328 unsigned long hwirq = d->hwirq; in rk628_irq_enable()
1329 u32 offset; in rk628_irq_enable() local
1332 hwirq = hwirq - 16; in rk628_irq_enable()
1333 offset = GPIO_REG_HIGH; in rk628_irq_enable()
1335 offset = GPIO_REG_LOW; in rk628_irq_enable()
1338 bank->mask_regs[offset] |= BIT(hwirq); in rk628_irq_enable()
1344 unsigned long hwirq = d->hwirq; in rk628_irq_disable()
1345 u32 offset; in rk628_irq_disable() local
1348 hwirq = hwirq - 16; in rk628_irq_disable()
1349 offset = GPIO_REG_HIGH; in rk628_irq_disable()
1351 offset = GPIO_REG_LOW; in rk628_irq_disable()
1354 bank->mask_regs[offset] &= ~BIT(hwirq); in rk628_irq_disable()
1360 struct rk628_pctrl_info *pci = bank->pci; in rk628_irq_set_type()
1361 unsigned long hwirq = d->hwirq; in rk628_irq_set_type()
1362 u32 offset; in rk628_irq_set_type() local
1365 hwirq = hwirq - 16; in rk628_irq_set_type()
1366 offset = GPIO_REG_HIGH; in rk628_irq_set_type()
1368 offset = GPIO_REG_LOW; in rk628_irq_set_type()
1373 bank->bothedge_regs[offset] |= BIT(hwirq); in rk628_irq_set_type()
1376 bank->bothedge_regs[offset] &= ~BIT(hwirq); in rk628_irq_set_type()
1377 bank->level_regs[offset] |= BIT(hwirq); in rk628_irq_set_type()
1378 bank->polarity_regs[offset] |= BIT(hwirq); in rk628_irq_set_type()
1381 bank->bothedge_regs[offset] &= ~BIT(hwirq); in rk628_irq_set_type()
1382 bank->level_regs[offset] |= BIT(hwirq); in rk628_irq_set_type()
1383 bank->polarity_regs[offset] &= ~BIT(hwirq); in rk628_irq_set_type()
1386 bank->bothedge_regs[offset] &= ~BIT(hwirq); in rk628_irq_set_type()
1387 bank->level_regs[offset] &= ~BIT(hwirq); in rk628_irq_set_type()
1388 bank->polarity_regs[offset] |= BIT(hwirq); in rk628_irq_set_type()
1391 bank->bothedge_regs[offset] &= ~BIT(hwirq); in rk628_irq_set_type()
1392 bank->level_regs[offset] &= ~BIT(hwirq); in rk628_irq_set_type()
1393 bank->polarity_regs[offset] &= ~BIT(hwirq); in rk628_irq_set_type()
1396 dev_err(pci->dev, "irq type invalid!\n"); in rk628_irq_set_type()
1397 return -EINVAL; in rk628_irq_set_type()
1407 mutex_lock(&bank->lock); in rk628_irq_lock()
1408 clk_enable(bank->clk); in rk628_irq_lock()
1414 struct rk628_pctrl_info *pci = bank->pci; in rk628_irq_sync_unlock()
1416 unsigned long hwirq = d->hwirq; in rk628_irq_sync_unlock()
1417 u32 offset, inten, level, polarity, bothedge; in rk628_irq_sync_unlock() local
1420 hwirq = hwirq - 16; in rk628_irq_sync_unlock()
1421 offset = GPIO_REG_HIGH; in rk628_irq_sync_unlock()
1423 offset = GPIO_REG_LOW; in rk628_irq_sync_unlock()
1426 inten = (bank->reg_base + GPIO_INTEN_L + ((offset) * 4)); in rk628_irq_sync_unlock()
1427 level = (bank->reg_base + GPIO_INTTYPE_L + ((offset) * 4)); in rk628_irq_sync_unlock()
1428 polarity = (bank->reg_base + GPIO_INT_POLARITY_L + ((offset) * 4)); in rk628_irq_sync_unlock()
1429 bothedge = (bank->reg_base + GPIO_INT_BOTHEDGE_L + ((offset) * 4)); in rk628_irq_sync_unlock()
1431 ret = regmap_write(pci->regmap, level, in rk628_irq_sync_unlock()
1432 bank->level_regs[offset] | BIT(hwirq + 16)); in rk628_irq_sync_unlock()
1434 dev_err(pci->dev, "regmap read failed! reg=0x%x irq=%d\n", in rk628_irq_sync_unlock()
1435 level, d->irq); in rk628_irq_sync_unlock()
1437 ret = regmap_write(pci->regmap, polarity, in rk628_irq_sync_unlock()
1438 bank->polarity_regs[offset] | BIT(hwirq + 16)); in rk628_irq_sync_unlock()
1440 dev_err(pci->dev, "regmap read failed! reg=0x%x irq=%d\n", in rk628_irq_sync_unlock()
1441 polarity, d->irq); in rk628_irq_sync_unlock()
1443 ret = regmap_write(pci->regmap, bothedge, in rk628_irq_sync_unlock()
1444 bank->bothedge_regs[offset] | BIT(hwirq + 16)); in rk628_irq_sync_unlock()
1446 dev_err(pci->dev, "regmap read failed! reg=0x%x irq=%d\n", in rk628_irq_sync_unlock()
1447 bothedge, d->irq); in rk628_irq_sync_unlock()
1449 ret = regmap_write(pci->regmap, inten, in rk628_irq_sync_unlock()
1450 bank->mask_regs[offset] | BIT(hwirq + 16)); in rk628_irq_sync_unlock()
1452 dev_err(pci->dev, "regmap read failed! reg=0x%x irq=%d\n", in rk628_irq_sync_unlock()
1453 inten, d->irq); in rk628_irq_sync_unlock()
1455 clk_disable(bank->clk); in rk628_irq_sync_unlock()
1456 mutex_unlock(&bank->lock); in rk628_irq_sync_unlock()
1476 struct rk628_pin_bank *bank = h->host_data; in rk628_irq_map()
1479 irq_set_chip(virq, &bank->irq_chip); in rk628_irq_map()
1494 struct rk628_pctrl_info *pci = bank->pci; in rk628_irq_demux_thread()
1498 clk_enable(bank->clk); in rk628_irq_demux_thread()
1500 ret = regmap_read(pci->regmap, bank->reg_base + GPIO_INT_STATUS, &pend); in rk628_irq_demux_thread()
1502 dev_err(pci->dev, "regmap read failed! line=%d\n", __LINE__); in rk628_irq_demux_thread()
1506 ret = regmap_write(pci->regmap, bank->reg_base + GPIO_PORTS_EOI_L, in rk628_irq_demux_thread()
1509 dev_err(pci->dev, "regmap read failed! line=%d\n", __LINE__); in rk628_irq_demux_thread()
1511 ret = regmap_write(pci->regmap, bank->reg_base + GPIO_PORTS_EOI_H, in rk628_irq_demux_thread()
1514 dev_err(pci->dev, "regmap read failed! line=%d\n", __LINE__); in rk628_irq_demux_thread()
1521 virq = irq_linear_revmap(bank->domain, irq); in rk628_irq_demux_thread()
1524 dev_err(pci->dev, "unmapped irq %d\n", irq); in rk628_irq_demux_thread()
1530 clk_disable(bank->clk); in rk628_irq_demux_thread()
1538 struct rk628_pin_bank *bank = pci->pin_banks; in rk628_interrupts_register()
1542 for (i = 0; i < pci->nr_banks; ++i, ++bank) { in rk628_interrupts_register()
1543 mutex_init(&bank->lock); in rk628_interrupts_register()
1544 ret = clk_enable(bank->clk); in rk628_interrupts_register()
1546 dev_err(&pdev->dev, "failed to enable clock for bank %s\n", in rk628_interrupts_register()
1547 bank->name); in rk628_interrupts_register()
1551 bank->irq = platform_get_irq(pdev, i); in rk628_interrupts_register()
1552 bank->irq_chip = rk628_irq_chip[i]; in rk628_interrupts_register()
1553 bank->domain = irq_domain_add_linear(bank->of_node, in rk628_interrupts_register()
1554 bank->nr_pins, in rk628_interrupts_register()
1557 if (!bank->domain) { in rk628_interrupts_register()
1558 dev_warn(&pdev->dev, in rk628_interrupts_register()
1560 bank->name); in rk628_interrupts_register()
1561 clk_disable(bank->clk); in rk628_interrupts_register()
1565 ret = request_threaded_irq(bank->irq, NULL, in rk628_interrupts_register()
1568 bank->name, bank); in rk628_interrupts_register()
1570 dev_err(&pdev->dev, in rk628_interrupts_register()
1572 bank->irq, bank->name, ret); in rk628_interrupts_register()
1575 clk_disable(bank->clk); in rk628_interrupts_register()
1584 struct rk628_pin_bank *bank = pci->pin_banks; in rk628_gpiolib_register()
1588 for (i = 0; i < pci->nr_banks; ++i, ++bank) { in rk628_gpiolib_register()
1589 bank->gpio_chip = rk628_gpiolib_chip; in rk628_gpiolib_register()
1590 bank->pci = pci; in rk628_gpiolib_register()
1591 gc = &bank->gpio_chip; in rk628_gpiolib_register()
1592 gc->base = -1; in rk628_gpiolib_register()
1593 gc->ngpio = bank->nr_pins; in rk628_gpiolib_register()
1594 gc->parent = &pdev->dev; in rk628_gpiolib_register()
1595 gc->of_node = bank->of_node; in rk628_gpiolib_register()
1596 gc->label = bank->name; in rk628_gpiolib_register()
1598 ret = devm_gpiochip_add_data(&pdev->dev, gc, bank); in rk628_gpiolib_register()
1600 dev_err(&pdev->dev, in rk628_gpiolib_register()
1602 gc->label, ret); in rk628_gpiolib_register()
1611 struct rk628 *rk628 = dev_get_drvdata(pdev->dev.parent); in rk628_pinctrl_probe()
1612 struct device *dev = &pdev->dev; in rk628_pinctrl_probe()
1618 pci = devm_kzalloc(&pdev->dev, sizeof(*pci), GFP_KERNEL); in rk628_pinctrl_probe()
1620 return -ENOMEM; in rk628_pinctrl_probe()
1622 pci->dev = &pdev->dev; in rk628_pinctrl_probe()
1623 pci->grf_regmap = rk628->grf; in rk628_pinctrl_probe()
1625 pci->pinctrl_desc = rk628_pinctrl_desc; in rk628_pinctrl_probe()
1626 pci->groups = rk628_pin_groups; in rk628_pinctrl_probe()
1627 pci->num_groups = ARRAY_SIZE(rk628_pin_groups); in rk628_pinctrl_probe()
1628 pci->pinctrl_desc.pins = rk628_pins_desc; in rk628_pinctrl_probe()
1629 pci->pinctrl_desc.npins = ARRAY_SIZE(rk628_pins_desc); in rk628_pinctrl_probe()
1630 pci->pin_banks = rk628_pin_banks; in rk628_pinctrl_probe()
1631 pci->nr_banks = ARRAY_SIZE(rk628_pin_banks), in rk628_pinctrl_probe()
1639 pci->regmap = devm_regmap_init_i2c(rk628->client, in rk628_pinctrl_probe()
1641 if (IS_ERR(pci->regmap)) { in rk628_pinctrl_probe()
1642 ret = PTR_ERR(pci->regmap); in rk628_pinctrl_probe()
1650 dev_err(&pdev->dev, "Couldn't add gpiochip\n"); in rk628_pinctrl_probe()
1655 pci->pctl = devm_pinctrl_register(&pdev->dev, &pci->pinctrl_desc, pci); in rk628_pinctrl_probe()
1656 if (IS_ERR(pci->pctl)) { in rk628_pinctrl_probe()
1657 dev_err(&pdev->dev, "Couldn't add pinctrl\n"); in rk628_pinctrl_probe()
1658 return PTR_ERR(pci->pctl); in rk628_pinctrl_probe()
1661 for (bank = 0; bank < pci->nr_banks; ++bank) { in rk628_pinctrl_probe()
1662 pin_bank = &pci->pin_banks[bank]; in rk628_pinctrl_probe()
1663 pin_bank->grange.name = pin_bank->name; in rk628_pinctrl_probe()
1664 pin_bank->grange.id = bank; in rk628_pinctrl_probe()
1665 pin_bank->grange.pin_base = BANK_OFFSET * bank; in rk628_pinctrl_probe()
1666 pin_bank->grange.base = pin_bank->gpio_chip.base; in rk628_pinctrl_probe()
1667 pin_bank->grange.npins = pin_bank->gpio_chip.ngpio; in rk628_pinctrl_probe()
1668 pin_bank->grange.gc = &pin_bank->gpio_chip; in rk628_pinctrl_probe()
1669 pinctrl_add_gpio_range(pci->pctl, &pin_bank->grange); in rk628_pinctrl_probe()
1678 { .compatible = "rockchip,rk628-pinctrl" },
1687 .name = "rk628-pinctrl",
1695 MODULE_AUTHOR("Weixin Zhou <zwx@rock-chips.com>");