105 	struct regmap *pma_regmap;  member
739 	regmap_read(udphy->pma_regmap, CMN_LANE_MUX_AND_EN_OFFSET, &value);  in udphy_get_initial_status()
1219 	udphy->pma_regmap = devm_regmap_init_mmio(dev, base + UDPHY_PMA,  in rockchip_udphy_probe()
1221 	if (IS_ERR(udphy->pma_regmap))  in rockchip_udphy_probe()
1222 		return PTR_ERR(udphy->pma_regmap);  in rockchip_udphy_probe()
1304 		ret = regmap_multi_reg_write(udphy->pma_regmap, rk3588_udphy_24m_refclk_cfg,  in rk3588_udphy_refclk_set()
1311 		ret = regmap_multi_reg_write(udphy->pma_regmap, rk3588_udphy_26m_refclk_cfg,  in rk3588_udphy_refclk_set()
1331 		ret = regmap_read_poll_timeout(udphy->pma_regmap, CMN_ANA_LCPLL_DONE_OFFSET,  in rk3588_udphy_status_check()
1342 			ret = regmap_read_poll_timeout(udphy->pma_regmap,  in rk3588_udphy_status_check()
1349 			ret = regmap_read_poll_timeout(udphy->pma_regmap,  in rk3588_udphy_status_check()
1377 	ret = regmap_multi_reg_write(udphy->pma_regmap, rk3588_udphy_init_sequence,  in rk3588_udphy_init()
1391 	regmap_update_bits(udphy->pma_regmap, CMN_LANE_MUX_AND_EN_OFFSET,  in rk3588_udphy_init()
1404 		regmap_update_bits(udphy->pma_regmap, CMN_DP_RSTN_OFFSET,  in rk3588_udphy_init()
1455 	regmap_update_bits(udphy->pma_regmap, CMN_LANE_MUX_AND_EN_OFFSET, CMN_DP_LANE_EN_ALL,  in rk3588_udphy_dplane_enable()
1459 		regmap_update_bits(udphy->pma_regmap, CMN_DP_RSTN_OFFSET,  in rk3588_udphy_dplane_enable()
1498 	regmap_update_bits(udphy->pma_regmap, CMN_DP_RSTN_OFFSET,  in rk3588_dp_phy_set_rate()
1518 	regmap_update_bits(udphy->pma_regmap, CMN_DP_LINK_OFFSET, CMN_DP_TX_LINK_BW,  in rk3588_dp_phy_set_rate()
1520 	regmap_update_bits(udphy->pma_regmap, CMN_SSC_EN_OFFSET, CMN_ROPLL_SSC_EN,  in rk3588_dp_phy_set_rate()
1522 	regmap_update_bits(udphy->pma_regmap, CMN_DP_RSTN_OFFSET, CMN_DP_CMN_RSTN,  in rk3588_dp_phy_set_rate()
1525 	ret = regmap_read_poll_timeout(udphy->pma_regmap, CMN_ANA_ROPLL_DONE_OFFSET, val,  in rk3588_dp_phy_set_rate()
1547 	regmap_write(udphy->pma_regmap, 0x0810 + offset, val);  in rk3588_dp_phy_set_voltage()
1550 	regmap_write(udphy->pma_regmap, 0x0814 + offset, val);  in rk3588_dp_phy_set_voltage()
1553 	regmap_write(udphy->pma_regmap, 0x0818 + offset, val);  in rk3588_dp_phy_set_voltage()
1556 	regmap_write(udphy->pma_regmap, 0x081c + offset, val);  in rk3588_dp_phy_set_voltage()
1569 			regmap_update_bits(udphy->pma_regmap, TRSV_ANA_TX_CLK_OFFSET_N(lane),  in rk3588_dp_phy_set_voltages()
1576 			regmap_update_bits(udphy->pma_regmap, TRSV_ANA_TX_CLK_OFFSET_N(lane),  in rk3588_dp_phy_set_voltages()