132 	u32 lane_mux_sel[4];  member
558 		udphy->lane_mux_sel[0] = PHY_LANE_MUX_DP;  in upphy_set_typec_default_mapping()
559 		udphy->lane_mux_sel[1] = PHY_LANE_MUX_DP;  in upphy_set_typec_default_mapping()
560 		udphy->lane_mux_sel[2] = PHY_LANE_MUX_USB;  in upphy_set_typec_default_mapping()
561 		udphy->lane_mux_sel[3] = PHY_LANE_MUX_USB;  in upphy_set_typec_default_mapping()
571 		udphy->lane_mux_sel[0] = PHY_LANE_MUX_USB;  in upphy_set_typec_default_mapping()
572 		udphy->lane_mux_sel[1] = PHY_LANE_MUX_USB;  in upphy_set_typec_default_mapping()
573 		udphy->lane_mux_sel[2] = PHY_LANE_MUX_DP;  in upphy_set_typec_default_mapping()
574 		udphy->lane_mux_sel[3] = PHY_LANE_MUX_DP;  in upphy_set_typec_default_mapping()
705 		udphy->lane_mux_sel[udphy->dp_lane_sel[i]] = PHY_LANE_MUX_DP;  in udphy_parse_lane_mux_data()
718 		udphy->flip = udphy->lane_mux_sel[0] == PHY_LANE_MUX_DP ? true : false;  in udphy_parse_lane_mux_data()
1081 		udphy->lane_mux_sel[0] = PHY_LANE_MUX_DP;  in usbdp_typec_mux_set()
1082 		udphy->lane_mux_sel[1] = PHY_LANE_MUX_DP;  in usbdp_typec_mux_set()
1083 		udphy->lane_mux_sel[2] = PHY_LANE_MUX_DP;  in usbdp_typec_mux_set()
1084 		udphy->lane_mux_sel[3] = PHY_LANE_MUX_DP;  in usbdp_typec_mux_set()
1091 			udphy->lane_mux_sel[0] = PHY_LANE_MUX_DP;  in usbdp_typec_mux_set()
1092 			udphy->lane_mux_sel[1] = PHY_LANE_MUX_DP;  in usbdp_typec_mux_set()
1093 			udphy->lane_mux_sel[2] = PHY_LANE_MUX_USB;  in usbdp_typec_mux_set()
1094 			udphy->lane_mux_sel[3] = PHY_LANE_MUX_USB;  in usbdp_typec_mux_set()
1096 			udphy->lane_mux_sel[0] = PHY_LANE_MUX_USB;  in usbdp_typec_mux_set()
1097 			udphy->lane_mux_sel[1] = PHY_LANE_MUX_USB;  in usbdp_typec_mux_set()
1098 			udphy->lane_mux_sel[2] = PHY_LANE_MUX_DP;  in usbdp_typec_mux_set()
1099 			udphy->lane_mux_sel[3] = PHY_LANE_MUX_DP;  in usbdp_typec_mux_set()
1393 			   FIELD_PREP(CMN_DP_LANE_MUX_N(3), udphy->lane_mux_sel[3]) |  in rk3588_udphy_init()
1394 			   FIELD_PREP(CMN_DP_LANE_MUX_N(2), udphy->lane_mux_sel[2]) |  in rk3588_udphy_init()
1395 			   FIELD_PREP(CMN_DP_LANE_MUX_N(1), udphy->lane_mux_sel[1]) |  in rk3588_udphy_init()
1396 			   FIELD_PREP(CMN_DP_LANE_MUX_N(0), udphy->lane_mux_sel[0]) |  in rk3588_udphy_init()
1572 					   udphy->lane_mux_sel[lane]));  in rk3588_dp_phy_set_voltages()