Lines Matching refs:cfg

395 	const struct rockchip_udphy_cfg *cfg = udphy->cfgs;  in udphy_reset_init()  local
398 udphy->rsts = devm_kcalloc(dev, cfg->num_rsts, in udphy_reset_init()
403 for (idx = 0; idx < cfg->num_rsts; idx++) { in udphy_reset_init()
405 const char *name = cfg->rst_list[idx]; in udphy_reset_init()
434 const struct rockchip_udphy_cfg *cfg = udphy->cfgs; in udphy_reset_assert() local
437 idx = udphy_get_rst_idx(cfg->rst_list, cfg->num_rsts, name); in udphy_reset_assert()
446 const struct rockchip_udphy_cfg *cfg = udphy->cfgs; in udphy_reset_deassert() local
449 idx = udphy_get_rst_idx(cfg->rst_list, cfg->num_rsts, name); in udphy_reset_deassert()
458 const struct rockchip_udphy_cfg *cfg = udphy->cfgs; in udphy_u3_port_disable() local
461 preg = udphy->id ? &cfg->grfcfg.usb3otg1_cfg : &cfg->grfcfg.usb3otg0_cfg; in udphy_u3_port_disable()
467 const struct rockchip_udphy_cfg *cfg = udphy->cfgs; in udphy_usb_bvalid_enable() local
469 grfreg_write(udphy->u2phygrf, &cfg->grfcfg.bvalid_phy_con, enable); in udphy_usb_bvalid_enable()
470 grfreg_write(udphy->u2phygrf, &cfg->grfcfg.bvalid_grf_con, enable); in udphy_usb_bvalid_enable()
511 const struct rockchip_udphy_cfg *cfg = udphy->cfgs; in udphy_dplane_select() local
513 if (cfg->dplane_select) in udphy_dplane_select()
514 return cfg->dplane_select(udphy); in udphy_dplane_select()
542 const struct rockchip_udphy_cfg *cfg = udphy->cfgs; in udphy_dplane_enable() local
545 if (cfg->dplane_enable) in udphy_dplane_enable()
546 ret = cfg->dplane_enable(udphy, dp_lanes); in udphy_dplane_enable()
637 const struct rockchip_udphy_cfg *cfg = udphy->cfgs; in udphy_setup() local
646 if (cfg->combophy_init) { in udphy_setup()
647 ret = cfg->combophy_init(udphy); in udphy_setup()
660 const struct rockchip_udphy_cfg *cfg = udphy->cfgs; in udphy_disable() local
665 for (i = 0; i < cfg->num_rsts; i++) in udphy_disable()
726 const struct rockchip_udphy_cfg *cfg = udphy->cfgs; in udphy_get_initial_status() local
736 for (i = 0; i < cfg->num_rsts; i++) in udphy_get_initial_status()
991 const struct rockchip_udphy_cfg *cfg = udphy->cfgs; in rockchip_dp_phy_configure() local
998 if (opts->dp.set_rate && cfg->dp_phy_set_rate) { in rockchip_dp_phy_configure()
999 ret = cfg->dp_phy_set_rate(udphy, &opts->dp); in rockchip_dp_phy_configure()
1007 if (opts->dp.set_voltages && cfg->dp_phy_set_voltages) { in rockchip_dp_phy_configure()
1008 ret = cfg->dp_phy_set_voltages(udphy, &opts->dp); in rockchip_dp_phy_configure()
1072 const struct rockchip_udphy_cfg *cfg = udphy->cfgs; in usbdp_typec_mux_set() local
1109 if (cfg->hpd_event_trigger) in usbdp_typec_mux_set()
1110 cfg->hpd_event_trigger(udphy, false); in usbdp_typec_mux_set()
1112 if (cfg->hpd_event_trigger) { in usbdp_typec_mux_set()
1113 cfg->hpd_event_trigger(udphy, false); in usbdp_typec_mux_set()
1115 cfg->hpd_event_trigger(udphy, true); in usbdp_typec_mux_set()
1122 if (cfg->hpd_event_trigger) in usbdp_typec_mux_set()
1123 cfg->hpd_event_trigger(udphy, true); in usbdp_typec_mux_set()
1125 if (cfg->hpd_event_trigger) in usbdp_typec_mux_set()
1126 cfg->hpd_event_trigger(udphy, false); in usbdp_typec_mux_set()
1363 const struct rockchip_udphy_cfg *cfg = udphy->cfgs; in rk3588_udphy_init() local
1368 grfreg_write(udphy->udphygrf, &cfg->grfcfg.rx_lfps, true); in rk3588_udphy_init()
1371 grfreg_write(udphy->udphygrf, &cfg->grfcfg.low_pwrn, true); in rk3588_udphy_init()
1437 const struct rockchip_udphy_cfg *cfg = udphy->cfgs; in rk3588_udphy_hpd_event_trigger() local
1442 grfreg_write(udphy->vogrf, &cfg->vogrfcfg[udphy->id].hpd_trigger, hpd); in rk3588_udphy_hpd_event_trigger()
1542 const struct rockchip_udphy_cfg *cfg = udphy->cfgs; in rk3588_dp_phy_set_voltage() local
1545 dp_ctrl = udphy->mux ? cfg->dp_tx_ctrl_cfg_typec[bw] : cfg->dp_tx_ctrl_cfg[bw]; in rk3588_dp_phy_set_voltage()
1591 const struct rockchip_udphy_cfg *cfg = udphy->cfgs; in udphy_resume() local
1594 cfg->hpd_event_trigger(udphy, udphy->dp_sink_hpd_cfg); in udphy_resume()