Lines Matching refs:cfg
89 const struct rockchip_combphy_cfg *cfg; member
122 const struct rockchip_combphy_grfcfg *cfg = priv->cfg->grfcfg; in rockchip_combphy_is_ready() local
125 mask = GENMASK(cfg->pipe_phy_status.bitend, in rockchip_combphy_is_ready()
126 cfg->pipe_phy_status.bitstart); in rockchip_combphy_is_ready()
128 regmap_read(priv->phy_grf, cfg->pipe_phy_status.offset, &val); in rockchip_combphy_is_ready()
129 val = (val & mask) >> cfg->pipe_phy_status.bitstart; in rockchip_combphy_is_ready()
139 if (priv->cfg->combphy_cfg) { in rockchip_combphy_pcie_init()
140 ret = priv->cfg->combphy_cfg(priv); in rockchip_combphy_pcie_init()
147 if (priv->cfg->force_det_out) { in rockchip_combphy_pcie_init()
158 const struct rockchip_combphy_cfg *phy_cfg = priv->cfg; in rockchip_combphy_usb3_init()
171 if (priv->cfg->combphy_cfg) { in rockchip_combphy_usb3_init()
172 ret = priv->cfg->combphy_cfg(priv); in rockchip_combphy_usb3_init()
186 if (priv->cfg->combphy_cfg) { in rockchip_combphy_sata_init()
187 ret = priv->cfg->combphy_cfg(priv); in rockchip_combphy_sata_init()
201 if (priv->cfg->combphy_cfg) { in rockchip_combphy_sgmii_init()
202 ret = priv->cfg->combphy_cfg(priv); in rockchip_combphy_sgmii_init()
238 const struct rockchip_combphy_grfcfg *cfg = priv->cfg->grfcfg; in rockchip_combphy_init() local
256 if (cfg->pipe_phy_grf_reset.enable) in rockchip_combphy_init()
257 param_write(priv->phy_grf, &cfg->pipe_phy_grf_reset, false); in rockchip_combphy_init()
262 val == cfg->pipe_phy_status.enable, in rockchip_combphy_init()
279 const struct rockchip_combphy_grfcfg *cfg = priv->cfg->grfcfg; in rockchip_combphy_exit() local
281 if (cfg->pipe_phy_grf_reset.enable) in rockchip_combphy_exit()
282 param_write(priv->phy_grf, &cfg->pipe_phy_grf_reset, true); in rockchip_combphy_exit()
318 const struct rockchip_combphy_cfg *phy_cfg = priv->cfg; in rockchip_combphy_parse_dt()
419 priv->cfg = phy_cfg; in rockchip_combphy_probe()
441 const struct rockchip_combphy_grfcfg *cfg = priv->cfg->grfcfg; in rk3528_combphy_cfg() local
468 param_write(priv->phy_grf, &cfg->con0_for_pcie, true); in rk3528_combphy_cfg()
469 param_write(priv->phy_grf, &cfg->con1_for_pcie, true); in rk3528_combphy_cfg()
470 param_write(priv->phy_grf, &cfg->con2_for_pcie, true); in rk3528_combphy_cfg()
471 param_write(priv->phy_grf, &cfg->con3_for_pcie, true); in rk3528_combphy_cfg()
492 param_write(priv->phy_grf, &cfg->pipe_txcomp_sel, false); in rk3528_combphy_cfg()
493 param_write(priv->phy_grf, &cfg->pipe_txelec_sel, false); in rk3528_combphy_cfg()
494 param_write(priv->phy_grf, &cfg->usb_mode_set, true); in rk3528_combphy_cfg()
505 param_write(priv->phy_grf, &cfg->pipe_clk_24m, true); in rk3528_combphy_cfg()
520 param_write(priv->phy_grf, &cfg->pipe_clk_100m, true); in rk3528_combphy_cfg()
578 const struct rockchip_combphy_grfcfg *cfg = priv->cfg->grfcfg; in rk3562_combphy_cfg() local
605 param_write(priv->phy_grf, &cfg->con0_for_pcie, true); in rk3562_combphy_cfg()
606 param_write(priv->phy_grf, &cfg->con1_for_pcie, true); in rk3562_combphy_cfg()
607 param_write(priv->phy_grf, &cfg->con2_for_pcie, true); in rk3562_combphy_cfg()
608 param_write(priv->phy_grf, &cfg->con3_for_pcie, true); in rk3562_combphy_cfg()
647 param_write(priv->phy_grf, &cfg->pipe_sel_usb, true); in rk3562_combphy_cfg()
648 param_write(priv->phy_grf, &cfg->pipe_txcomp_sel, false); in rk3562_combphy_cfg()
649 param_write(priv->phy_grf, &cfg->pipe_txelec_sel, false); in rk3562_combphy_cfg()
650 param_write(priv->phy_grf, &cfg->usb_mode_set, true); in rk3562_combphy_cfg()
675 param_write(priv->phy_grf, &cfg->pipe_clk_25m, true); in rk3562_combphy_cfg()
678 param_write(priv->phy_grf, &cfg->pipe_clk_100m, true); in rk3562_combphy_cfg()
710 param_write(priv->phy_grf, &cfg->pipe_clk_ext, true); in rk3562_combphy_cfg()
773 const struct rockchip_combphy_grfcfg *cfg = priv->cfg->grfcfg; in rk3568_combphy_cfg() local
800 param_write(priv->phy_grf, &cfg->con0_for_pcie, true); in rk3568_combphy_cfg()
801 param_write(priv->phy_grf, &cfg->con1_for_pcie, true); in rk3568_combphy_cfg()
802 param_write(priv->phy_grf, &cfg->con2_for_pcie, true); in rk3568_combphy_cfg()
803 param_write(priv->phy_grf, &cfg->con3_for_pcie, true); in rk3568_combphy_cfg()
842 param_write(priv->phy_grf, &cfg->pipe_sel_usb, true); in rk3568_combphy_cfg()
843 param_write(priv->phy_grf, &cfg->pipe_txcomp_sel, false); in rk3568_combphy_cfg()
844 param_write(priv->phy_grf, &cfg->pipe_txelec_sel, false); in rk3568_combphy_cfg()
845 param_write(priv->phy_grf, &cfg->usb_mode_set, true); in rk3568_combphy_cfg()
850 param_write(priv->phy_grf, &cfg->con0_for_sata, true); in rk3568_combphy_cfg()
851 param_write(priv->phy_grf, &cfg->con1_for_sata, true); in rk3568_combphy_cfg()
852 param_write(priv->phy_grf, &cfg->con2_for_sata, true); in rk3568_combphy_cfg()
853 param_write(priv->phy_grf, &cfg->con3_for_sata, true); in rk3568_combphy_cfg()
854 param_write(priv->pipe_grf, &cfg->pipe_con0_for_sata, true); in rk3568_combphy_cfg()
857 param_write(priv->pipe_grf, &cfg->pipe_xpcs_phy_ready, true); in rk3568_combphy_cfg()
858 param_write(priv->phy_grf, &cfg->pipe_phymode_sel, true); in rk3568_combphy_cfg()
859 param_write(priv->phy_grf, &cfg->pipe_sel_qsgmii, true); in rk3568_combphy_cfg()
860 param_write(priv->phy_grf, &cfg->sgmii_mode_set, true); in rk3568_combphy_cfg()
863 param_write(priv->pipe_grf, &cfg->pipe_xpcs_phy_ready, true); in rk3568_combphy_cfg()
864 param_write(priv->phy_grf, &cfg->pipe_phymode_sel, true); in rk3568_combphy_cfg()
865 param_write(priv->phy_grf, &cfg->pipe_rate_sel, true); in rk3568_combphy_cfg()
866 param_write(priv->phy_grf, &cfg->pipe_sel_qsgmii, true); in rk3568_combphy_cfg()
867 param_write(priv->phy_grf, &cfg->qsgmii_mode_set, true); in rk3568_combphy_cfg()
892 param_write(priv->phy_grf, &cfg->pipe_clk_25m, true); in rk3568_combphy_cfg()
895 param_write(priv->phy_grf, &cfg->pipe_clk_100m, true); in rk3568_combphy_cfg()
927 param_write(priv->phy_grf, &cfg->pipe_clk_ext, true); in rk3568_combphy_cfg()
1000 const struct rockchip_combphy_grfcfg *cfg = priv->cfg->grfcfg; in rk3588_combphy_cfg() local
1027 param_write(priv->phy_grf, &cfg->con0_for_pcie, true); in rk3588_combphy_cfg()
1028 param_write(priv->phy_grf, &cfg->con1_for_pcie, true); in rk3588_combphy_cfg()
1029 param_write(priv->phy_grf, &cfg->con2_for_pcie, true); in rk3588_combphy_cfg()
1030 param_write(priv->phy_grf, &cfg->con3_for_pcie, true); in rk3588_combphy_cfg()
1069 param_write(priv->phy_grf, &cfg->pipe_txcomp_sel, false); in rk3588_combphy_cfg()
1070 param_write(priv->phy_grf, &cfg->pipe_txelec_sel, false); in rk3588_combphy_cfg()
1071 param_write(priv->phy_grf, &cfg->usb_mode_set, true); in rk3588_combphy_cfg()
1082 param_write(priv->phy_grf, &cfg->con0_for_sata, true); in rk3588_combphy_cfg()
1083 param_write(priv->phy_grf, &cfg->con1_for_sata, true); in rk3588_combphy_cfg()
1084 param_write(priv->phy_grf, &cfg->con2_for_sata, true); in rk3588_combphy_cfg()
1085 param_write(priv->phy_grf, &cfg->con3_for_sata, true); in rk3588_combphy_cfg()
1086 param_write(priv->pipe_grf, &cfg->pipe_con0_for_sata, true); in rk3588_combphy_cfg()
1087 param_write(priv->pipe_grf, &cfg->pipe_con1_for_sata, true); in rk3588_combphy_cfg()
1100 param_write(priv->phy_grf, &cfg->pipe_clk_24m, true); in rk3588_combphy_cfg()
1136 param_write(priv->phy_grf, &cfg->pipe_clk_25m, true); in rk3588_combphy_cfg()
1139 param_write(priv->phy_grf, &cfg->pipe_clk_100m, true); in rk3588_combphy_cfg()
1184 param_write(priv->phy_grf, &cfg->pipe_clk_ext, true); in rk3588_combphy_cfg()