186 	unsigned long pixclock;  member
191 	unsigned long pixclock;  member
477 	u32 tmdsclock = inno_hdmi_phy_get_tmdsclk(inno, inno->pixclock);  in inno_hdmi_phy_power_on()
510 	inno_hdmi_phy_clk_set_rate(&inno->hw, inno->pixclock, 0);  in inno_hdmi_phy_power_on()
582 		return inno->pixclock;  in inno_hdmi_phy_clk_recalc_rate()
593 	for (; cfg->pixclock != ~0UL; cfg++)  in inno_hdmi_phy_clk_round_rate()
594 		if (cfg->pixclock == rate)  in inno_hdmi_phy_clk_round_rate()
598 	if (cfg->pixclock > 600000000)  in inno_hdmi_phy_clk_round_rate()
607 		return cfg->pixclock;  in inno_hdmi_phy_clk_round_rate()
618 	return cfg->pixclock;  in inno_hdmi_phy_clk_round_rate()
634 	for (; cfg->pixclock != ~0UL; cfg++)  in inno_hdmi_phy_clk_set_rate()
635 		if (cfg->pixclock == rate && cfg->tmdsclock == tmdsclock)  in inno_hdmi_phy_clk_set_rate()
638 	if (cfg->pixclock == ~0UL) {  in inno_hdmi_phy_clk_set_rate()
646 	inno->pixclock = rate;  in inno_hdmi_phy_clk_set_rate()
1112 	inno->pixclock = DIV_ROUND_CLOSEST(frac, 1000) * 1000;  in inno_hdmi_rk3328_phy_pll_recalc_rate()
1114 	dev_dbg(inno->dev, "%s rate %lu\n", __func__, inno->pixclock);  in inno_hdmi_rk3328_phy_pll_recalc_rate()
1351 	inno->pixclock = DIV_ROUND_CLOSEST(frac, 1000) * 1000;  in inno_hdmi_rk3528_phy_pll_recalc_rate()
1353 	dev_dbg(inno->dev, "%s rate %lu\n", __func__, inno->pixclock);  in inno_hdmi_rk3528_phy_pll_recalc_rate()
1385 	inno->pixclock = vco;  in inno_hdmi_rk3228_phy_pll_recalc_rate()
1387 	dev_dbg(inno->dev, "%s rate %lu\n", __func__, inno->pixclock);  in inno_hdmi_rk3228_phy_pll_recalc_rate()
1389 	return inno->pixclock;  in inno_hdmi_rk3228_phy_pll_recalc_rate()