Lines Matching refs:inno_write
376 static inline void inno_write(struct inno_hdmi_phy *inno, u32 reg, u8 val) in inno_write() function
440 inno_write(inno, 0x04, intr_stat1); in inno_hdmi_phy_hardirq()
442 inno_write(inno, 0x06, intr_stat2); in inno_hdmi_phy_hardirq()
444 inno_write(inno, 0x08, intr_stat3); in inno_hdmi_phy_hardirq()
735 inno_write(inno, 0xea, POST_PLL_FB_DIV_7_0(cfg->fbdiv)); in inno_hdmi_phy_rk3228_power_on()
754 inno_write(inno, 0xef + v, phy_cfg->regs[v]); in inno_hdmi_phy_rk3228_power_on()
857 inno_write(inno, 0xe3, PRE_PLL_FB_DIV_7_0(cfg->fbdiv)); in inno_hdmi_phy_rk3228_pre_pll_update()
908 inno_write(inno, 0xac, val); in inno_hdmi_phy_rk3328_power_on()
910 inno_write(inno, 0xaa, 2); in inno_hdmi_phy_rk3328_power_on()
912 inno_write(inno, 0xab, val); in inno_hdmi_phy_rk3328_power_on()
915 inno_write(inno, 0xad, val); in inno_hdmi_phy_rk3328_power_on()
917 inno_write(inno, 0xab, val); in inno_hdmi_phy_rk3328_power_on()
918 inno_write(inno, 0xaa, 0x0e); in inno_hdmi_phy_rk3328_power_on()
922 inno_write(inno, 0xb5 + val, phy_cfg->regs[val]); in inno_hdmi_phy_rk3328_power_on()
931 inno_write(inno, 0xc8, 0); in inno_hdmi_phy_rk3328_power_on()
932 inno_write(inno, 0xc9, 0); in inno_hdmi_phy_rk3328_power_on()
933 inno_write(inno, 0xca, 0); in inno_hdmi_phy_rk3328_power_on()
934 inno_write(inno, 0xcb, 0); in inno_hdmi_phy_rk3328_power_on()
939 inno_write(inno, 0xc5, ((val >> 8) & 0xff) | 0x80); in inno_hdmi_phy_rk3328_power_on()
940 inno_write(inno, 0xc6, val & 0xff); in inno_hdmi_phy_rk3328_power_on()
941 inno_write(inno, 0xc7, 3 << 1); in inno_hdmi_phy_rk3328_power_on()
942 inno_write(inno, 0xc5, ((val >> 8) & 0xff)); in inno_hdmi_phy_rk3328_power_on()
944 inno_write(inno, 0xc5, 0x81); in inno_hdmi_phy_rk3328_power_on()
947 inno_write(inno, 0xc8, 0x30); in inno_hdmi_phy_rk3328_power_on()
949 inno_write(inno, 0xc9, 0x10); in inno_hdmi_phy_rk3328_power_on()
950 inno_write(inno, 0xca, 0x10); in inno_hdmi_phy_rk3328_power_on()
951 inno_write(inno, 0xcb, 0x10); in inno_hdmi_phy_rk3328_power_on()
957 inno_write(inno, 0xd8, (temp >> 8) & 0xff); in inno_hdmi_phy_rk3328_power_on()
958 inno_write(inno, 0xd9, temp & 0xff); in inno_hdmi_phy_rk3328_power_on()
964 inno_write(inno, 0xb2, 0x0f); in inno_hdmi_phy_rk3328_power_on()
982 inno_write(inno, 0x05, 0x22); in inno_hdmi_phy_rk3328_power_on()
983 inno_write(inno, 0x07, 0x22); in inno_hdmi_phy_rk3328_power_on()
990 inno_write(inno, 0xb2, 0); in inno_hdmi_phy_rk3328_power_off()
997 inno_write(inno, 0x05, 0); in inno_hdmi_phy_rk3328_power_off()
998 inno_write(inno, 0x07, 0); in inno_hdmi_phy_rk3328_power_off()
1007 inno_write(inno, 0x01, 0x07); in inno_hdmi_phy_rk3328_init()
1008 inno_write(inno, 0x02, 0x91); in inno_hdmi_phy_rk3328_init()
1033 inno_write(inno, 0xa1, cfg->prediv); in inno_hdmi_phy_rk3328_pre_pll_update()
1038 inno_write(inno, 0xa2, val); in inno_hdmi_phy_rk3328_pre_pll_update()
1039 inno_write(inno, 0xa3, cfg->fbdiv & 0xff); in inno_hdmi_phy_rk3328_pre_pll_update()
1042 inno_write(inno, 0xa5, val); in inno_hdmi_phy_rk3328_pre_pll_update()
1045 inno_write(inno, 0xa6, val); in inno_hdmi_phy_rk3328_pre_pll_update()
1049 inno_write(inno, 0xa4, val); in inno_hdmi_phy_rk3328_pre_pll_update()
1053 inno_write(inno, 0xd3, val); in inno_hdmi_phy_rk3328_pre_pll_update()
1055 inno_write(inno, 0xd2, val); in inno_hdmi_phy_rk3328_pre_pll_update()
1057 inno_write(inno, 0xd1, val); in inno_hdmi_phy_rk3328_pre_pll_update()
1059 inno_write(inno, 0xd3, 0); in inno_hdmi_phy_rk3328_pre_pll_update()
1060 inno_write(inno, 0xd2, 0); in inno_hdmi_phy_rk3328_pre_pll_update()
1061 inno_write(inno, 0xd1, 0); in inno_hdmi_phy_rk3328_pre_pll_update()
1131 inno_write(inno, 0xab, val); in inno_hdmi_phy_rk3528_power_on()
1134 inno_write(inno, 0xad, 0x8); in inno_hdmi_phy_rk3528_power_on()
1135 inno_write(inno, 0xaa, 2); in inno_hdmi_phy_rk3528_power_on()
1138 inno_write(inno, 0xad, val); in inno_hdmi_phy_rk3528_power_on()
1139 inno_write(inno, 0xaa, 0x0e); in inno_hdmi_phy_rk3528_power_on()
1143 inno_write(inno, 0xac, val); in inno_hdmi_phy_rk3528_power_on()
1149 inno_write(inno, 0xbf, val); in inno_hdmi_phy_rk3528_power_on()
1153 inno_write(inno, 0xc0, val); in inno_hdmi_phy_rk3528_power_on()
1156 inno_write(inno, 0xb5, phy_cfg->regs[2]); in inno_hdmi_phy_rk3528_power_on()
1157 inno_write(inno, 0xb6, phy_cfg->regs[3]); in inno_hdmi_phy_rk3528_power_on()
1158 inno_write(inno, 0xb7, phy_cfg->regs[3]); in inno_hdmi_phy_rk3528_power_on()
1159 inno_write(inno, 0xb8, phy_cfg->regs[3]); in inno_hdmi_phy_rk3528_power_on()
1162 inno_write(inno, 0xbb, phy_cfg->regs[4]); in inno_hdmi_phy_rk3528_power_on()
1163 inno_write(inno, 0xbc, phy_cfg->regs[4]); in inno_hdmi_phy_rk3528_power_on()
1164 inno_write(inno, 0xbd, phy_cfg->regs[4]); in inno_hdmi_phy_rk3528_power_on()
1167 inno_write(inno, 0xb4, 0x7); in inno_hdmi_phy_rk3528_power_on()
1170 inno_write(inno, 0xbe, 0x70); in inno_hdmi_phy_rk3528_power_on()
1172 inno_write(inno, 0xb2, 0x0f); in inno_hdmi_phy_rk3528_power_on()
1186 inno_write(inno, 0xc7, 0x76); in inno_hdmi_phy_rk3528_power_on()
1187 inno_write(inno, 0xc5, 0x83); in inno_hdmi_phy_rk3528_power_on()
1188 inno_write(inno, 0xc8, 0x00); in inno_hdmi_phy_rk3528_power_on()
1189 inno_write(inno, 0xc9, 0x2f); in inno_hdmi_phy_rk3528_power_on()
1190 inno_write(inno, 0xca, 0x2f); in inno_hdmi_phy_rk3528_power_on()
1191 inno_write(inno, 0xcb, 0x2f); in inno_hdmi_phy_rk3528_power_on()
1193 inno_write(inno, 0xc7, 0x76); in inno_hdmi_phy_rk3528_power_on()
1194 inno_write(inno, 0xc5, 0x83); in inno_hdmi_phy_rk3528_power_on()
1195 inno_write(inno, 0xc8, 0x00); in inno_hdmi_phy_rk3528_power_on()
1196 inno_write(inno, 0xc9, 0x0f); in inno_hdmi_phy_rk3528_power_on()
1197 inno_write(inno, 0xca, 0x0f); in inno_hdmi_phy_rk3528_power_on()
1198 inno_write(inno, 0xcb, 0x0f); in inno_hdmi_phy_rk3528_power_on()
1204 inno_write(inno, 0xd8, (temp >> 8) & 0xff); in inno_hdmi_phy_rk3528_power_on()
1205 inno_write(inno, 0xd9, temp & 0xff); in inno_hdmi_phy_rk3528_power_on()
1211 inno_write(inno, 0xb2, 0x0f); in inno_hdmi_phy_rk3528_power_on()
1220 inno_write(inno, 0x05, 0x22); in inno_hdmi_phy_rk3528_power_on()
1221 inno_write(inno, 0x07, 0x22); in inno_hdmi_phy_rk3528_power_on()
1222 inno_write(inno, 0xcc, 0x0f); in inno_hdmi_phy_rk3528_power_on()
1230 inno_write(inno, 0xb2, 0); in inno_hdmi_phy_rk3528_power_off()
1232 inno_write(inno, 0xbe, 0); in inno_hdmi_phy_rk3528_power_off()
1236 inno_write(inno, 0xcc, 0); in inno_hdmi_phy_rk3528_power_off()
1240 inno_write(inno, 0x05, 0); in inno_hdmi_phy_rk3528_power_off()
1241 inno_write(inno, 0x07, 0); in inno_hdmi_phy_rk3528_power_off()
1250 inno_write(inno, 0x02, 0x81); in inno_hdmi_phy_rk3528_init()
1269 inno_write(inno, 0xcc, 0x0f); in inno_hdmi_phy_rk3528_pre_pll_update()
1275 inno_write(inno, 0xa1, cfg->prediv); in inno_hdmi_phy_rk3528_pre_pll_update()
1280 inno_write(inno, 0xa2, val); in inno_hdmi_phy_rk3528_pre_pll_update()
1281 inno_write(inno, 0xa3, cfg->fbdiv & 0xff); in inno_hdmi_phy_rk3528_pre_pll_update()
1284 inno_write(inno, 0xa5, val); in inno_hdmi_phy_rk3528_pre_pll_update()
1287 inno_write(inno, 0xa6, val); in inno_hdmi_phy_rk3528_pre_pll_update()
1291 inno_write(inno, 0xa4, val); in inno_hdmi_phy_rk3528_pre_pll_update()
1295 inno_write(inno, 0xd3, val); in inno_hdmi_phy_rk3528_pre_pll_update()
1297 inno_write(inno, 0xd2, val); in inno_hdmi_phy_rk3528_pre_pll_update()
1299 inno_write(inno, 0xd1, val); in inno_hdmi_phy_rk3528_pre_pll_update()
1301 inno_write(inno, 0xd3, 0); in inno_hdmi_phy_rk3528_pre_pll_update()
1302 inno_write(inno, 0xd2, 0); in inno_hdmi_phy_rk3528_pre_pll_update()
1303 inno_write(inno, 0xd1, 0); in inno_hdmi_phy_rk3528_pre_pll_update()