390 static inline void inno_update_bits(struct inno_hdmi_phy *inno, u8 reg,  in inno_update_bits()  function
459 	inno_update_bits(inno, 0x02, 1, 0);  in inno_hdmi_phy_irq()
464 	inno_update_bits(inno, 0x02, 1, 1);  in inno_hdmi_phy_irq()
555 		inno_update_bits(inno, 0xe0, PRE_PLL_POWER_MASK,  in inno_hdmi_phy_clk_prepare()
558 		inno_update_bits(inno, 0xa0, 1, 0);  in inno_hdmi_phy_clk_prepare()
568 		inno_update_bits(inno, 0xe0, PRE_PLL_POWER_MASK,  in inno_hdmi_phy_clk_unprepare()
571 		inno_update_bits(inno, 0xa0, 1, 1);  in inno_hdmi_phy_clk_unprepare()
721 	inno_update_bits(inno, 0x02, PDATAEN_MASK, PDATAEN_DISABLE);  in inno_hdmi_phy_rk3228_power_on()
724 	inno_update_bits(inno, 0xe0, PRE_PLL_POWER_MASK, PRE_PLL_POWER_DOWN);  in inno_hdmi_phy_rk3228_power_on()
725 	inno_update_bits(inno, 0xe0, POST_PLL_POWER_MASK, POST_PLL_POWER_DOWN);  in inno_hdmi_phy_rk3228_power_on()
730 	inno_update_bits(inno, 0xe9, m, v);  in inno_hdmi_phy_rk3228_power_on()
734 	inno_update_bits(inno, 0xeb, m, v);  in inno_hdmi_phy_rk3228_power_on()
741 		inno_update_bits(inno, 0xe9, m, v);  in inno_hdmi_phy_rk3228_power_on()
746 		inno_update_bits(inno, 0xe9, m, v);  in inno_hdmi_phy_rk3228_power_on()
750 		inno_update_bits(inno, 0xeb, m, v);  in inno_hdmi_phy_rk3228_power_on()
757 	inno_update_bits(inno, 0xe0, POST_PLL_POWER_MASK, POST_PLL_POWER_UP);  in inno_hdmi_phy_rk3228_power_on()
758 	inno_update_bits(inno, 0xe0, PRE_PLL_POWER_MASK, PRE_PLL_POWER_UP);  in inno_hdmi_phy_rk3228_power_on()
761 	inno_update_bits(inno, 0xe1, BANDGAP_MASK, BANDGAP_ENABLE);  in inno_hdmi_phy_rk3228_power_on()
764 	inno_update_bits(inno, 0xe1, TMDS_DRIVER_MASK, TMDS_DRIVER_ENABLE);  in inno_hdmi_phy_rk3228_power_on()
782 	inno_update_bits(inno, 0x02, PDATAEN_MASK, PDATAEN_ENABLE);  in inno_hdmi_phy_rk3228_power_on()
789 	inno_update_bits(inno, 0xe1, TMDS_DRIVER_MASK, TMDS_DRIVER_DISABLE);  in inno_hdmi_phy_rk3228_power_off()
792 	inno_update_bits(inno, 0xe1, BANDGAP_MASK, BANDGAP_DISABLE);  in inno_hdmi_phy_rk3228_power_off()
795 	inno_update_bits(inno, 0xe0, POST_PLL_POWER_MASK, POST_PLL_POWER_DOWN);  in inno_hdmi_phy_rk3228_power_off()
812 	inno_update_bits(inno, 0x01, m, v);  in inno_hdmi_phy_rk3228_init()
813 	inno_update_bits(inno, 0x02, BYPASS_PDATA_EN_MASK, BYPASS_PDATA_EN);  in inno_hdmi_phy_rk3228_init()
825 		inno_update_bits(inno, 0xaa,  in inno_hdmi_phy_rk3228_init()
850 	inno_update_bits(inno, 0xe0, PRE_PLL_POWER_MASK, PRE_PLL_POWER_DOWN);  in inno_hdmi_phy_rk3228_pre_pll_update()
855 	inno_update_bits(inno, 0xe2, m, v);  in inno_hdmi_phy_rk3228_pre_pll_update()
862 	inno_update_bits(inno, 0xe4, m, v);  in inno_hdmi_phy_rk3228_pre_pll_update()
867 	inno_update_bits(inno, 0xe5, m, v);  in inno_hdmi_phy_rk3228_pre_pll_update()
874 	inno_update_bits(inno, 0xe6, m, v);  in inno_hdmi_phy_rk3228_pre_pll_update()
877 	inno_update_bits(inno, 0xe0, PRE_PLL_POWER_MASK, PRE_PLL_POWER_UP);  in inno_hdmi_phy_rk3228_pre_pll_update()
903 	inno_update_bits(inno, 0x02, 1, 0);  in inno_hdmi_phy_rk3328_power_on()
905 	inno_update_bits(inno, 0xaa, 1, 1);  in inno_hdmi_phy_rk3328_power_on()
961 	inno_update_bits(inno, 0xaa, 1, 0);  in inno_hdmi_phy_rk3328_power_on()
963 	inno_update_bits(inno, 0xb0, 4, 4);  in inno_hdmi_phy_rk3328_power_on()
979 	inno_update_bits(inno, 0x02, 1, 1);  in inno_hdmi_phy_rk3328_power_on()
992 	inno_update_bits(inno, 0xb0, 4, 0);  in inno_hdmi_phy_rk3328_power_off()
994 	inno_update_bits(inno, 0xaa, 1, 1);  in inno_hdmi_phy_rk3328_power_off()
1030 	inno_update_bits(inno, 0xa0, 1, 1);  in inno_hdmi_phy_rk3328_pre_pll_update()
1032 	inno_update_bits(inno, 0xa0, 2, (cfg->vco_div_5_en & 1) << 1);  in inno_hdmi_phy_rk3328_pre_pll_update()
1065 	inno_update_bits(inno, 0xa0, 1, 0);  in inno_hdmi_phy_rk3328_pre_pll_update()
1128 	inno_update_bits(inno, 0xaa, 1, 0);  in inno_hdmi_phy_rk3528_power_on()
1145 	inno_update_bits(inno, 0xad, BIT(4), val);  in inno_hdmi_phy_rk3528_power_on()
1208 	inno_update_bits(inno, 0xaa, 1, 0);  in inno_hdmi_phy_rk3528_power_on()
1210 	inno_update_bits(inno, 0xb0, 4, 4);  in inno_hdmi_phy_rk3528_power_on()
1216 	inno_update_bits(inno, 0x02, 1, 0);  in inno_hdmi_phy_rk3528_power_on()
1217 	inno_update_bits(inno, 0x02, 1, 1);  in inno_hdmi_phy_rk3528_power_on()
1234 	inno_update_bits(inno, 0xaa, 1, 1);  in inno_hdmi_phy_rk3528_power_off()
1238 	inno_update_bits(inno, 0xb0, 4, 0);  in inno_hdmi_phy_rk3528_power_off()
1268 	inno_update_bits(inno, 0xb0, 4, 4);  in inno_hdmi_phy_rk3528_pre_pll_update()
1272 	inno_update_bits(inno, 0xa0, 1, 0);  in inno_hdmi_phy_rk3528_pre_pll_update()
1274 	inno_update_bits(inno, 0xa0, 2, (cfg->vco_div_5_en & 1) << 1);  in inno_hdmi_phy_rk3528_pre_pll_update()