242 static inline void write_grf_reg(struct csi2_dphy_hw *hw,  in write_grf_reg()  function
577 			write_grf_reg(hw, GRF_DPHY_CSI2PHY_DATALANE_EN,  in csi2_dphy_config_dual_mode()
579 			write_grf_reg(hw, GRF_DPHY_CSI2PHY_CLKLANE_EN, 0x1);  in csi2_dphy_config_dual_mode()
581 				write_grf_reg(hw, GRF_DPHY_CSI2PHY_LANE_SEL, val);  in csi2_dphy_config_dual_mode()
586 				write_grf_reg(hw, GRF_DPHY_CSI2PHY_DATALANE_EN,  in csi2_dphy_config_dual_mode()
588 				write_grf_reg(hw, GRF_DPHY_CSI2PHY_CLKLANE_EN, 0x1);  in csi2_dphy_config_dual_mode()
590 				write_grf_reg(hw, GRF_DPHY1_CSI2PHY_DATALANE_EN,  in csi2_dphy_config_dual_mode()
592 				write_grf_reg(hw, GRF_DPHY1_CSI2PHY_CLKLANE_EN, 0x1);  in csi2_dphy_config_dual_mode()
595 				write_grf_reg(hw, GRF_DPHY_CSI2PHY1_LANE_SEL, val);  in csi2_dphy_config_dual_mode()
604 			write_grf_reg(hw, GRF_DPHY_CSI2PHY_DATALANE_EN0,  in csi2_dphy_config_dual_mode()
606 			write_grf_reg(hw, GRF_DPHY_CSI2PHY_CLKLANE_EN, 0x1);  in csi2_dphy_config_dual_mode()
608 				write_grf_reg(hw, GRF_DPHY_CSI2PHY_LANE_SEL, val);  in csi2_dphy_config_dual_mode()
610 					write_grf_reg(hw, GRF_DPHY_CIF_CSI2PHY_SEL,  in csi2_dphy_config_dual_mode()
613 					write_grf_reg(hw, GRF_DPHY_ISP_CSI2PHY_SEL,  in csi2_dphy_config_dual_mode()
620 					write_grf_reg(hw, GRF_MIPI_HOST0_SEL, 0x1);  in csi2_dphy_config_dual_mode()
622 					write_grf_reg(hw, GRF_LVDS_HOST0_SEL, 0x1);  in csi2_dphy_config_dual_mode()
624 				write_grf_reg(hw, GRF_DPHY_CSI2PHY_LANE_SEL, val);  in csi2_dphy_config_dual_mode()
628 			write_grf_reg(hw, GRF_DPHY_CSI2PHY_DATALANE_EN1,  in csi2_dphy_config_dual_mode()
630 			write_grf_reg(hw, GRF_DPHY_CSI2PHY_CLKLANE1_EN, 0x1);  in csi2_dphy_config_dual_mode()
632 				write_grf_reg(hw, GRF_DPHY_CSI2PHY_LANE_SEL, val);  in csi2_dphy_config_dual_mode()
634 					write_grf_reg(hw, GRF_DPHY_CIF_CSI2PHY_SEL,  in csi2_dphy_config_dual_mode()
637 					write_grf_reg(hw, GRF_DPHY_ISP_CSI2PHY_SEL,  in csi2_dphy_config_dual_mode()
643 				write_grf_reg(hw, GRF_DPHY_CSI2PHY_LANE_SEL, val);  in csi2_dphy_config_dual_mode()
650 				write_grf_reg(hw, GRF_DPHY_CSI2PHY_DATALANE_EN0,  in csi2_dphy_config_dual_mode()
652 				write_grf_reg(hw, GRF_DPHY_CSI2PHY_CLKLANE_EN, 0x1);  in csi2_dphy_config_dual_mode()
654 				write_grf_reg(hw, GRF_DPHY_CSI2PHY1_LANE_SEL, val);  in csi2_dphy_config_dual_mode()
655 				write_grf_reg(hw, GRF_DPHY1_CSI2PHY_DATALANE_EN0,  in csi2_dphy_config_dual_mode()
657 				write_grf_reg(hw, GRF_DPHY1_CSI2PHY_CLKLANE_EN, 0x1);  in csi2_dphy_config_dual_mode()
664 				write_grf_reg(hw, GRF_DPHY_CSI2PHY_DATALANE_EN1,  in csi2_dphy_config_dual_mode()
666 				write_grf_reg(hw, GRF_DPHY_CSI2PHY_CLKLANE1_EN, 0x1);  in csi2_dphy_config_dual_mode()
668 				write_grf_reg(hw, GRF_DPHY_CSI2PHY1_LANE_SEL, val);  in csi2_dphy_config_dual_mode()
669 				write_grf_reg(hw, GRF_DPHY1_CSI2PHY_DATALANE_EN1,  in csi2_dphy_config_dual_mode()
671 				write_grf_reg(hw, GRF_DPHY1_CSI2PHY_CLKLANE1_EN, 0x1);  in csi2_dphy_config_dual_mode()
744 	write_grf_reg(hw, GRF_DPHY_CSI2PHY_FORCERXMODE, 0x0);  in csi2_dphy_hw_stream_on()