3  * Rockchip MIPI CSI2 DPHY driver
25 #include "phy-rockchip-csi2-dphy-common.h"
27 /* RK3562 DPHY GRF REG OFFSET */
35 /*RK3588 DPHY GRF REG OFFSET */
39 /*RV1106 DPHY GRF REG OFFSET */
494 		v4l2_warn(sd, "No link between dphy and sensor\n");  in get_remote_sensor()
502 static struct csi2_sensor *sd_to_sensor(struct csi2_dphy *dphy,  in sd_to_sensor()  argument
507 	for (i = 0; i < dphy->num_sensors; ++i)  in sd_to_sensor()
508 		if (dphy->sensors[i].sd == sd)  in sd_to_sensor()
509 			return &dphy->sensors[i];  in sd_to_sensor()
559 static void csi2_dphy_config_dual_mode(struct csi2_dphy *dphy,  in csi2_dphy_config_dual_mode()  argument
562 	struct csi2_dphy_hw *hw = dphy->dphy_hw;  in csi2_dphy_config_dual_mode()
563 	struct v4l2_subdev *sd = &dphy->sd;  in csi2_dphy_config_dual_mode()
576 		if (dphy->phy_index < 3) {  in csi2_dphy_config_dual_mode()
602 		switch (dphy->phy_index) {  in csi2_dphy_config_dual_mode()
680 static int csi2_dphy_hw_stream_on(struct csi2_dphy *dphy,  in csi2_dphy_hw_stream_on()  argument
685 	struct csi2_dphy_hw *hw = dphy->dphy_hw;  in csi2_dphy_hw_stream_on()
695 	sensor = sd_to_sensor(dphy, sensor_sd);  in csi2_dphy_hw_stream_on()
716 		if (dphy->phy_index % 3 == DPHY1)  in csi2_dphy_hw_stream_on()
720 		if (dphy->phy_index % 3 == DPHY2) {  in csi2_dphy_hw_stream_on()
730 	/* Reset dphy digital part */  in csi2_dphy_hw_stream_on()
741 	csi2_dphy_config_dual_mode(dphy, sensor);  in csi2_dphy_hw_stream_on()
747 	if (dphy->data_rate_mbps > 1500) {  in csi2_dphy_hw_stream_on()
759 			if (dphy->phy_index % 3 == DPHY1) {  in csi2_dphy_hw_stream_on()
767 			if (dphy->phy_index % 3 == DPHY2) {  in csi2_dphy_hw_stream_on()
779 		if (hsfreq_ranges[i].range_h >= dphy->data_rate_mbps) {  in csi2_dphy_hw_stream_on()
787 		dev_warn(dphy->dev, "data rate: %lld mbps, max support %d mbps",  in csi2_dphy_hw_stream_on()
788 			 dphy->data_rate_mbps, hsfreq_ranges[i].range_h + 1);  in csi2_dphy_hw_stream_on()
803 		if (dphy->phy_index % 3 == DPHY1) {  in csi2_dphy_hw_stream_on()
809 		if (dphy->phy_index % 3 == DPHY2) {  in csi2_dphy_hw_stream_on()
817 		if (dphy->phy_index % 3 == DPHY0 ||  in csi2_dphy_hw_stream_on()
818 		    dphy->phy_index % 3 == DPHY1) {  in csi2_dphy_hw_stream_on()
850 static int csi2_dphy_hw_stream_off(struct csi2_dphy *dphy,  in csi2_dphy_hw_stream_off()  argument
853 	struct csi2_dphy_hw *hw = dphy->dphy_hw;  in csi2_dphy_hw_stream_off()
958 		.compatible = "rockchip,rk3568-csi2-dphy-hw",
962 		.compatible = "rockchip,rk3588-csi2-dphy-hw",
966 		.compatible = "rockchip,rv1106-csi2-dphy-hw",
970 		.compatible = "rockchip,rk3562-csi2-dphy-hw",
1021 		dev_err_probe(dev, PTR_ERR(dphy_hw->rsts_bulk), "failed to get dphy reset\n");  in rockchip_csi2_dphy_hw_probe()
1038 			dev_err(dev, "Can't find csi2 dphy hw addr!\n");  in rockchip_csi2_dphy_hw_probe()
1061 	dev_info(dev, "csi2 dphy hw probe successfully!\n");  in rockchip_csi2_dphy_hw_probe()
1080 		.name = "rockchip-csi2-dphy-hw",
1099 MODULE_DESCRIPTION("Rockchip MIPI CSI2 DPHY HW driver");