Lines Matching full:its
74 * value of BASER register configuration and ITS page size.
86 * The ITS structure - contains most of the infrastructure, with the
120 #define is_v4(its) (!!((its)->typer & GITS_TYPER_VLPIS)) argument
121 #define is_v4_1(its) (!!((its)->typer & GITS_TYPER_VMAPP)) argument
122 #define device_ids(its) (FIELD_GET(GITS_TYPER_DEVBITS, (its)->typer) + 1) argument
154 * The ITS view of a device - belongs to an ITS, owns an interrupt
155 * translation table, and a list of interrupts. If it some of its
161 struct its_node *its; member
204 static bool require_its_list_vmovp(struct its_vm *vm, struct its_node *its) in require_its_list_vmovp() argument
206 return (gic_rdists->has_rvpeid || vm->vlpi_count[its->list_nr]); in require_its_list_vmovp()
211 struct its_node *its; in get_its_list() local
214 list_for_each_entry(its, &its_nodes, entry) { in get_its_list()
215 if (!is_v4(its)) in get_its_list()
218 if (require_its_list_vmovp(vm, its)) in get_its_list()
219 __set_bit(its->list_nr, &its_list); in get_its_list()
234 struct its_node *its = its_dev->its; in dev_event_to_col() local
236 return its->collections + its_dev->event_map.col_map[event]; in dev_event_to_col()
305 static struct its_vpe *valid_vpe(struct its_node *its, struct its_vpe *vpe) in valid_vpe() argument
307 if (valid_col(its->collections + vpe->col_idx)) in valid_vpe()
314 * ITS command descriptors - parameters to be encoded in a command
413 * The ITS command block, which is what the ITS actually parses.
591 static struct its_collection *its_build_mapd_cmd(struct its_node *its, in its_build_mapd_cmd() argument
612 static struct its_collection *its_build_mapc_cmd(struct its_node *its, in its_build_mapc_cmd() argument
626 static struct its_collection *its_build_mapti_cmd(struct its_node *its, in its_build_mapti_cmd() argument
646 static struct its_collection *its_build_movi_cmd(struct its_node *its, in its_build_movi_cmd() argument
665 static struct its_collection *its_build_discard_cmd(struct its_node *its, in its_build_discard_cmd() argument
683 static struct its_collection *its_build_inv_cmd(struct its_node *its, in its_build_inv_cmd() argument
701 static struct its_collection *its_build_int_cmd(struct its_node *its, in its_build_int_cmd() argument
719 static struct its_collection *its_build_clear_cmd(struct its_node *its, in its_build_clear_cmd() argument
737 static struct its_collection *its_build_invall_cmd(struct its_node *its, in its_build_invall_cmd() argument
749 static struct its_vpe *its_build_vinvall_cmd(struct its_node *its, in its_build_vinvall_cmd() argument
758 return valid_vpe(its, desc->its_vinvall_cmd.vpe); in its_build_vinvall_cmd()
761 static struct its_vpe *its_build_vmapp_cmd(struct its_node *its, in its_build_vmapp_cmd() argument
774 if (is_v4_1(its)) { in its_build_vmapp_cmd()
783 target = desc->its_vmapp_cmd.col->target_address + its->vlpi_redist_offset; in its_build_vmapp_cmd()
789 if (!is_v4_1(its)) in its_build_vmapp_cmd()
806 return valid_vpe(its, desc->its_vmapp_cmd.vpe); in its_build_vmapp_cmd()
809 static struct its_vpe *its_build_vmapti_cmd(struct its_node *its, in its_build_vmapti_cmd() argument
815 if (!is_v4_1(its) && desc->its_vmapti_cmd.db_enabled) in its_build_vmapti_cmd()
829 return valid_vpe(its, desc->its_vmapti_cmd.vpe); in its_build_vmapti_cmd()
832 static struct its_vpe *its_build_vmovi_cmd(struct its_node *its, in its_build_vmovi_cmd() argument
838 if (!is_v4_1(its) && desc->its_vmovi_cmd.db_enabled) in its_build_vmovi_cmd()
852 return valid_vpe(its, desc->its_vmovi_cmd.vpe); in its_build_vmovi_cmd()
855 static struct its_vpe *its_build_vmovp_cmd(struct its_node *its, in its_build_vmovp_cmd() argument
861 target = desc->its_vmovp_cmd.col->target_address + its->vlpi_redist_offset; in its_build_vmovp_cmd()
868 if (is_v4_1(its)) { in its_build_vmovp_cmd()
875 return valid_vpe(its, desc->its_vmovp_cmd.vpe); in its_build_vmovp_cmd()
878 static struct its_vpe *its_build_vinv_cmd(struct its_node *its, in its_build_vinv_cmd() argument
893 return valid_vpe(its, map->vpe); in its_build_vinv_cmd()
896 static struct its_vpe *its_build_vint_cmd(struct its_node *its, in its_build_vint_cmd() argument
911 return valid_vpe(its, map->vpe); in its_build_vint_cmd()
914 static struct its_vpe *its_build_vclear_cmd(struct its_node *its, in its_build_vclear_cmd() argument
929 return valid_vpe(its, map->vpe); in its_build_vclear_cmd()
932 static struct its_vpe *its_build_invdb_cmd(struct its_node *its, in its_build_invdb_cmd() argument
936 if (WARN_ON(!is_v4_1(its))) in its_build_invdb_cmd()
944 return valid_vpe(its, desc->its_invdb_cmd.vpe); in its_build_invdb_cmd()
947 static struct its_vpe *its_build_vsgi_cmd(struct its_node *its, in its_build_vsgi_cmd() argument
951 if (WARN_ON(!is_v4_1(its))) in its_build_vsgi_cmd()
964 return valid_vpe(its, desc->its_vsgi_cmd.vpe); in its_build_vsgi_cmd()
967 static u64 its_cmd_ptr_to_offset(struct its_node *its, in its_cmd_ptr_to_offset() argument
970 return (ptr - its->cmd_base) * sizeof(*ptr); in its_cmd_ptr_to_offset()
973 static int its_queue_full(struct its_node *its) in its_queue_full() argument
978 widx = its->cmd_write - its->cmd_base; in its_queue_full()
979 ridx = readl_relaxed(its->base + GITS_CREADR) / sizeof(struct its_cmd_block); in its_queue_full()
981 /* This is incredibly unlikely to happen, unless the ITS locks up. */ in its_queue_full()
988 static struct its_cmd_block *its_allocate_entry(struct its_node *its) in its_allocate_entry() argument
993 while (its_queue_full(its)) { in its_allocate_entry()
996 pr_err_ratelimited("ITS queue not draining\n"); in its_allocate_entry()
1003 cmd = its->cmd_write++; in its_allocate_entry()
1006 if (its->cmd_write == (its->cmd_base + ITS_CMD_QUEUE_NR_ENTRIES)) in its_allocate_entry()
1007 its->cmd_write = its->cmd_base; in its_allocate_entry()
1018 static struct its_cmd_block *its_post_commands(struct its_node *its) in its_post_commands() argument
1020 u64 wr = its_cmd_ptr_to_offset(its, its->cmd_write); in its_post_commands()
1022 writel_relaxed(wr, its->base + GITS_CWRITER); in its_post_commands()
1024 return its->cmd_write; in its_post_commands()
1027 static void its_flush_cmd(struct its_node *its, struct its_cmd_block *cmd) in its_flush_cmd() argument
1031 * the ITS. in its_flush_cmd()
1033 if (its->flags & ITS_FLAGS_CMDQ_NEEDS_FLUSHING) in its_flush_cmd()
1039 static int its_wait_for_range_completion(struct its_node *its, in its_wait_for_range_completion() argument
1047 to_idx = its_cmd_ptr_to_offset(its, to); in its_wait_for_range_completion()
1056 rd_idx = readl_relaxed(its->base + GITS_CREADR); in its_wait_for_range_completion()
1072 pr_err_ratelimited("ITS queue timeout (%llu %llu)\n", in its_wait_for_range_completion()
1086 void name(struct its_node *its, \
1095 raw_spin_lock_irqsave(&its->lock, flags); \
1097 cmd = its_allocate_entry(its); \
1099 raw_spin_unlock_irqrestore(&its->lock, flags); \
1102 sync_obj = builder(its, cmd, desc); \
1103 its_flush_cmd(its, cmd); \
1106 sync_cmd = its_allocate_entry(its); \
1110 buildfn(its, sync_cmd, sync_obj); \
1111 its_flush_cmd(its, sync_cmd); \
1115 rd_idx = readl_relaxed(its->base + GITS_CREADR); \
1116 next_cmd = its_post_commands(its); \
1117 raw_spin_unlock_irqrestore(&its->lock, flags); \
1119 if (its_wait_for_range_completion(its, rd_idx, next_cmd)) \
1120 pr_err_ratelimited("ITS cmd %ps failed\n", builder); \
1123 static void its_build_sync_cmd(struct its_node *its, in its_build_sync_cmd() argument
1136 static void its_build_vsync_cmd(struct its_node *its, in BUILD_SINGLE_CMD_FUNC()
1156 its_send_single_command(dev->its, its_build_int_cmd, &desc); in BUILD_SINGLE_CMD_FUNC()
1166 its_send_single_command(dev->its, its_build_clear_cmd, &desc); in its_send_clear()
1176 its_send_single_command(dev->its, its_build_inv_cmd, &desc); in its_send_inv()
1186 its_send_single_command(dev->its, its_build_mapd_cmd, &desc); in its_send_mapd()
1189 static void its_send_mapc(struct its_node *its, struct its_collection *col, in its_send_mapc() argument
1197 its_send_single_command(its, its_build_mapc_cmd, &desc); in its_send_mapc()
1208 its_send_single_command(dev->its, its_build_mapti_cmd, &desc); in its_send_mapti()
1220 its_send_single_command(dev->its, its_build_movi_cmd, &desc); in its_send_movi()
1230 its_send_single_command(dev->its, its_build_discard_cmd, &desc); in its_send_discard()
1233 static void its_send_invall(struct its_node *its, struct its_collection *col) in its_send_invall() argument
1239 its_send_single_command(its, its_build_invall_cmd, &desc); in its_send_invall()
1253 its_send_single_vcommand(dev->its, its_build_vmapti_cmd, &desc); in its_send_vmapti()
1266 its_send_single_vcommand(dev->its, its_build_vmovi_cmd, &desc); in its_send_vmovi()
1269 static void its_send_vmapp(struct its_node *its, in its_send_vmapp() argument
1276 desc.its_vmapp_cmd.col = &its->collections[vpe->col_idx]; in its_send_vmapp()
1278 its_send_single_vcommand(its, its_build_vmapp_cmd, &desc); in its_send_vmapp()
1284 struct its_node *its; in its_send_vmovp() local
1291 its = list_first_entry(&its_nodes, struct its_node, entry); in its_send_vmovp()
1292 desc.its_vmovp_cmd.col = &its->collections[col_id]; in its_send_vmovp()
1293 its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); in its_send_vmovp()
1311 list_for_each_entry(its, &its_nodes, entry) { in its_send_vmovp()
1312 if (!is_v4(its)) in its_send_vmovp()
1315 if (!require_its_list_vmovp(vpe->its_vm, its)) in its_send_vmovp()
1318 desc.its_vmovp_cmd.col = &its->collections[col_id]; in its_send_vmovp()
1319 its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); in its_send_vmovp()
1325 static void its_send_vinvall(struct its_node *its, struct its_vpe *vpe) in its_send_vinvall() argument
1330 its_send_single_vcommand(its, its_build_vinvall_cmd, &desc); in its_send_vinvall()
1344 its_send_single_vcommand(dev->its, its_build_vinv_cmd, &desc); in its_send_vinv()
1358 its_send_single_vcommand(dev->its, its_build_vint_cmd, &desc); in its_send_vint()
1372 its_send_single_vcommand(dev->its, its_build_vclear_cmd, &desc); in its_send_vclear()
1375 static void its_send_invdb(struct its_node *its, struct its_vpe *vpe) in its_send_invdb() argument
1380 its_send_single_vcommand(its, its_build_invdb_cmd, &desc); in its_send_invdb()
1437 WARN_ON(!is_v4_1(its_dev->its)); in direct_lpi_inv()
1463 (is_v4_1(its_dev->its) || !irqd_is_forwarded_to_vcpu(d))) in lpi_update_config()
1481 if (is_v4_1(its_dev->its)) in its_vlpi_set_doorbell()
1494 * Ideally, we'd issue a VMAPTI to set the doorbell to its LPI in its_vlpi_set_doorbell()
1575 node = its_dev->its->numa_node; in its_select_cpu()
1594 * ITS placed next to two NUMA nodes. in its_select_cpu()
1604 if ((its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144)) in its_select_cpu()
1622 if ((its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) && in its_select_cpu()
1660 target_col = &its_dev->its->collections[cpu]; in its_set_affinity()
1677 struct its_node *its = its_dev->its; in its_irq_get_msi_base() local
1679 return its->phys_base + GITS_TRANSLATER; in its_irq_get_msi_base()
1685 struct its_node *its; in its_irq_compose_msi_msg() local
1688 its = its_dev->its; in its_irq_compose_msi_msg()
1689 addr = its->get_msi_base(its_dev); in its_irq_compose_msi_msg()
1748 static void its_map_vm(struct its_node *its, struct its_vm *vm) in its_map_vm() argument
1761 vm->vlpi_count[its->list_nr]++; in its_map_vm()
1763 if (vm->vlpi_count[its->list_nr] == 1) { in its_map_vm()
1772 its_send_vmapp(its, vpe, true); in its_map_vm()
1773 its_send_vinvall(its, vpe); in its_map_vm()
1781 static void its_unmap_vm(struct its_node *its, struct its_vm *vm) in its_unmap_vm() argument
1785 /* Not using the ITS list? Everything is always mapped. */ in its_unmap_vm()
1791 if (!--vm->vlpi_count[its->list_nr]) { in its_unmap_vm()
1795 its_send_vmapp(its, vm->vpes[i], false); in its_unmap_vm()
1836 /* Ensure all the VPEs are mapped on this ITS */ in its_vlpi_map()
1837 its_map_vm(its_dev->its, info->map->vm); in its_vlpi_map()
1909 /* Potentially unmap the VM from this ITS */ in its_vlpi_unmap()
1910 its_unmap_vm(its_dev->its, its_dev->event_map.vm); in its_vlpi_unmap()
1947 /* Need a v4 ITS */ in its_irq_set_vcpu_affinity()
1948 if (!is_v4(its_dev->its)) in its_irq_set_vcpu_affinity()
1972 .name = "ITS",
2048 pr_debug("ITS: alloc %u:%u\n", *base, nr_lpis); in alloc_lpi_range()
2107 pr_info("ITS: Using hypervisor restricted LPI range [%u]\n", in its_lpi_init()
2116 pr_debug("ITS: Allocator initialized for %u LPIs\n", lpis); in its_lpi_init()
2270 static u64 its_read_baser(struct its_node *its, struct its_baser *baser) in its_read_baser() argument
2272 u32 idx = baser - its->tables; in its_read_baser()
2274 return gits_read_baser(its->base + GITS_BASER + (idx << 3)); in its_read_baser()
2277 static void its_write_baser(struct its_node *its, struct its_baser *baser, in its_write_baser() argument
2280 u32 idx = baser - its->tables; in its_write_baser()
2282 gits_write_baser(val, its->base + GITS_BASER + (idx << 3)); in its_write_baser()
2283 baser->val = its_read_baser(its, baser); in its_write_baser()
2286 static int its_setup_baser(struct its_node *its, struct its_baser *baser, in its_setup_baser() argument
2289 u64 val = its_read_baser(its, baser); in its_setup_baser()
2301 pr_warn("ITS@%pa: %s too large, reduce ITS pages %u->%u\n", in its_setup_baser()
2302 &its->phys_base, its_base_type_string[type], in its_setup_baser()
2311 page = alloc_pages_node(its->numa_node, gfp_flags, order); in its_setup_baser()
2323 pr_err("ITS: no 52bit PA support when psz=%d\n", psz); in its_setup_baser()
2355 its_write_baser(its, baser, val); in its_setup_baser()
2385 pr_err("ITS@%pa: %s doesn't stick: %llx %llx\n", in its_setup_baser()
2386 &its->phys_base, its_base_type_string[type], in its_setup_baser()
2397 pr_info("ITS@%pa: allocated %d %s @%lx (%s, esz %d, psz %dK, shr %d)\n", in its_setup_baser()
2398 &its->phys_base, (int)(PAGE_ORDER_TO_SIZE(order) / (int)tmp), in its_setup_baser()
2407 static bool its_parse_indirect_baser(struct its_node *its, in its_parse_indirect_baser() argument
2411 u64 tmp = its_read_baser(its, baser); in its_parse_indirect_baser()
2425 its_write_baser(its, baser, val | GITS_BASER_INDIRECT); in its_parse_indirect_baser()
2430 * The size of the lvl2 table is equal to ITS page size in its_parse_indirect_baser()
2433 * which is reported by ITS hardware times lvl1 table in its_parse_indirect_baser()
2443 * range of device IDs that the ITS can grok... The ID in its_parse_indirect_baser()
2452 pr_warn("ITS@%pa: %s Table too large, reduce ids %llu->%u\n", in its_parse_indirect_baser()
2453 &its->phys_base, its_base_type_string[type], in its_parse_indirect_baser()
2454 device_ids(its), ids); in its_parse_indirect_baser()
2472 static u32 compute_its_aff(struct its_node *its) in compute_its_aff() argument
2478 * Reencode the ITS SVPET and MPIDR as a GICR_TYPER, and compute in compute_its_aff()
2482 svpet = FIELD_GET(GITS_TYPER_SVPET, its->typer); in compute_its_aff()
2484 val |= FIELD_PREP(GICR_TYPER_AFFINITY, its->mpidr); in compute_its_aff()
2490 struct its_node *its; in find_sibling_its() local
2498 list_for_each_entry(its, &its_nodes, entry) { in find_sibling_its()
2501 if (!is_v4_1(its) || its == cur_its) in find_sibling_its()
2504 if (!FIELD_GET(GITS_TYPER_SVPET, its->typer)) in find_sibling_its()
2507 if (aff != compute_its_aff(its)) in find_sibling_its()
2511 baser = its->tables[2].val; in find_sibling_its()
2515 return its; in find_sibling_its()
2521 static void its_free_tables(struct its_node *its) in its_free_tables() argument
2526 if (its->tables[i].base) { in its_free_tables()
2527 free_pages((unsigned long)its->tables[i].base, in its_free_tables()
2528 its->tables[i].order); in its_free_tables()
2529 its->tables[i].base = NULL; in its_free_tables()
2534 static int its_probe_baser_psz(struct its_node *its, struct its_baser *baser) in its_probe_baser_psz() argument
2541 val = its_read_baser(its, baser); in its_probe_baser_psz()
2560 its_write_baser(its, baser, val); in its_probe_baser_psz()
2582 static int its_alloc_tables(struct its_node *its) in its_alloc_tables() argument
2588 if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_22375) in its_alloc_tables()
2593 struct its_baser *baser = its->tables + i; in its_alloc_tables()
2594 u64 val = its_read_baser(its, baser); in its_alloc_tables()
2602 if (its_probe_baser_psz(its, baser)) { in its_alloc_tables()
2603 its_free_tables(its); in its_alloc_tables()
2611 indirect = its_parse_indirect_baser(its, baser, &order, in its_alloc_tables()
2612 device_ids(its)); in its_alloc_tables()
2616 if (is_v4_1(its)) { in its_alloc_tables()
2620 if ((sibling = find_sibling_its(its))) { in its_alloc_tables()
2622 its_write_baser(its, baser, baser->val); in its_alloc_tables()
2627 indirect = its_parse_indirect_baser(its, baser, &order, in its_alloc_tables()
2632 err = its_setup_baser(its, baser, cache, shr, order, indirect); in its_alloc_tables()
2634 its_free_tables(its); in its_alloc_tables()
2648 struct its_node *its; in inherit_vpe_l1_table_from_its() local
2655 list_for_each_entry(its, &its_nodes, entry) { in inherit_vpe_l1_table_from_its()
2658 if (!is_v4_1(its)) in inherit_vpe_l1_table_from_its()
2661 if (!FIELD_GET(GITS_TYPER_SVPET, its->typer)) in inherit_vpe_l1_table_from_its()
2664 if (aff != compute_its_aff(its)) in inherit_vpe_l1_table_from_its()
2668 baser = its->tables[2].val; in inherit_vpe_l1_table_from_its()
2673 gic_data_rdist()->vpe_l1_base = its->tables[2].base; in inherit_vpe_l1_table_from_its()
2723 * ours wrt CommonLPIAff. Let's use its own VPROPBASER. in inherit_vpe_l1_table_from_rd()
2931 static int its_alloc_collections(struct its_node *its) in its_alloc_collections() argument
2935 its->collections = kcalloc(nr_cpu_ids, sizeof(*its->collections), in its_alloc_collections()
2937 if (!its->collections) in its_alloc_collections()
2941 its->collections[i].target_address = ~0ULL; in its_alloc_collections()
3041 pr_err_ratelimited("ITS virtual pending table not cleaning\n"); in read_vpend_dirty_clear()
3204 static void its_cpu_init_collection(struct its_node *its) in its_cpu_init_collection() argument
3209 /* avoid cross node collections and its mapping */ in its_cpu_init_collection()
3210 if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { in its_cpu_init_collection()
3214 if (its->numa_node != NUMA_NO_NODE && in its_cpu_init_collection()
3215 its->numa_node != of_node_to_nid(cpu_node)) in its_cpu_init_collection()
3220 * We now have to bind each collection to its target in its_cpu_init_collection()
3223 if (gic_read_typer(its->base + GITS_TYPER) & GITS_TYPER_PTA) { in its_cpu_init_collection()
3225 * This ITS wants the physical address of the in its_cpu_init_collection()
3230 /* This ITS wants a linear CPU number. */ in its_cpu_init_collection()
3236 its->collections[cpu].target_address = target; in its_cpu_init_collection()
3237 its->collections[cpu].col_id = cpu; in its_cpu_init_collection()
3239 its_send_mapc(its, &its->collections[cpu], 1); in its_cpu_init_collection()
3240 its_send_invall(its, &its->collections[cpu]); in its_cpu_init_collection()
3245 struct its_node *its; in its_cpu_init_collections() local
3249 list_for_each_entry(its, &its_nodes, entry) in its_cpu_init_collections()
3250 its_cpu_init_collection(its); in its_cpu_init_collections()
3255 static struct its_device *its_find_device(struct its_node *its, u32 dev_id) in its_find_device() argument
3260 raw_spin_lock_irqsave(&its->lock, flags); in its_find_device()
3262 list_for_each_entry(tmp, &its->its_device_list, entry) { in its_find_device()
3269 raw_spin_unlock_irqrestore(&its->lock, flags); in its_find_device()
3274 static struct its_baser *its_get_baser(struct its_node *its, u32 type) in its_get_baser() argument
3279 if (GITS_BASER_TYPE(its->tables[i].val) == type) in its_get_baser()
3280 return &its->tables[i]; in its_get_baser()
3286 static bool its_alloc_table_entry(struct its_node *its, in its_alloc_table_entry() argument
3311 page = alloc_pages_node(its->numa_node, gfp_flags, in its_alloc_table_entry()
3326 /* Ensure updated table contents are visible to ITS hardware */ in its_alloc_table_entry()
3333 static bool its_alloc_device_table(struct its_node *its, u32 dev_id) in its_alloc_device_table() argument
3337 baser = its_get_baser(its, GITS_BASER_TYPE_DEVICE); in its_alloc_device_table()
3339 /* Don't allow device id that exceeds ITS hardware limit */ in its_alloc_device_table()
3341 return (ilog2(dev_id) < device_ids(its)); in its_alloc_device_table()
3343 return its_alloc_table_entry(its, baser, dev_id); in its_alloc_device_table()
3348 struct its_node *its; in its_alloc_vpe_table() local
3358 list_for_each_entry(its, &its_nodes, entry) { in its_alloc_vpe_table()
3361 if (!is_v4(its)) in its_alloc_vpe_table()
3364 baser = its_get_baser(its, GITS_BASER_TYPE_VCPU); in its_alloc_vpe_table()
3368 if (!its_alloc_table_entry(its, baser, vpe_id)) in its_alloc_vpe_table()
3388 static struct its_device *its_create_device(struct its_node *its, u32 dev_id, in its_create_device() argument
3402 if (!its_alloc_device_table(its, dev_id)) in its_create_device()
3414 sz = nr_ites * (FIELD_GET(GITS_TYPER_ITT_ENTRY_SIZE, its->typer) + 1); in its_create_device()
3421 itt = kzalloc_node(sz, gfp_flags, its->numa_node); in its_create_device()
3451 dev->its = its; in its_create_device()
3463 raw_spin_lock_irqsave(&its->lock, flags); in its_create_device()
3464 list_add(&dev->entry, &its->its_device_list); in its_create_device()
3465 raw_spin_unlock_irqrestore(&its->lock, flags); in its_create_device()
3467 /* Map device to its ITT */ in its_create_device()
3477 raw_spin_lock_irqsave(&its_dev->its->lock, flags); in its_free_device()
3479 raw_spin_unlock_irqrestore(&its_dev->its->lock, flags); in its_free_device()
3510 struct its_node *its; in its_msi_prepare() local
3520 * are built on top of the ITS. in its_msi_prepare()
3525 its = msi_info->data; in its_msi_prepare()
3529 vpe_proxy.dev->its == its && in its_msi_prepare()
3537 mutex_lock(&its->dev_alloc_lock); in its_msi_prepare()
3538 its_dev = its_find_device(its, dev_id); in its_msi_prepare()
3550 its_dev = its_create_device(its, dev_id, nvec, true); in its_msi_prepare()
3558 mutex_unlock(&its->dev_alloc_lock); in its_msi_prepare()
3596 struct its_node *its = its_dev->its; in its_irq_domain_alloc() local
3606 err = iommu_dma_prepare_msi(info->desc, its->get_msi_base(its_dev)); in its_irq_domain_alloc()
3664 struct its_node *its = its_dev->its; in its_irq_domain_free() local
3678 mutex_lock(&its->dev_alloc_lock); in its_irq_domain_free()
3696 mutex_unlock(&its->dev_alloc_lock); in its_irq_domain_free()
3814 target_col = &vpe_proxy.dev->its->collections[to]; in its_vpe_db_proxy_move()
3833 * interrupt to its new location. in its_vpe_set_affinity()
3850 * is sharing its VPE table with the current one. in its_vpe_set_affinity()
3903 * would be able to read its coarse map pretty quickly anyway, in its_vpe_schedule()
3925 struct its_node *its; in its_vpe_invall() local
3927 list_for_each_entry(its, &its_nodes, entry) { in its_vpe_invall()
3928 if (!is_v4(its)) in its_vpe_invall()
3931 if (its_list_map && !vpe->its_vm->vlpi_count[its->list_nr]) in its_vpe_invall()
3935 * Sending a VINVALL to a single ITS is enough, as all in its_vpe_invall()
3938 its_send_vinvall(its, vpe); in its_vpe_invall()
4067 static struct its_node *its = NULL; in find_4_1_its() local
4069 if (!its) { in find_4_1_its()
4070 list_for_each_entry(its, &its_nodes, entry) { in find_4_1_its()
4071 if (is_v4_1(its)) in find_4_1_its()
4072 return its; in find_4_1_its()
4076 its = NULL; in find_4_1_its()
4079 return its; in find_4_1_its()
4085 struct its_node *its; in its_vpe_4_1_send_inv() local
4090 * it to the first valid ITS, and let the HW do its magic. in its_vpe_4_1_send_inv()
4092 its = find_4_1_its(); in its_vpe_4_1_send_inv()
4093 if (its) in its_vpe_4_1_send_inv()
4094 its_send_invdb(its, vpe); in its_vpe_4_1_send_inv()
4231 * GICv4.1 allows us to send VSGI commands to any ITS as long as the in its_configure_sgi()
4233 * activation time, we're pretty sure the first GICv4.1 ITS will do. in its_configure_sgi()
4276 struct its_node *its = find_4_1_its(); in its_sgi_set_irqchip_state() local
4281 writeq_relaxed(val, its->sgir_base + GITS_SGIR - SZ_128K); in its_sgi_set_irqchip_state()
4575 struct its_node *its; in its_vpe_irq_domain_activate() local
4588 list_for_each_entry(its, &its_nodes, entry) { in its_vpe_irq_domain_activate()
4589 if (!is_v4(its)) in its_vpe_irq_domain_activate()
4592 its_send_vmapp(its, vpe, true); in its_vpe_irq_domain_activate()
4593 its_send_vinvall(its, vpe); in its_vpe_irq_domain_activate()
4605 struct its_node *its; in its_vpe_irq_domain_deactivate() local
4614 list_for_each_entry(its, &its_nodes, entry) { in its_vpe_irq_domain_deactivate()
4615 if (!is_v4(its)) in its_vpe_irq_domain_deactivate()
4618 its_send_vmapp(its, vpe, false); in its_vpe_irq_domain_deactivate()
4636 * GIC architecture specification requires the ITS to be both in its_force_quiescent()
4643 /* Disable the generation of all interrupts to this ITS */ in its_force_quiescent()
4647 /* Poll GITS_CTLR and wait until ITS becomes quiescent */ in its_force_quiescent()
4664 struct its_node *its = data; in its_enable_quirk_cavium_22375() local
4667 its->typer &= ~GITS_TYPER_DEVBITS; in its_enable_quirk_cavium_22375()
4668 its->typer |= FIELD_PREP(GITS_TYPER_DEVBITS, 20 - 1); in its_enable_quirk_cavium_22375()
4669 its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_22375; in its_enable_quirk_cavium_22375()
4676 struct its_node *its = data; in its_enable_quirk_cavium_23144() local
4678 its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_23144; in its_enable_quirk_cavium_23144()
4685 struct its_node *its = data; in its_enable_quirk_qdf2400_e0065() local
4688 its->typer &= ~GITS_TYPER_ITT_ENTRY_SIZE; in its_enable_quirk_qdf2400_e0065()
4689 its->typer |= FIELD_PREP(GITS_TYPER_ITT_ENTRY_SIZE, 16 - 1); in its_enable_quirk_qdf2400_e0065()
4696 struct its_node *its = its_dev->its; in its_irq_get_msi_base_pre_its() local
4699 * The Socionext Synquacer SoC has a so-called 'pre-ITS', in its_irq_get_msi_base_pre_its()
4705 return its->pre_its_base + (its_dev->device_id << 2); in its_irq_get_msi_base_pre_its()
4710 struct its_node *its = data; in its_enable_quirk_socionext_synquacer() local
4714 if (!fwnode_property_read_u32_array(its->fwnode_handle, in its_enable_quirk_socionext_synquacer()
4715 "socionext,synquacer-pre-its", in its_enable_quirk_socionext_synquacer()
4719 its->pre_its_base = pre_its_window[0]; in its_enable_quirk_socionext_synquacer()
4720 its->get_msi_base = its_irq_get_msi_base_pre_its; in its_enable_quirk_socionext_synquacer()
4723 if (device_ids(its) > ids) { in its_enable_quirk_socionext_synquacer()
4724 its->typer &= ~GITS_TYPER_DEVBITS; in its_enable_quirk_socionext_synquacer()
4725 its->typer |= FIELD_PREP(GITS_TYPER_DEVBITS, ids - 1); in its_enable_quirk_socionext_synquacer()
4728 /* the pre-ITS breaks isolation, so disable MSI remapping */ in its_enable_quirk_socionext_synquacer()
4729 its->msi_domain_flags &= ~IRQ_DOMAIN_FLAG_MSI_REMAP; in its_enable_quirk_socionext_synquacer()
4737 struct its_node *its = data; in its_enable_quirk_hip07_161600802() local
4743 its->vlpi_redist_offset = SZ_128K; in its_enable_quirk_hip07_161600802()
4750 .desc = "ITS: Cavium errata 22375, 24313",
4758 .desc = "ITS: Cavium erratum 23144",
4766 .desc = "ITS: QDF2400 erratum 0065",
4767 .iidr = 0x00001070, /* QDF2400 ITS rev 1.x */
4776 * implementation, but with a 'pre-ITS' added that requires
4779 .desc = "ITS: Socionext Synquacer pre-ITS",
4787 .desc = "ITS: Hip07 erratum 161600802",
4797 static void its_enable_quirks(struct its_node *its) in its_enable_quirks() argument
4799 u32 iidr = readl_relaxed(its->base + GITS_IIDR); in its_enable_quirks()
4801 gic_enable_quirks(iidr, its_quirks, its); in its_enable_quirks()
4806 struct its_node *its; in its_save_disable() local
4810 list_for_each_entry(its, &its_nodes, entry) { in its_save_disable()
4813 base = its->base; in its_save_disable()
4814 its->ctlr_save = readl_relaxed(base + GITS_CTLR); in its_save_disable()
4817 pr_err("ITS@%pa: failed to quiesce: %d\n", in its_save_disable()
4818 &its->phys_base, err); in its_save_disable()
4819 writel_relaxed(its->ctlr_save, base + GITS_CTLR); in its_save_disable()
4823 its->cbaser_save = gits_read_cbaser(base + GITS_CBASER); in its_save_disable()
4828 list_for_each_entry_continue_reverse(its, &its_nodes, entry) { in its_save_disable()
4831 base = its->base; in its_save_disable()
4832 writel_relaxed(its->ctlr_save, base + GITS_CTLR); in its_save_disable()
4842 struct its_node *its; in its_restore_enable() local
4846 list_for_each_entry(its, &its_nodes, entry) { in its_restore_enable()
4850 base = its->base; in its_restore_enable()
4853 * Make sure that the ITS is disabled. If it fails to quiesce, in its_restore_enable()
4855 * registers is undefined according to the GIC v3 ITS in its_restore_enable()
4858 * Firmware resuming with the ITS enabled is terminally broken. in its_restore_enable()
4863 pr_err("ITS@%pa: failed to quiesce on resume: %d\n", in its_restore_enable()
4864 &its->phys_base, ret); in its_restore_enable()
4868 gits_write_cbaser(its->cbaser_save, base + GITS_CBASER); in its_restore_enable()
4874 its->cmd_write = its->cmd_base; in its_restore_enable()
4879 struct its_baser *baser = &its->tables[i]; in its_restore_enable()
4884 its_write_baser(its, baser, baser->val); in its_restore_enable()
4886 writel_relaxed(its->ctlr_save, base + GITS_CTLR); in its_restore_enable()
4889 * Reinit the collection if it's stored in the ITS. This is in its_restore_enable()
4893 if (its->collections[smp_processor_id()].col_id < in its_restore_enable()
4895 its_cpu_init_collection(its); in its_restore_enable()
4905 static int its_init_domain(struct fwnode_handle *handle, struct its_node *its) in its_init_domain() argument
4914 inner_domain = irq_domain_create_tree(handle, &its_domain_ops, its); in its_init_domain()
4922 inner_domain->flags |= its->msi_domain_flags; in its_init_domain()
4924 info->data = its; in its_init_domain()
4932 struct its_node *its; in its_init_vpe_domain() local
4937 pr_info("ITS: Using DirectLPI for VPE invalidation\n"); in its_init_vpe_domain()
4941 /* Any ITS will do, even if not v4 */ in its_init_vpe_domain()
4942 its = list_first_entry(&its_nodes, struct its_node, entry); in its_init_vpe_domain()
4948 pr_err("ITS: Can't allocate GICv4 proxy device array\n"); in its_init_vpe_domain()
4953 devid = GENMASK(device_ids(its) - 1, 0); in its_init_vpe_domain()
4954 vpe_proxy.dev = its_create_device(its, devid, entries, false); in its_init_vpe_domain()
4957 pr_err("ITS: Can't allocate GICv4 proxy device\n"); in its_init_vpe_domain()
4965 pr_info("ITS: Allocated DevID %x as GICv4 proxy device (%d slots)\n", in its_init_vpe_domain()
4985 pr_err("ITS@%pa: No ITSList entry available!\n", in its_compute_its_list_map()
5001 pr_err("ITS@%pa: Duplicate ITSList entry %d\n", in its_compute_its_list_map()
5012 struct its_node *its; in its_probe_one() local
5022 pr_warn("ITS@%pa: Unable to map ITS registers\n", &res->start); in its_probe_one()
5028 pr_warn("ITS@%pa: No ITS detected, giving up\n", &res->start); in its_probe_one()
5035 pr_warn("ITS@%pa: Failed to quiesce, giving up\n", &res->start); in its_probe_one()
5039 pr_info("ITS %pR\n", res); in its_probe_one()
5041 its = kzalloc(sizeof(*its), GFP_KERNEL); in its_probe_one()
5042 if (!its) { in its_probe_one()
5047 raw_spin_lock_init(&its->lock); in its_probe_one()
5048 mutex_init(&its->dev_alloc_lock); in its_probe_one()
5049 INIT_LIST_HEAD(&its->entry); in its_probe_one()
5050 INIT_LIST_HEAD(&its->its_device_list); in its_probe_one()
5052 its->typer = typer; in its_probe_one()
5053 its->base = its_base; in its_probe_one()
5054 its->phys_base = res->start; in its_probe_one()
5055 if (is_v4(its)) { in its_probe_one()
5061 its->list_nr = err; in its_probe_one()
5063 pr_info("ITS@%pa: Using ITS number %d\n", in its_probe_one()
5066 pr_info("ITS@%pa: Single VMOVP capable\n", &res->start); in its_probe_one()
5069 if (is_v4_1(its)) { in its_probe_one()
5072 its->sgir_base = ioremap(res->start + SZ_128K, SZ_64K); in its_probe_one()
5073 if (!its->sgir_base) { in its_probe_one()
5078 its->mpidr = readl_relaxed(its_base + GITS_MPIDR); in its_probe_one()
5080 pr_info("ITS@%pa: Using GICv4.1 mode %08x %08x\n", in its_probe_one()
5081 &res->start, its->mpidr, svpet); in its_probe_one()
5085 its->numa_node = numa_node; in its_probe_one()
5090 page = alloc_pages_node(its->numa_node, gfp_flags, in its_probe_one()
5096 its->cmd_base = (void *)page_address(page); in its_probe_one()
5097 its->cmd_write = its->cmd_base; in its_probe_one()
5098 its->fwnode_handle = handle; in its_probe_one()
5099 its->get_msi_base = its_irq_get_msi_base; in its_probe_one()
5100 its->msi_domain_flags = IRQ_DOMAIN_FLAG_MSI_REMAP; in its_probe_one()
5102 its_enable_quirks(its); in its_probe_one()
5104 err = its_alloc_tables(its); in its_probe_one()
5108 err = its_alloc_collections(its); in its_probe_one()
5112 baser = (virt_to_phys(its->cmd_base) | in its_probe_one()
5118 gits_write_cbaser(baser, its->base + GITS_CBASER); in its_probe_one()
5119 tmp = gits_read_cbaser(its->base + GITS_CBASER); in its_probe_one()
5137 gits_write_cbaser(baser, its->base + GITS_CBASER); in its_probe_one()
5139 pr_info("ITS: using cache flushing for cmd queue\n"); in its_probe_one()
5140 its->flags |= ITS_FLAGS_CMDQ_NEEDS_FLUSHING; in its_probe_one()
5143 gits_write_cwriter(0, its->base + GITS_CWRITER); in its_probe_one()
5144 ctlr = readl_relaxed(its->base + GITS_CTLR); in its_probe_one()
5146 if (is_v4(its)) in its_probe_one()
5148 writel_relaxed(ctlr, its->base + GITS_CTLR); in its_probe_one()
5150 err = its_init_domain(handle, its); in its_probe_one()
5155 list_add(&its->entry, &its_nodes); in its_probe_one()
5161 its_free_tables(its); in its_probe_one()
5163 free_pages((unsigned long)its->cmd_base, get_order(ITS_CMD_QUEUE_SZ)); in its_probe_one()
5165 if (its->sgir_base) in its_probe_one()
5166 iounmap(its->sgir_base); in its_probe_one()
5168 kfree(its); in its_probe_one()
5171 pr_err("ITS@%pa: failed probing (%d)\n", &res->start, err); in its_probe_one()
5265 { .compatible = "arm,gic-v3-its", },
5279 pr_warn("%pOF: no msi-controller property, ITS ignored\n", in its_of_probe()
5302 /* GIC ITS ID */
5337 pr_err("SRAT: Invalid header length %d in ITS affinity\n", in gic_acpi_parse_srat_its()
5350 pr_err("SRAT: Invalid NUMA node %d in ITS affinity\n", node); in gic_acpi_parse_srat_its()
5357 pr_info("SRAT: PXM %d -> ITS %d -> Node %d\n", in gic_acpi_parse_srat_its()
5387 /* free the its_srat_maps after ITS probing */
5414 pr_err("ITS@%pa: Unable to allocate GICv3 ITS domain token\n", in gic_acpi_parse_madt_its()
5422 pr_err("ITS@%pa: Unable to register GICv3 ITS domain token (ITS ID %d) to IORT\n", in gic_acpi_parse_madt_its()
5453 struct its_node *its; in its_init() local
5468 pr_warn("ITS: No ITS available, not enabling LPIs\n"); in its_init()
5476 list_for_each_entry(its, &its_nodes, entry) { in its_init()
5477 has_v4 |= is_v4(its); in its_init()
5478 has_v4_1 |= is_v4_1(its); in its_init()
5496 pr_err("ITS: Disabling GICv4 support\n"); in its_init()