Lines Matching +full:0 +full:x720
34 #define SII902X_TPI_VIDEO_DATA 0x0
36 #define SII902X_TPI_PIXEL_REPETITION 0x8
41 #define SII902X_TPI_AVI_PIXEL_REP_NONE 0
42 #define SII902X_TPI_CLK_RATIO_HALF (0 << 6)
47 #define SII902X_TPI_AVI_IN_FORMAT 0x9
52 #define SII902X_TPI_AVI_INPUT_RANGE_AUTO (0 << 2)
53 #define SII902X_TPI_AVI_INPUT_COLORSPACE_BLACK (3 << 0)
54 #define SII902X_TPI_AVI_INPUT_COLORSPACE_YUV422 (2 << 0)
55 #define SII902X_TPI_AVI_INPUT_COLORSPACE_YUV444 (1 << 0)
56 #define SII902X_TPI_AVI_INPUT_COLORSPACE_RGB (0 << 0)
58 #define SII902X_TPI_AVI_INFOFRAME 0x0c
60 #define SII902X_SYS_CTRL_DATA 0x1a
65 #define SII902X_SYS_CTRL_OUTPUT_MODE BIT(0)
67 #define SII902X_SYS_CTRL_OUTPUT_DVI 0
69 #define SII902X_REG_CHIPID(n) (0x1b + (n))
71 #define SII902X_PWR_STATE_CTRL 0x1e
72 #define SII902X_AVI_POWER_STATE_MSK GENMASK(1, 0)
76 #define SII902X_TPI_I2S_ENABLE_MAPPING_REG 0x1f
77 #define SII902X_TPI_I2S_CONFIG_FIFO0 (0 << 0)
78 #define SII902X_TPI_I2S_CONFIG_FIFO1 (1 << 0)
79 #define SII902X_TPI_I2S_CONFIG_FIFO2 (2 << 0)
80 #define SII902X_TPI_I2S_CONFIG_FIFO3 (3 << 0)
83 #define SII902X_TPI_I2S_SELECT_SD0 (0 << 4)
89 #define SII902X_TPI_I2S_INPUT_CONFIG_REG 0x20
90 #define SII902X_TPI_I2S_FIRST_BIT_SHIFT_YES (0 << 0)
91 #define SII902X_TPI_I2S_FIRST_BIT_SHIFT_NO (1 << 0)
92 #define SII902X_TPI_I2S_SD_DIRECTION_MSB_FIRST (0 << 1)
94 #define SII902X_TPI_I2S_SD_JUSTIFY_LEFT (0 << 2)
96 #define SII902X_TPI_I2S_WS_POLARITY_LOW (0 << 3)
98 #define SII902X_TPI_I2S_MCLK_MULTIPLIER_128 (0 << 4)
106 #define SII902X_TPI_I2S_SCK_EDGE_FALLING (0 << 7)
109 #define SII902X_TPI_I2S_STRM_HDR_BASE 0x21
112 #define SII902X_TPI_AUDIO_CONFIG_BYTE2_REG 0x26
113 #define SII902X_TPI_AUDIO_CODING_STREAM_HEADER (0 << 0)
114 #define SII902X_TPI_AUDIO_CODING_PCM (1 << 0)
115 #define SII902X_TPI_AUDIO_CODING_AC3 (2 << 0)
116 #define SII902X_TPI_AUDIO_CODING_MPEG1 (3 << 0)
117 #define SII902X_TPI_AUDIO_CODING_MP3 (4 << 0)
118 #define SII902X_TPI_AUDIO_CODING_MPEG2 (5 << 0)
119 #define SII902X_TPI_AUDIO_CODING_AAC (6 << 0)
120 #define SII902X_TPI_AUDIO_CODING_DTS (7 << 0)
121 #define SII902X_TPI_AUDIO_CODING_ATRAC (8 << 0)
122 #define SII902X_TPI_AUDIO_MUTE_DISABLE (0 << 4)
124 #define SII902X_TPI_AUDIO_LAYOUT_2_CHANNELS (0 << 5)
126 #define SII902X_TPI_AUDIO_INTERFACE_DISABLE (0 << 6)
130 #define SII902X_TPI_AUDIO_CONFIG_BYTE3_REG 0x27
131 #define SII902X_TPI_AUDIO_FREQ_STREAM (0 << 3)
139 #define SII902X_TPI_AUDIO_SAMPLE_SIZE_STREAM (0 << 6)
144 #define SII902X_TPI_AUDIO_CONFIG_BYTE4_REG 0x28
146 #define SII902X_INT_ENABLE 0x3c
147 #define SII902X_INT_STATUS 0x3d
148 #define SII902X_HOTPLUG_EVENT BIT(0)
151 #define SII902X_TPI_SYNC_GEN_CTRL 0x60
152 #define SII902X_TPI_SYNC_POLAR_DETECT 0x61
153 #define SII902X_TPI_HBIT_TO_HSYNC 0x62
154 #define SII902X_EMBEDDED_SYNC_EXTRACTION_REG 0x63
157 #define SII902X_REG_TPI_RQB 0xc7
160 #define SII902X_IND_SET_PAGE 0xbc
161 #define SII902X_IND_OFFSET 0xbd
162 #define SII902X_IND_VALUE 0xbe
164 #define SII902X_TPI_MISC_INFOFRAME_BASE 0xbf
165 #define SII902X_TPI_MISC_INFOFRAME_END 0xde
210 if (ret < 0) in sii902x_read_unlocked()
214 return 0; in sii902x_read_unlocked()
262 gpiod_set_value(sii902x->reset_gpio, 0); in sii902x_reset()
291 /* 4 - 1280x720@60Hz 16:9 */
292 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
293 1430, 1650, 0, 720, 725, 730, 750, 0,
298 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
303 2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
309 2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
312 /* 19 - 1280x720@50Hz 16:9 */
313 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720,
314 1760, 1980, 0, 720, 725, 730, 750, 0,
317 /* 0x10 - 1024x768@60Hz */
319 1184, 1344, 0, 768, 771, 777, 806, 0,
323 796, 864, 0, 576, 581, 586, 625, 0,
328 798, 858, 0, 480, 489, 495, 525, 0,
338 int num = 0, ret = 0, i; in sii902x_get_modes()
343 edid = drm_get_edid(connector, sii902x->i2cmux->adapter[0]); in sii902x_get_modes()
352 for (i = 0; i < ARRAY_SIZE(sii902x_default_modes); i++) { in sii902x_get_modes()
422 SII902X_AVI_POWER_STATE_D(0)); in sii902x_bridge_enable()
424 SII902X_SYS_CTRL_PWR_DWN, 0); in sii902x_bridge_enable()
460 0x20, 0x20); in sii902x_set_embedded_sync()
467 0x80, 0x00); in sii902x_set_embedded_sync()
469 SII902X_EMBEDDED_SYNC_EXTRACTION_REG, 0x00); in sii902x_set_embedded_sync()
471 0x80, 0x80); in sii902x_set_embedded_sync()
474 data[0] = vm.hfront_porch & 0xff; in sii902x_set_embedded_sync()
475 data[1] = (vm.hfront_porch >> 8) & 0x03; in sii902x_set_embedded_sync()
477 data[2] = (sii902x->mode.vtotal >> 1) & 0xff; in sii902x_set_embedded_sync()
478 data[3] = ((sii902x->mode.vtotal >> 1) >> 8) & 0x1f; in sii902x_set_embedded_sync()
480 data[2] = 0; in sii902x_set_embedded_sync()
481 data[3] = 0; in sii902x_set_embedded_sync()
483 data[4] = vm.hsync_len & 0xff; in sii902x_set_embedded_sync()
484 data[5] = (vm.hsync_len >> 8) & 0x03; in sii902x_set_embedded_sync()
490 0x80, 0x80); in sii902x_set_embedded_sync()
493 0x40, 0x40); in sii902x_set_embedded_sync()
547 buf[0] = pixel_clock_10kHz & 0xff; in sii902x_bridge_mode_set()
549 buf[2] = vrefresh & 0xff; in sii902x_bridge_mode_set()
602 if (ret < 0) { in sii902x_bridge_mode_set()
608 if (ret < 0) { in sii902x_bridge_mode_set()
650 if (sii902x->i2c->irq > 0) in sii902x_bridge_attach()
657 return 0; in sii902x_bridge_attach()
688 u8 i, nearest = 0; in sii902x_select_mclk_div()
690 for (i = 0; i < ARRAY_SIZE(sii902x_mclk_div_table); i++) { in sii902x_select_mclk_div()
698 if (d == 0) in sii902x_select_mclk_div()
729 u8 config_byte3_reg = 0; in sii902x_audio_hw_params()
788 for (i = 0; i < ARRAY_SIZE(sii902x_sample_freq); i++) { in sii902x_audio_hw_params()
815 if (ret < 0) in sii902x_audio_hw_params()
823 for (i = 0; i < ARRAY_SIZE(sii902x->audio.i2s_fifo_sequence) && in sii902x_audio_hw_params()
843 if (ret < 0) { in sii902x_audio_hw_params()
856 /* Decode Level 0 Packets */ in sii902x_audio_hw_params()
857 ret = regmap_write(sii902x->regmap, SII902X_IND_SET_PAGE, 0x02); in sii902x_audio_hw_params()
861 ret = regmap_write(sii902x->regmap, SII902X_IND_OFFSET, 0x24); in sii902x_audio_hw_params()
865 ret = regmap_write(sii902x->regmap, SII902X_IND_VALUE, 0x02); in sii902x_audio_hw_params()
907 return 0; in sii902x_audio_mute()
922 return 0; in sii902x_audio_get_eld()
932 if (ret < 0) in sii902x_audio_get_dai_id()
937 * Return expected DAI index 0. in sii902x_audio_get_dai_id()
940 return 0; in sii902x_audio_get_dai_id()
972 .spdif = 0, in sii902x_audio_codec_init()
973 .max_i2s_channels = 0, in sii902x_audio_codec_init()
981 return 0; in sii902x_audio_codec_init()
991 "%s: No \"sil,i2s-data-lanes\", use default <0>\n", in sii902x_audio_codec_init()
994 lanes[0] = 0; in sii902x_audio_codec_init()
995 } else if (num_lanes < 0) { in sii902x_audio_codec_init()
1003 for (i = 0; i < num_lanes; i++) in sii902x_audio_codec_init()
1022 { .range_min = 0, .range_max = 0xff },
1042 unsigned int status = 0; in sii902x_interrupt()
1065 * in this driver, we need to make sure that we only touch 0x1A[2:1] from
1110 * in this driver, we need to make sure that we only touch 0x1A[2:1] from
1148 SII902X_SYS_CTRL_DDC_BUS_GRTD, 0); in sii902x_i2c_bypass_deselect()
1169 return 0; in sii902x_i2c_bypass_deselect()
1181 unsigned int status = 0; in sii902x_init()
1187 ret = regmap_write(sii902x->regmap, SII902X_REG_TPI_RQB, 0x0); in sii902x_init()
1193 ret = regmap_bulk_read(sii902x->regmap, SII902X_REG_CHIPID(0), in sii902x_init()
1200 if (chipid[0] != 0xb0) { in sii902x_init()
1201 dev_err(dev, "Invalid chipid: %02x (expecting 0xb0)\n", in sii902x_init()
1202 chipid[0]); in sii902x_init()
1210 if (sii902x->i2c->irq > 0) { in sii902x_init()
1233 1, 0, I2C_MUX_GATE, in sii902x_init()
1240 return i2c_mux_add_adapter(sii902x->i2cmux, 0, 0, 0); in sii902x_init()
1287 if (ret < 0) { in sii902x_probe()
1308 sii902x->supplies[0].supply = "iovcc"; in sii902x_probe()
1312 if (ret < 0) in sii902x_probe()
1317 if (ret < 0) { in sii902x_probe()
1323 if (ret < 0) { in sii902x_probe()
1342 return 0; in sii902x_remove()
1352 { "sii9022", 0 },