clk/rockchip/clk-rv1126.c

339 	GATE(CLK_WIFI_OSC0, "clk_wifi_osc0", "xin24m", 0,
344 	GATE(PCLK_PMU, "pclk_pmu", "pclk_pdpmu", CLK_IGNORE_UNUSED,
347 	GATE(PCLK_UART1, "pclk_uart1", "pclk_pdpmu", 0,
356 	GATE(SCLK_UART1, "sclk_uart1", "sclk_uart1_mux", 0,
359 	GATE(PCLK_I2C0, "pclk_i2c0", "pclk_pdpmu", 0,
364 	GATE(PCLK_I2C2, "pclk_i2c2", "pclk_pdpmu", 0,
370 	GATE(CLK_CAPTURE_PWM0, "clk_capture_pwm0", "xin24m", 0,
372 	GATE(PCLK_PWM0, "pclk_pwm0", "pclk_pdpmu", 0,
377 	GATE(CLK_CAPTURE_PWM1, "clk_capture_pwm1", "xin24m", 0,
379 	GATE(PCLK_PWM1, "pclk_pwm1", "pclk_pdpmu", 0,
385 	GATE(PCLK_SPI0, "pclk_spi0", "pclk_pdpmu", 0,
391 	GATE(PCLK_GPIO0, "pclk_gpio0", "pclk_pdpmu", 0,
397 	GATE(PCLK_PMUPVTM, "pclk_pmupvtm", "pclk_pdpmu", 0,
399 	GATE(CLK_PMUPVTM, "clk_pmupvtm", "xin24m", 0,
401 	GATE(CLK_CORE_PMUPVTM, "clk_core_pmupvtm", "xin24m", 0,
407 	GATE(0, "xin_osc0_usbphyref_otg", "xin24m", 0,
409 	GATE(0, "xin_osc0_usbphyref_host", "xin24m", 0,
421 	GATE(0, "xin_osc0_mipiphyref", "xin24m", 0,
427 	GATE(CLK_PMU, "clk_pmu", "xin24m", CLK_IGNORE_UNUSED,
430 	GATE(PCLK_PMUSGRF, "pclk_pmusgrf", "pclk_pdpmu", CLK_IGNORE_UNUSED,
432 	GATE(PCLK_PMUGRF, "pclk_pmugrf", "pclk_pdpmu", CLK_IGNORE_UNUSED,
434 	GATE(PCLK_PMUCRU, "pclk_pmucru", "pclk_pdpmu", CLK_IGNORE_UNUSED,
436 	GATE(PCLK_CHIPVEROTP, "pclk_chipverotp", "pclk_pdpmu", CLK_IGNORE_UNUSED,
438 	GATE(PCLK_PDPMU_NIU, "pclk_pdpmu_niu", "pclk_pdpmu", CLK_IGNORE_UNUSED,
441 	GATE(PCLK_SCRKEYGEN, "pclk_scrkeygen", "pclk_pdpmu", 0,
461 	GATE(CLK_CORE_CPUPVTM, "clk_core_cpupvtm", "armclk", 0,
463 	GATE(PCLK_CPUPVTM, "pclk_cpupvtm", "pclk_dbg", 0,
465 	GATE(CLK_CPUPVTM, "clk_cpupvtm", "xin24m", 0,
478 	GATE(ACLK_PDBUS, "aclk_pdbus", "aclk_pdbus_pre", CLK_IS_CRITICAL,
483 	GATE(HCLK_PDBUS, "hclk_pdbus", "hclk_pdbus_pre", CLK_IS_CRITICAL,
488 	GATE(PCLK_PDBUS, "pclk_pdbus", "pclk_pdbus_pre", CLK_IS_CRITICAL,
492 	GATE(ACLK_DCF, "aclk_dcf", "hclk_pdbus", CLK_IGNORE_UNUSED,
494 	GATE(PCLK_DCF, "pclk_dcf", "pclk_pdbus", CLK_IGNORE_UNUSED,
496 	GATE(PCLK_WDT, "pclk_wdt", "pclk_pdbus", 0,
498 	GATE(PCLK_MAILBOX, "pclk_mailbox", "pclk_pdbus", 0,
504 	GATE(0, "clk_scr1_niu", "clk_scr1", CLK_IGNORE_UNUSED,
506 	GATE(CLK_SCR1_CORE, "clk_scr1_core", "clk_scr1", 0,
508 	GATE(CLK_SCR1_RTC, "clk_scr1_rtc", "xin24m", 0,
510 	GATE(CLK_SCR1_JTAG, "clk_scr1_jtag", "clk_scr1_jtag_io", 0,
513 	GATE(PCLK_UART0, "pclk_uart0", "pclk_pdbus", 0,
522 	GATE(SCLK_UART0, "sclk_uart0", "sclk_uart0_mux", 0,
524 	GATE(PCLK_UART2, "pclk_uart2", "pclk_pdbus", 0,
533 	GATE(SCLK_UART2, "sclk_uart2", "sclk_uart2_mux", 0,
535 	GATE(PCLK_UART3, "pclk_uart3", "pclk_pdbus", 0,
544 	GATE(SCLK_UART3, "sclk_uart3", "sclk_uart3_mux", 0,
546 	GATE(PCLK_UART4, "pclk_uart4", "pclk_pdbus", 0,
555 	GATE(SCLK_UART4, "sclk_uart4", "sclk_uart4_mux", 0,
557 	GATE(PCLK_UART5, "pclk_uart5", "pclk_pdbus", 0,
566 	GATE(SCLK_UART5, "sclk_uart5", "sclk_uart5_mux", 0,
569 	GATE(PCLK_I2C1, "pclk_i2c1", "pclk_pdbus", 0,
574 	GATE(PCLK_I2C3, "pclk_i2c3", "pclk_pdbus", 0,
579 	GATE(PCLK_I2C4, "pclk_i2c4", "pclk_pdbus", 0,
584 	GATE(PCLK_I2C5, "pclk_i2c5", "pclk_pdbus", 0,
590 	GATE(PCLK_SPI1, "pclk_spi1", "pclk_pdbus", 0,
596 	GATE(CLK_CAPTURE_PWM2, "clk_capture_pwm2", "xin24m", 0,
598 	GATE(PCLK_PWM2, "pclk_pwm2", "pclk_pdbus", 0,
604 	GATE(PCLK_GPIO1, "pclk_gpio1", "pclk_pdbus", 0,
609 	GATE(PCLK_GPIO2, "pclk_gpio2", "pclk_pdbus", 0,
614 	GATE(PCLK_GPIO3, "pclk_gpio3", "pclk_pdbus", 0,
619 	GATE(PCLK_GPIO4, "pclk_gpio4", "pclk_pdbus", 0,
625 	GATE(PCLK_SARADC, "pclk_saradc", "pclk_pdbus", 0,
631 	GATE(PCLK_TIMER, "pclk_timer", "pclk_pdbus", 0,
633 	GATE(CLK_TIMER0, "clk_timer0", "xin24m", 0,
635 	GATE(CLK_TIMER1, "clk_timer1", "xin24m", 0,
637 	GATE(CLK_TIMER2, "clk_timer2", "xin24m", 0,
639 	GATE(CLK_TIMER3, "clk_timer3", "xin24m", 0,
641 	GATE(CLK_TIMER4, "clk_timer4", "xin24m", 0,
643 	GATE(CLK_TIMER5, "clk_timer5", "xin24m", 0,
646 	GATE(ACLK_SPINLOCK, "aclk_spinlock", "hclk_pdbus", 0,
649 	GATE(ACLK_DECOM, "aclk_decom", "aclk_pdbus", 0,
651 	GATE(PCLK_DECOM, "pclk_decom", "pclk_pdbus", 0,
657 	GATE(PCLK_CAN, "pclk_can", "pclk_pdbus", 0,
666 	GATE(PCLK_NPU_TSADC, "pclk_npu_tsadc", "pclk_pdbus", 0,
671 	GATE(CLK_NPU_TSADCPHY, "clk_npu_tsadcphy", "clk_npu_tsadc", 0,
673 	GATE(PCLK_CPU_TSADC, "pclk_cpu_tsadc", "pclk_pdbus", 0,
678 	GATE(CLK_CPU_TSADCPHY, "clk_cpu_tsadcphy", "clk_cpu_tsadc", 0,
691 	GATE(ACLK_CRYPTO, "aclk_crypto", "aclk_pdcrypto", 0,
693 	GATE(HCLK_CRYPTO, "hclk_crypto", "hclk_pdcrypto", 0,
710 	GATE(HCLK_I2S0, "hclk_i2s0", "hclk_pdaudio", 0,
719 	GATE(MCLK_I2S0_TX, "mclk_i2s0_tx", "mclk_i2s0_tx_mux", 0,
728 	GATE(MCLK_I2S0_RX, "mclk_i2s0_rx", "mclk_i2s0_rx_mux", 0,
737 	GATE(HCLK_I2S1, "hclk_i2s1", "hclk_pdaudio", 0,
746 	GATE(MCLK_I2S1, "mclk_i2s1", "mclk_i2s1_mux", 0,
751 	GATE(HCLK_I2S2, "hclk_i2s2", "hclk_pdaudio", 0,
760 	GATE(MCLK_I2S2, "mclk_i2s2", "mclk_i2s2_mux", 0,
766 	GATE(HCLK_PDM, "hclk_pdm", "hclk_pdaudio", 0,
772 	GATE(HCLK_AUDPWM, "hclk_audpwm", "hclk_pdaudio", 0,
781 	GATE(SCLK_AUDPWM, "sclk_audpwm", "mclk_audpwm_mux", 0,
784 	GATE(PCLK_ACDCDIG, "pclk_acdcdig", "hclk_pdaudio", 0,
786 	GATE(CLK_ACDCDIG_ADC, "clk_acdcdig_adc", "mclk_i2s0_rx", 0,
788 	GATE(CLK_ACDCDIG_DAC, "clk_acdcdig_dac", "mclk_i2s0_tx", 0,
804 	GATE(ACLK_VENC, "aclk_venc", "aclk_pdvepu", 0,
806 	GATE(HCLK_VENC, "hclk_venc", "hclk_pdvepu", 0,
823 	GATE(0, "aclk_pdvdec_niu", "aclk_pdvdec", CLK_IS_CRITICAL,
825 	GATE(0, "hclk_pdvdec_niu", "hclk_pdvdec", CLK_IS_CRITICAL,
833 	GATE(0, "aclk_pdjpeg_niu", "aclk_pdjpeg", CLK_IS_CRITICAL,
835 	GATE(0, "hclk_pdjpeg_niu", "hclk_pdjpeg", CLK_IS_CRITICAL,
844 	GATE(0, "aclk_pdvdec_niu", "aclk_pdvdec", CLK_IGNORE_UNUSED,
846 	GATE(0, "hclk_pdvdec_niu", "hclk_pdvdec", CLK_IGNORE_UNUSED,
854 	GATE(0, "aclk_pdjpeg_niu", "aclk_pdjpeg", CLK_IGNORE_UNUSED,
856 	GATE(0, "hclk_pdjpeg_niu", "hclk_pdjpeg", CLK_IGNORE_UNUSED,
859 	GATE(ACLK_VDEC, "aclk_vdec", "aclk_pdvdec", 0,
861 	GATE(HCLK_VDEC, "hclk_vdec", "hclk_pdvdec", 0,
872 	GATE(ACLK_JPEG, "aclk_jpeg", "aclk_pdjpeg", 0,
874 	GATE(HCLK_JPEG, "hclk_jpeg", "hclk_pdjpeg", 0,
890 	GATE(ACLK_RGA, "aclk_rga", "aclk_pdvo", 0,
892 	GATE(HCLK_RGA, "hclk_rga", "hclk_pdvo", 0,
897 	GATE(ACLK_VOP, "aclk_vop", "aclk_pdvo", 0,
899 	GATE(HCLK_VOP, "hclk_vop", "hclk_pdvo", 0,
908 	GATE(DCLK_VOP, "dclk_vop", "dclk_vop_mux", 0,
910 	GATE(PCLK_DSIHOST, "pclk_dsihost", "pclk_pdvo", 0,
912 	GATE(ACLK_IEP, "aclk_iep", "aclk_pdvo", 0,
914 	GATE(HCLK_IEP, "hclk_iep", "hclk_pdvo", 0,
939 	GATE(ACLK_ISP, "aclk_isp", "aclk_pdvi", 0,
941 	GATE(HCLK_ISP, "hclk_isp", "hclk_pdvi", 0,
952 	GATE(ACLK_CIF, "aclk_cif", "aclk_pdvi", 0,
954 	GATE(HCLK_CIF, "hclk_cif", "hclk_pdvi", 0,
966 	GATE(CLK_CIF_OUT, "clk_cif_out2io", "clk_cif_out2io_mux", 0,
975 	GATE(CLK_MIPICSI_OUT, "clk_mipicsi_out2io", "clk_mipicsi_out2io_mux", 0,
977 	GATE(PCLK_CSIHOST, "pclk_csihost", "pclk_pdvi", 0,
979 	GATE(ACLK_CIFLITE, "aclk_ciflite", "aclk_pdvi", 0,
981 	GATE(HCLK_CIFLITE, "hclk_ciflite", "hclk_pdvi", 0,
1003 	GATE(ACLK_ISPP, "aclk_ispp", "aclk_pdispp", 0,
1005 	GATE(HCLK_ISPP, "hclk_ispp", "hclk_pdispp", 0,
1028 	GATE(HCLK_PDSDMMC, "hclk_pdsdmmc", "hclk_pdphp", 0,
1030 	GATE(HCLK_SDMMC, "hclk_sdmmc", "hclk_pdsdmmc", 0,
1039 	GATE(HCLK_PDSDIO, "hclk_pdsdio", "hclk_pdphp", 0,
1041 	GATE(HCLK_SDIO, "hclk_sdio", "hclk_pdsdio", 0,
1050 	GATE(HCLK_PDNVM, "hclk_pdnvm", "hclk_pdphp", 0,
1052 	GATE(HCLK_EMMC, "hclk_emmc", "hclk_pdnvm", 0,
1057 	GATE(HCLK_NANDC, "hclk_nandc", "hclk_pdnvm", 0,
1062 	GATE(HCLK_SFC, "hclk_sfc", "hclk_pdnvm", 0,
1064 	GATE(HCLK_SFCXIP, "hclk_sfcxip", "hclk_pdnvm", 0,
1073 	GATE(ACLK_PDUSB, "aclk_pdusb", "aclk_pdphp", 0,
1075 	GATE(HCLK_PDUSB, "hclk_pdusb", "hclk_pdphp", 0,
1077 	GATE(HCLK_USBHOST, "hclk_usbhost", "hclk_pdusb", 0,
1079 	GATE(HCLK_USBHOST_ARB, "hclk_usbhost_arb", "hclk_pdusb", 0,
1090 	GATE(ACLK_USBOTG, "aclk_usbotg", "aclk_pdusb", 0,
1092 	GATE(CLK_USBOTG_REF, "clk_usbotg_ref", "xin24m", 0,
1095 	GATE(ACLK_PDGMAC, "aclk_pdgmac", "aclk_pdphp", 0,
1100 	GATE(ACLK_GMAC, "aclk_gmac", "aclk_pdgmac", 0,
1102 	GATE(PCLK_GMAC, "pclk_gmac", "pclk_pdgmac", 0,
1108 	GATE(CLK_GMAC_RGMII_M0, "clk_gmac_rgmii_m0", "clk_gmac_rgmii_clkin_m0", 0,
1112 	GATE(CLK_GMAC_RGMII_M1, "clk_gmac_rgmii_m1", "clk_gmac_rgmii_clkin_m1", 0,
1119 	GATE(CLK_GMAC_REF, "clk_gmac_ref", "clk_gmac_src", 0,
1122 	GATE(CLK_GMAC_TX_SRC, "clk_gmac_tx_src", "clk_gmac_src", 0,
1128 	GATE(CLK_GMAC_RX_SRC, "clk_gmac_rx_src", "clk_gmac_src", 0,
1137 	GATE(CLK_GMAC_PTPREF, "clk_gmac_ptpref", "xin24m", 0,
1162 	GATE(ACLK_NPU, "aclk_npu", "aclk_pdnpu", 0,
1164 	GATE(HCLK_NPU, "hclk_npu", "hclk_pdnpu", 0,
1174 	GATE(CLK_CORE_NPUPVTM, "clk_core_npupvtm", "clk_core_npu", CLK_IGNORE_UNUSED,
1176 	GATE(CLK_NPUPVTM, "clk_npupvtm", "xin24m", 0,
1178 	GATE(PCLK_NPUPVTM, "pclk_npupvtm", "pclk_pdnpu", CLK_IGNORE_UNUSED,
1184 	GATE(PCLK_PDTOP, "pclk_pdtop", "pclk_pdbus", CLK_IS_CRITICAL,
1186 	GATE(PCLK_DSIPHY, "pclk_dsiphy", "pclk_pdtop", 0,
1188 	GATE(PCLK_CSIPHY0, "pclk_csiphy0", "pclk_pdtop", 0,
1190 	GATE(PCLK_CSIPHY1, "pclk_csiphy1", "pclk_pdtop", 0,
1192 	GATE(PCLK_USBPHY_HOST, "pclk_usbphy_host", "pclk_pdtop", 0,
1194 	GATE(PCLK_USBPHY_OTG, "pclk_usbphy_otg", "pclk_pdtop", 0,
1205 	GATE(0, "pclk_dbg_daplite", "pclk_dbg", CLK_IGNORE_UNUSED,
1207 	GATE(0, "clk_a7_jtag", "clk_jtag_ori", CLK_IGNORE_UNUSED,
1209 	GATE(0, "aclk_core_niu", "aclk_core", CLK_IGNORE_UNUSED,
1211 	GATE(0, "pclk_dbg_niu", "pclk_dbg", CLK_IGNORE_UNUSED,
1217 	GATE(0, "aclk_pdbus_hold_niu1", "aclk_pdbus", CLK_IGNORE_UNUSED,
1219 	GATE(0, "aclk_pdbus_niu1", "aclk_pdbus", CLK_IGNORE_UNUSED,
1221 	GATE(0, "hclk_pdbus_niu1", "hclk_pdbus", CLK_IGNORE_UNUSED,
1223 	GATE(0, "pclk_pdbus_niu1", "pclk_pdbus", CLK_IGNORE_UNUSED,
1225 	GATE(0, "aclk_pdbus_niu2", "aclk_pdbus", CLK_IGNORE_UNUSED,
1227 	GATE(0, "hclk_pdbus_niu2", "hclk_pdbus", CLK_IGNORE_UNUSED,
1229 	GATE(0, "aclk_pdbus_niu3", "aclk_pdbus", CLK_IGNORE_UNUSED,
1231 	GATE(0, "hclk_pdbus_niu3", "hclk_pdbus", CLK_IGNORE_UNUSED,
1233 	GATE(0, "pclk_grf", "pclk_pdbus", CLK_IGNORE_UNUSED,
1235 	GATE(0, "pclk_sgrf", "pclk_pdbus", CLK_IGNORE_UNUSED,
1237 	GATE(0, "aclk_sysram", "hclk_pdbus", CLK_IGNORE_UNUSED,
1239 	GATE(0, "pclk_intmux", "pclk_pdbus", CLK_IGNORE_UNUSED,
1246 	GATE(0, "aclk_pdcrypto_niu", "aclk_pdcrypto", CLK_IGNORE_UNUSED,
1248 	GATE(0, "hclk_pdcrypto_niu", "hclk_pdcrypto", CLK_IGNORE_UNUSED,
1255 	GATE(0, "hclk_pdaudio_niu", "hclk_pdaudio", CLK_IGNORE_UNUSED,
1257 	GATE(0, "pclk_pdaudio_niu", "hclk_pdaudio", CLK_IGNORE_UNUSED,
1264 	GATE(0, "aclk_pdvepu_niu", "aclk_pdvepu", CLK_IGNORE_UNUSED,
1266 	GATE(0, "hclk_pdvepu_niu", "hclk_pdvepu", CLK_IGNORE_UNUSED,
1273 	GATE(0, "aclk_pdvo_niu", "aclk_pdvo", CLK_IGNORE_UNUSED,
1275 	GATE(0, "hclk_pdvo_niu", "hclk_pdvo", CLK_IGNORE_UNUSED,
1277 	GATE(0, "pclk_pdvo_niu", "pclk_pdvo", CLK_IGNORE_UNUSED,
1284 	GATE(0, "aclk_pdvi_niu", "aclk_pdvi", CLK_IGNORE_UNUSED,
1286 	GATE(0, "hclk_pdvi_niu", "hclk_pdvi", CLK_IGNORE_UNUSED,
1288 	GATE(0, "pclk_pdvi_niu", "pclk_pdvi", CLK_IGNORE_UNUSED,
1294 	GATE(0, "aclk_pdispp_niu", "aclk_pdispp", CLK_IGNORE_UNUSED,
1296 	GATE(0, "hclk_pdispp_niu", "hclk_pdispp", CLK_IGNORE_UNUSED,
1303 	GATE(0, "aclk_pdphpmid", "aclk_pdphp", CLK_IGNORE_UNUSED,
1305 	GATE(0, "hclk_pdphpmid", "hclk_pdphp", CLK_IGNORE_UNUSED,
1307 	GATE(0, "aclk_pdphpmid_niu", "aclk_pdphpmid", CLK_IGNORE_UNUSED,
1309 	GATE(0, "hclk_pdphpmid_niu", "hclk_pdphpmid", CLK_IGNORE_UNUSED,
1313 	GATE(0, "hclk_pdsdmmc_niu", "hclk_pdsdmmc", CLK_IGNORE_UNUSED,
1317 	GATE(0, "hclk_pdsdio_niu", "hclk_pdsdio", CLK_IGNORE_UNUSED,
1321 	GATE(0, "hclk_pdnvm_niu", "hclk_pdnvm", CLK_IGNORE_UNUSED,
1325 	GATE(0, "aclk_pdusb_niu", "aclk_pdusb", CLK_IGNORE_UNUSED,
1327 	GATE(0, "hclk_pdusb_niu", "hclk_pdusb", CLK_IGNORE_UNUSED,
1331 	GATE(0, "aclk_pdgmac_niu", "aclk_pdgmac", CLK_IGNORE_UNUSED,
1333 	GATE(0, "pclk_pdgmac_niu", "pclk_pdgmac", CLK_IGNORE_UNUSED,
1343 	GATE(PCLK_PDDDR, "pclk_pdddr", "pclk_pdddr_pre", CLK_IS_CRITICAL,
1345 	GATE(0, "pclk_ddr_msch", "pclk_pdddr", CLK_IGNORE_UNUSED,
1352 	GATE(0, "clk1x_phy", "clk_ddrphy", CLK_IGNORE_UNUSED,
1354 	GATE(0, "clk_ddr_msch", "clk_ddrphy", CLK_IGNORE_UNUSED,
1356 	GATE(0, "pclk_ddr_dfictl", "pclk_pdddr", CLK_IGNORE_UNUSED,
1358 	GATE(0, "clk_ddr_dfictl", "clk_ddrphy", CLK_IGNORE_UNUSED,
1360 	GATE(0, "pclk_ddr_standby", "pclk_pdddr", CLK_IGNORE_UNUSED,
1362 	GATE(0, "clk_ddr_standby", "clk_ddrphy", CLK_IGNORE_UNUSED,
1364 	GATE(0, "aclk_ddr_split", "clk_ddrphy", CLK_IGNORE_UNUSED,
1366 	GATE(0, "pclk_ddr_grf", "pclk_pdddr", CLK_IGNORE_UNUSED,
1368 	GATE(PCLK_DDR_MON, "pclk_ddr_mon", "pclk_pdddr", CLK_IGNORE_UNUSED,
1370 	GATE(CLK_DDR_MON, "clk_ddr_mon", "clk_ddrphy", CLK_IGNORE_UNUSED,
1372 	GATE(TMCLK_DDR_MON, "tmclk_ddr_mon", "xin24m", CLK_IGNORE_UNUSED,
1379 	GATE(0, "aclk_pdnpu_niu", "aclk_pdnpu", CLK_IGNORE_UNUSED,
1381 	GATE(0, "hclk_pdnpu_niu", "hclk_pdnpu", CLK_IGNORE_UNUSED,
1383 	GATE(0, "pclk_pdnpu_niu", "pclk_pdnpu", CLK_IGNORE_UNUSED,
1389 	GATE(0, "pclk_topniu", "pclk_pdtop", CLK_IGNORE_UNUSED,
1391 	GATE(PCLK_TOPCRU, "pclk_topcru", "pclk_pdtop", CLK_IGNORE_UNUSED,
1393 	GATE(PCLK_TOPGRF, "pclk_topgrf", "pclk_pdtop", CLK_IGNORE_UNUSED,
1395 	GATE(PCLK_CPUEMADET, "pclk_cpuemadet", "pclk_pdtop", CLK_IGNORE_UNUSED,
1397 	GATE(PCLK_DDRPHY, "pclk_ddrphy", "pclk_pdtop", CLK_IGNORE_UNUSED,