Lines Matching refs:PNAME

137 PNAME(mux_pll_p)                        = { "xin24m" };
138 PNAME(mux_24m_32k_p)                    = { "xin24m", "clk_32k" };
139 PNAME(mux_gpll_cpll_p)                  = { "gpll", "cpll" };
140 PNAME(mux_gpll_cpll_xin24m_p)           = { "gpll", "cpll", "xin24m" };
141 PNAME(mux_100m_50m_24m_p)               = { "clk_100m_src", "clk_50m_src", "xin24m" };
142 PNAME(mux_150m_100m_24m_p)              = { "clk_150m_src", "clk_100m_src", "xin24m" };
143 PNAME(mux_200m_100m_24m_p)              = { "clk_200m_src", "clk_100m_src", "xin24m" };
144 PNAME(mux_200m_100m_50m_24m_p)          = { "clk_200m_src", "clk_100m_src", "clk_50m_src", "xin24m"…
145 PNAME(mux_300m_200m_100m_24m_p)         = { "clk_300m_src", "clk_200m_src", "clk_100m_src", "xin24m…
146 PNAME(mux_339m_200m_100m_24m_p)         = { "clk_339m_src", "clk_200m_src", "clk_100m_src", "xin24m…
147 PNAME(mux_500m_200m_100m_24m_p)         = { "clk_500m_src", "clk_200m_src", "clk_100m_src", "xin24m…
148 PNAME(mux_500m_300m_100m_24m_p)         = { "clk_500m_src", "clk_300m_src", "clk_100m_src", "xin24m…
149 PNAME(mux_600m_300m_200m_24m_p)         = { "clk_600m_src", "clk_300m_src", "clk_200m_src", "xin24m…
150 PNAME(aclk_gpu_p)                       = { "aclk_gpu_root", "clk_gpu_pvtpll_src" };
151 PNAME(aclk_rkvdec_pvtmux_root_p)        = { "aclk_rkvdec_root", "clk_rkvdec_pvtpll_src" };
152 PNAME(clk_i2c2_p)                       = { "clk_200m_src", "clk_100m_src", "xin24m", "clk_32k" };
153 PNAME(clk_ref_pcie_inner_phy_p)         = { "clk_ppll_100m_src", "xin24m" };
154 PNAME(dclk_vop0_p)                      = { "dclk_vop_src0", "clk_hdmiphy_pixel_io" };
155 PNAME(mclk_i2s0_2ch_sai_src_p)          = { "clk_i2s0_2ch_src", "clk_i2s0_2ch_frac", "xin12m" };
156 PNAME(mclk_i2s1_8ch_sai_src_p)          = { "clk_i2s1_8ch_src", "clk_i2s1_8ch_frac", "xin12m" };
157 PNAME(mclk_i2s2_2ch_sai_src_p)          = { "clk_i2s2_2ch_src", "clk_i2s2_2ch_frac", "xin12m" };
158 PNAME(mclk_i2s3_8ch_sai_src_p)          = { "clk_i2s3_8ch_src", "clk_i2s3_8ch_frac", "xin12m" };
159 PNAME(mclk_sai_i2s0_p)                  = { "mclk_i2s0_2ch_sai_src", "i2s0_mclkin" };
160 PNAME(mclk_sai_i2s1_p)                  = { "mclk_i2s1_8ch_sai_src", "i2s1_mclkin" };
161 PNAME(mclk_spdif_src_p)                 = { "clk_spdif_src", "clk_spdif_frac", "xin12m" };
162 PNAME(sclk_uart0_src_p)                 = { "clk_uart0_src", "clk_uart0_frac", "xin24m" };
163 PNAME(sclk_uart1_src_p)                 = { "clk_uart1_src", "clk_uart1_frac", "xin24m" };
164 PNAME(sclk_uart2_src_p)                 = { "clk_uart2_src", "clk_uart2_frac", "xin24m" };
165 PNAME(sclk_uart3_src_p)                 = { "clk_uart3_src", "clk_uart3_frac", "xin24m" };
166 PNAME(sclk_uart4_src_p)                 = { "clk_uart4_src", "clk_uart4_frac", "xin24m" };
167 PNAME(sclk_uart5_src_p)                 = { "clk_uart5_src", "clk_uart5_frac", "xin24m" };
168 PNAME(sclk_uart6_src_p)                 = { "clk_uart6_src", "clk_uart6_frac", "xin24m" };
169 PNAME(sclk_uart7_src_p)                 = { "clk_uart7_src", "clk_uart7_frac", "xin24m" };
170 PNAME(clk_32k_p)                        = { "xin_osc0_div", "clk_pvtm_32k" };