Lines Matching refs:RK3288_CLKSEL_CON
142 .reg = RK3288_CLKSEL_CON(0), \
150 .reg = RK3288_CLKSEL_CON(37), \
187 .core_reg[0] = RK3288_CLKSEL_CON(0),
262 RK3288_CLKSEL_CON(4), 8, 2, MFLAGS);
266 RK3288_CLKSEL_CON(5), 8, 2, MFLAGS);
270 RK3288_CLKSEL_CON(40), 8, 2, MFLAGS);
274 RK3288_CLKSEL_CON(13), 8, 2, MFLAGS);
278 RK3288_CLKSEL_CON(14), 8, 2, MFLAGS);
282 RK3288_CLKSEL_CON(15), 8, 2, MFLAGS);
286 RK3288_CLKSEL_CON(16), 8, 2, MFLAGS);
290 RK3288_CLKSEL_CON(3), 8, 2, MFLAGS);
303 RK3288_CLKSEL_CON(36), 0, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
306 RK3288_CLKSEL_CON(36), 4, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
309 RK3288_CLKSEL_CON(36), 8, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
312 RK3288_CLKSEL_CON(36), 12, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
315 RK3288_CLKSEL_CON(37), 0, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
318 RK3288_CLKSEL_CON(0), 0, 4, DFLAGS | CLK_DIVIDER_READ_ONLY,
321 RK3288_CLKSEL_CON(0), 4, 4, DFLAGS | CLK_DIVIDER_READ_ONLY,
324 RK3288_CLKSEL_CON(37), 4, 5, DFLAGS | CLK_DIVIDER_READ_ONLY,
327 RK3288_CLKSEL_CON(37), 9, 5, DFLAGS | CLK_DIVIDER_READ_ONLY,
341 RK3288_CLKSEL_CON(26), 2, 1, 0, 0,
344 RK3288_CLKSEL_CON(26), 2, 1, MFLAGS, 0, 2,
352 RK3288_CLKSEL_CON(1), 15, 1, MFLAGS, 3, 5, DFLAGS),
354 RK3288_CLKSEL_CON(1), 0, 3, DFLAGS),
358 RK3288_CLKSEL_CON(1), 12, 3, DFLAGS,
361 RK3288_CLKSEL_CON(1), 8, 2, DFLAGS, div_hclk_cpu_t,
366 RK3288_CLKSEL_CON(26), 6, 2, DFLAGS,
374 RK3288_CLKSEL_CON(4), 15, 1, MFLAGS, 0, 7, DFLAGS,
377 RK3288_CLKSEL_CON(8), 0,
381 RK3288_CLKSEL_CON(4), 12, 1, MFLAGS,
387 RK3288_CLKSEL_CON(5), 15, 1, MFLAGS),
389 RK3288_CLKSEL_CON(5), 0, 7, DFLAGS,
392 RK3288_CLKSEL_CON(9), 0,
398 RK3288_CLKSEL_CON(40), 0, 7, DFLAGS,
401 RK3288_CLKSEL_CON(41), 0,
428 RK3288_CLKSEL_CON(32), 6, 2, MFLAGS, 0, 5, DFLAGS,
431 RK3288_CLKSEL_CON(32), 14, 2, MFLAGS, 8, 5, DFLAGS,
445 RK3288_CLKSEL_CON(31), 6, 2, MFLAGS, 0, 5, DFLAGS,
448 RK3288_CLKSEL_CON(31), 14, 2, MFLAGS, 8, 5, DFLAGS,
452 RK3288_CLKSEL_CON(30), 6, 2, MFLAGS, 0, 5, DFLAGS,
455 RK3288_CLKSEL_CON(30), 14, 2, MFLAGS, 8, 5, DFLAGS,
459 RK3288_CLKSEL_CON(27), 0, 2, MFLAGS, 8, 8, DFLAGS,
462 RK3288_CLKSEL_CON(29), 6, 2, MFLAGS, 8, 8, DFLAGS,
466 RK3288_CLKSEL_CON(28), 15, 1, MFLAGS,
469 RK3288_CLKSEL_CON(28), 6, 2, MFLAGS, 0, 6, DFLAGS,
473 RK3288_CLKSEL_CON(6), 6, 2, MFLAGS, 0, 6, DFLAGS,
476 RK3288_CLKSEL_CON(6), 14, 2, MFLAGS, 8, 6, DFLAGS,
485 RK3288_CLKSEL_CON(39), 14, 2, MFLAGS, 8, 5, DFLAGS,
488 RK3288_CLKSEL_CON(40), 12, 2, DFLAGS),
491 RK3288_CLKSEL_CON(42), 6, 2, MFLAGS, 0, 5, DFLAGS,
494 RK3288_CLKSEL_CON(42), 14, 2, MFLAGS, 8, 5, DFLAGS,
498 RK3288_CLKSEL_CON(26), 8, 1, MFLAGS,
501 RK3288_CLKSEL_CON(26), 15, 1, MFLAGS, 9, 5, DFLAGS),
504 RK3288_CLKSEL_CON(33), 8, 5, DFLAGS),
506 RK3288_CLKSEL_CON(33), 0, 5, DFLAGS,
510 RK3288_CLKSEL_CON(34), 6, 2, MFLAGS, 0, 5, DFLAGS,
514 RK3288_CLKSEL_CON(10), 15, 1, MFLAGS, 0, 5, DFLAGS,
517 RK3288_CLKSEL_CON(10), 12, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
520 RK3288_CLKSEL_CON(10), 8, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
530 RK3288_CLKSEL_CON(25), 7, 1, MFLAGS, 0, 7, DFLAGS,
533 RK3288_CLKSEL_CON(25), 15, 1, MFLAGS, 8, 7, DFLAGS,
536 RK3288_CLKSEL_CON(39), 7, 1, MFLAGS, 0, 7, DFLAGS,
540 RK3288_CLKSEL_CON(11), 6, 2, MFLAGS, 0, 6, DFLAGS,
543 RK3288_CLKSEL_CON(12), 6, 2, MFLAGS, 0, 6, DFLAGS,
546 RK3288_CLKSEL_CON(34), 14, 2, MFLAGS, 8, 6, DFLAGS,
549 RK3288_CLKSEL_CON(12), 14, 2, MFLAGS, 8, 6, DFLAGS,
565 RK3288_CLKSEL_CON(35), 14, 2, MFLAGS, 8, 5, DFLAGS,
568 RK3288_CLKSEL_CON(35), 6, 2, MFLAGS, 0, 5, DFLAGS,
581 RK3288_CLKSEL_CON(2), 0, 6, DFLAGS,
587 RK3288_CLKSEL_CON(2), 8, 5, DFLAGS,
591 RK3288_CLKSEL_CON(24), 8, 8, DFLAGS,
598 RK3288_CLKSEL_CON(38), 7, 1, MFLAGS, 0, 5, DFLAGS,
601 RK3288_CLKSEL_CON(38), 15, 1, MFLAGS, 8, 5, DFLAGS,
605 RK3288_CLKSEL_CON(13), 13, 2, MFLAGS, 0, 7, DFLAGS,
608 RK3288_CLKSEL_CON(17), 0,
612 RK3288_CLKSEL_CON(13), 15, 1, MFLAGS),
614 RK3288_CLKSEL_CON(14), 0, 7, DFLAGS,
617 RK3288_CLKSEL_CON(18), 0,
621 RK3288_CLKSEL_CON(15), 0, 7, DFLAGS,
624 RK3288_CLKSEL_CON(19), 0,
628 RK3288_CLKSEL_CON(16), 0, 7, DFLAGS,
631 RK3288_CLKSEL_CON(20), 0,
635 RK3288_CLKSEL_CON(3), 0, 7, DFLAGS,
638 RK3288_CLKSEL_CON(7), 0,
643 RK3288_CLKSEL_CON(21), 0, 2, MFLAGS, 8, 5, DFLAGS,
646 RK3288_CLKSEL_CON(21), 4, 1, MFLAGS),
657 RK3288_CLKSEL_CON(22), 0, 1, MFLAGS, 8, 8, DFLAGS,
660 RK3288_CLKSEL_CON(22), 4, 1, MFLAGS),
662 RK3288_CLKSEL_CON(22), 7, IFLAGS),
668 RK3288_CLKSEL_CON(13), 11, 2, MFLAGS,
671 RK3288_CLKSEL_CON(29), 0, 2, MFLAGS,
676 RK3288_CLKSEL_CON(11), 8, 6, DFLAGS),
678 RK3288_CLKSEL_CON(22), 4, 1, MFLAGS),
840 INVERTER(PCLK_VIP, "pclk_vip", "pclk_vip_in", RK3288_CLKSEL_CON(29), 4, IFLAGS),
842 INVERTER(0, "pclk_isp", "pclk_isp_in", RK3288_CLKSEL_CON(29), 3, IFLAGS),
851 RK3288_CLKSEL_CON(28), 8, 5, DFLAGS),
856 RK3288_CLKSEL_CON(28), 8, 5, DFLAGS),
868 RK3288_CLKSEL_CON(0),
869 RK3288_CLKSEL_CON(1),
870 RK3288_CLKSEL_CON(10),
871 RK3288_CLKSEL_CON(33),
872 RK3288_CLKSEL_CON(37),