Lines Matching refs:DFLAGS
239 #define DFLAGS CLK_DIVIDER_HIWORD_MASK macro
285 RK2928_CLKSEL_CON(0), 6, 2, DFLAGS | CLK_DIVIDER_READ_ONLY,
289 RK2928_CLKSEL_CON(32), 7, 1, MFLAGS, 0, 5, DFLAGS,
294 RK2928_CLKSEL_CON(32), 15, 1, MFLAGS, 8, 5, DFLAGS,
302 RK2928_CLKSEL_CON(26), 8, 1, MFLAGS, 0, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
316 RK2928_CLKSEL_CON(31), 7, 1, MFLAGS, 0, 5, DFLAGS,
319 RK2928_CLKSEL_CON(31), 15, 1, MFLAGS, 8, 5, DFLAGS,
325 RK2928_CLKSEL_CON(10), 8, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
328 RK2928_CLKSEL_CON(10), 12, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
334 RK2928_CLKSEL_CON(29), 1, 5, DFLAGS,
356 RK2928_CLKSEL_CON(21), 0, 1, MFLAGS, 8, 5, DFLAGS,
364 RK2928_CLKSEL_CON(22), 0, 1, MFLAGS, 8, 8, DFLAGS,
374 RK2928_CLKSEL_CON(24), 8, 8, DFLAGS,
378 RK2928_CLKSEL_CON(5), 0, 7, DFLAGS,
393 RK2928_CLKSEL_CON(25), 0, 7, DFLAGS,
396 RK2928_CLKSEL_CON(25), 8, 7, DFLAGS,
400 RK2928_CLKSEL_CON(11), 0, 6, DFLAGS,
403 RK2928_CLKSEL_CON(12), 0, 6, DFLAGS,
406 RK2928_CLKSEL_CON(12), 8, 6, DFLAGS,
412 RK2928_CLKSEL_CON(13), 0, 7, DFLAGS,
419 RK2928_CLKSEL_CON(14), 0, 7, DFLAGS,
426 RK2928_CLKSEL_CON(15), 0, 7, DFLAGS,
433 RK2928_CLKSEL_CON(16), 0, 7, DFLAGS,
562 RK2928_CLKSEL_CON(1), 0, 3, DFLAGS | CLK_DIVIDER_READ_ONLY, div_aclk_cpu_t),
564 RK2928_CLKSEL_CON(1), 12, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO
567 RK2928_CLKSEL_CON(1), 8, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO
570 RK2928_CLKSEL_CON(1), 14, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO
578 RK2928_CLKSEL_CON(10), 15, 1, MFLAGS, 0, 5, DFLAGS,
582 RK2928_CLKSEL_CON(27), 0, 1, MFLAGS, 8, 8, DFLAGS,
587 RK2928_CLKSEL_CON(28), 0, 1, MFLAGS, 8, 8, DFLAGS,
593 RK2928_CLKSEL_CON(29), 8, 5, DFLAGS,
604 RK2928_CLKSEL_CON(33), 8, 1, MFLAGS, 0, 5, DFLAGS,
613 RK2928_CLKSEL_CON(34), 0, 16, DFLAGS,
619 RK2928_CLKSEL_CON(2), 0, 7, DFLAGS,
626 RK2928_CLKSEL_CON(3), 0, 7, DFLAGS,
633 RK2928_CLKSEL_CON(4), 0, 7, DFLAGS,
678 RK2928_CLKSEL_CON(1), 3, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
683 RK2928_CLKSEL_CON(0), 5, 1, MFLAGS, 0, 5, DFLAGS),
685 RK2928_CLKSEL_CON(1), 12, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO),
687 RK2928_CLKSEL_CON(1), 8, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO),
689 RK2928_CLKSEL_CON(1), 14, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
696 RK2928_CLKSEL_CON(10), 15, 1, MFLAGS, 0, 5, DFLAGS,
700 RK2928_CLKSEL_CON(27), 0, 1, MFLAGS, 8, 8, DFLAGS,
703 RK2928_CLKSEL_CON(28), 0, 1, MFLAGS, 8, 8, DFLAGS,
707 RK2928_CLKSEL_CON(34), 7, 1, MFLAGS, 0, 5, DFLAGS,
719 RK2928_CLKSEL_CON(30), 0, 2, DFLAGS,
722 RK2928_CLKSEL_CON(11), 8, 6, DFLAGS),
727 RK2928_CLKSEL_CON(3), 0, 7, DFLAGS,