Lines Matching full:cru
10 &cru {
12 <&cru PLL_GPLL>, <&cru PLL_CPLL>,
13 <&cru ARMCLK>,
14 <&cru CLK_50M_SRC>, <&cru CLK_100M_SRC>,
15 <&cru CLK_150M_SRC>, <&cru CLK_200M_SRC>,
16 <&cru CLK_250M_SRC>, <&cru CLK_300M_SRC>,
17 <&cru CLK_339M_SRC>, <&cru CLK_400M_SRC>,
18 <&cru CLK_450M_SRC>, <&cru CLK_500M_SRC>,
19 <&cru ACLK_PERI_ROOT>, <&cru HCLK_PERI_ROOT>,
20 <&cru PCLK_PERI_ROOT>, <&cru ACLK_BUS_ROOT>,
21 <&cru PCLK_TOP_ROOT>, <&cru PCLK_PMU_ROOT>,
22 <&cru HCLK_PMU_ROOT>;
44 clocks = <&cru MCLK_I2S0_8CH_TX>, <&cru MCLK_I2S0_8CH_RX>, <&cru HCLK_I2S0>,
45 <&cru CLK_I2S0_8CH_TX_SRC>, <&cru CLK_I2S0_8CH_RX_SRC>,
46 <&cru PLL_GPLL>, <&cru PLL_GPLL>;