boot/dts/rv1103g-rmsl311-dloc-sl-v10.dts

1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
9 #include "rv1106-thunder-boot-spi-nor.dtsi"
13 	compatible = "rockchip,rv1103g-rmsl311-dloc-v10", "rockchip,rv1103";
19 	vcc_1v8: vcc-1v8 {
20 		compatible = "regulator-fixed";
21 		regulator-name = "vcc_1v8";
22 		regulator-always-on;
23 		regulator-boot-on;
24 		regulator-min-microvolt = <1800000>;
25 		regulator-max-microvolt = <1800000>;
28 	vcc_3v3: vcc-3v3 {
29 		compatible = "regulator-fixed";
30 		regulator-name = "vcc_3v3";
31 		regulator-always-on;
32 		regulator-boot-on;
33 		regulator-min-microvolt = <3300000>;
34 		regulator-max-microvolt = <3300000>;
37 	vdd_arm: vdd-arm {
38 		compatible = "pwm-regulator";
40 		regulator-name = "vdd_arm";
41 		regulator-min-microvolt = <724000>;
42 		regulator-max-microvolt = <1078000>;
43 		regulator-init-microvolt = <950000>;
44 		regulator-always-on;
45 		regulator-boot-on;
46 		regulator-settling-time-up-us = <250>;
57 		#address-cells = <1>;
58 		#size-cells = <0>;
62 			#address-cells = <1>;
63 			#size-cells = <0>;
67 				remote-endpoint = <&sc035gs_out>;
68 				data-lanes = <1 2>;
74 			#address-cells = <1>;
75 			#size-cells = <0>;
78 				remote-endpoint = <&mipi0_csi2_input>;
85 	rockchip,irq-mode-enable = <1>;
88 	pinctrl-names = "default";
89 	pinctrl-0 = <&uart2m1_xfer>;
94 	clock-frequency = <400000>;
95 	pinctrl-names = "default";
96 	pinctrl-0 = <&i2c4m2_xfer>;
103 		clock-names = "xvclk";
104 		reset-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_LOW>;
105 		pinctrl-names = "default";
106 		pinctrl-0 = <&mipi_refclk_out0>;
108 		rockchip,camera-module-index = <0>;
109 		rockchip,camera-module-facing = "back";
110 		rockchip,camera-module-name = "default";
111 		rockchip,camera-module-lens-name = "default";
115 				remote-endpoint = <&dphy1_in>;
116 				data-lanes = <1 2>;
126 		gpio-encc1-gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_HIGH>; //Flood
127 		gpio-encc2-gpios = <&gpio1 RK_PC7 GPIO_ACTIVE_HIGH>; //PRO
139 		#address-cells = <1>;
140 		#size-cells = <0>;
144 			#address-cells = <1>;
145 			#size-cells = <0>;
149 				remote-endpoint = <&dphy1_out>;
150 				data-lanes = <1 2>;
156 			#address-cells = <1>;
157 			#size-cells = <0>;
161 				remote-endpoint = <&cif_mipi0_in>;
162 				data-lanes = <1 2>;
188 		/* MIPI CSI-2 endpoint */
190 			remote-endpoint = <&mipi0_csi2_output>;
191 			data-lanes = <1 2>;
200 		/* MIPI CSI-2 endpoint */
202 			remote-endpoint = <&isp0_in>;
203 			data-lanes = <1 2>;
211 	pinctrl-names = "default";
212 	pinctrl-0 = <&mipi_pins>;
214 	max-input = <640 480 30>;
223 				remote-endpoint = <&mipi_lvds0_sditf>;
233 &rng {
239 	vref-supply = <&vcc_1v8>;
243 	assigned-clocks = <&cru SCLK_SFC>;
244 	assigned-clock-rates = <125000000>;
248 		compatible = "jedec,spi-nor";
250 		spi-max-frequency = <125000000>;
251 		spi-rx-bus-width = <4>;
252 		spi-tx-bus-width = <1>;