Lines Matching +full:vcc33 +full:- +full:supply
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 /dts-v1/;
5 #include "rk3288-evb-rk628.dtsi"
8 vcc33_lcd: vcc33-lcd {
9 compatible = "regulator-fixed";
10 regulator-name = "vcc33_lcd";
11 regulator-boot-on;
13 enable-active-high;
17 compatible = "simple-panel";
19 power-supply = <&vcc33_lcd>;
20 enable-gpios = <&gpio5 RK_PC1 GPIO_ACTIVE_HIGH>;
21 prepare-delay-ms = <20>;
22 enable-delay-ms = <20>;
23 disable-delay-ms = <20>;
24 unprepare-delay-ms = <20>;
25 bus-format = <MEDIA_BUS_FMT_RGB888_1X7X4_SPWG>;
27 display-timings {
28 native-mode = <&timing0>;
31 clock-frequency = <149000000>;
34 hback-porch = <96>;
35 hfront-porch = <120>;
36 vback-porch = <8>;
37 vfront-porch = <33>;
38 hsync-len = <64>;
39 vsync-len = <4>;
40 hsync-active = <0>;
41 vsync-active = <0>;
42 de-active = <0>;
43 pixelclk-active = <0>;
49 remote-endpoint = <&lvds_out_panel>;
56 rockchip,link-type = "dual-link-even-odd-pixels";
60 #address-cells = <1>;
61 #size-cells = <0>;
67 remote-endpoint = <&post_process_out_lvds>;
75 remote-endpoint = <&panel_in_lvds>;
86 pinctrl-names = "default";
87 pinctrl-0 = <&rk628_vop_pins>;
91 #address-cells = <1>;
92 #size-cells = <0>;
98 remote-endpoint = <&rgb_out_post_process>;
106 remote-endpoint = <&lvds_in_post_process>;
120 remote-endpoint = <&post_process_in_rgb>;
144 assigned-clocks = <&cru DCLK_VOP0>;
145 assigned-clock-parents = <&cru PLL_GPLL>;
149 assigned-clocks = <&cru DCLK_VOP1>;
150 assigned-clock-parents = <&cru PLL_CPLL>;