boot/dts/rk3128.dtsi

2  * This file is dual-licensed: you can use it either under the terms
47 		compatible = "rockchip,cryptov1-rng";
50 		clock-names = "clk_crypto", "hclk_crypto";
51 		assigned-clocks = <&cru SCLK_CRYPTO>, <&cru HCLK_CRYPTO>;
52 		assigned-clock-rates = <150000000>, <100000000>;
54 		reset-names = "reset";
64 		compatible = "rockchip,rk3128-inno-hdmi";
68 		clock-names = "aclk", "pclk";
70 		pinctrl-names = "default";
71 		pinctrl-0 = <&hdmii2c_xfer &hdmi_hpd &hdmi_cec>;
72 		#address-cells = <1>;
73 		#size-cells = <0>;
74 		#sound-dai-cells = <0>;
77 			#address-cells = <1>;
78 			#size-cells = <0>;
81 				remote-endpoint = <&vop_out_hdmi>;
92 	clock-names = "g_pclk_acodec", "i2s_clk";
97 	rockchip,leakage-scaling-sel = <
100 	rockchip,leakage-voltage-sel = <
106 	opp-216000000 {
107 		opp-hz = /bits/ 64 <216000000>;
108 		opp-microvolt = <950000 950000 1425000>;
109 		opp-microvolt-L0 = <950000 950000 1425000>;
110 		opp-microvolt-L1 = <950000 950000 1425000>;
111 		opp-microvolt-L2 = <950000 950000 1425000>;
112 		clock-latency-ns = <40000>;
114 	opp-408000000 {
115 		opp-hz = /bits/ 64 <408000000>;
116 		opp-microvolt = <950000 950000 1425000>;
117 		opp-microvolt-L0 = <950000 950000 1425000>;
118 		opp-microvolt-L1 = <950000 950000 1425000>;
119 		opp-microvolt-L2 = <950000 950000 1425000>;
120 		clock-latency-ns = <40000>;
122 	opp-600000000 {
123 		opp-hz = /bits/ 64 <600000000>;
124 		opp-microvolt-L0 = <950000 950000 1425000>;
125 		opp-microvolt-L1 = <950000 950000 1425000>;
126 		opp-microvolt-L2 = <950000 950000 1425000>;
127 		clock-latency-ns = <40000>;
129 	opp-696000000 {
130 		opp-hz = /bits/ 64 <696000000>;
131 		opp-microvolt = <1150000 1150000 1425000>;
132 		opp-microvolt-L0 = <975000 975000 1425000>;
133 		opp-microvolt-L1 = <975000 975000 1425000>;
134 		opp-microvolt-L2 = <975000 975000 1425000>;
135 		clock-latency-ns = <40000>;
137 	opp-816000000 {
138 		opp-hz = /bits/ 64 <816000000>;
139 		opp-microvolt = <1075000 1075000 1425000>;
140 		opp-microvolt-L0 = <1075000 1075000 1425000>;
141 		opp-microvolt-L1 = <1050000 1050000 1425000>;
142 		opp-microvolt-L2 = <1000000 1000000 1425000>;
143 		clock-latency-ns = <40000>;
144 		opp-suspend;
146 	opp-1008000000 {
147 		opp-hz = /bits/ 64 <1008000000>;
148 		opp-microvolt = <1200000 1200000 1425000>;
149 		opp-microvolt-L0 = <1200000 1200000 1425000>;
150 		opp-microvolt-L1 = <1175000 1175000 1425000>;
151 		opp-microvolt-L2 = <1125000 1125000 1425000>;
152 		clock-latency-ns = <40000>;
154 	opp-1200000000 {
155 		opp-hz = /bits/ 64 <1200000000>;
156 		opp-microvolt = <1325000 1325000 1425000>;
157 		opp-microvolt-L0 = <1325000 1325000 1425000>;
158 		opp-microvolt-L1 = <1300000 1300000 1425000>;
159 		opp-microvolt-L2 = <1250000 1250000 1425000>;
160 		clock-latency-ns = <40000>;
181 	rockchip,skip-mmu-read;
185 	#address-cells = <1>;
186 	#size-cells = <0>;
190 		remote-endpoint = <&dsi_in_vop>;
195 		remote-endpoint = <&lvds_in_vop>;
200 		remote-endpoint = <&hdmi_in_vop>;