boot/dts/rk3066a.dtsi

27 		#size-cells = <0>;
30 		cpu0: cpu@0 {
34 			reg = <0x0>;
42 			reg = <0x1>;
84 		reg = <0x10080000 0x10000>;
87 		ranges = <0 0x10080000 0x10000>;
89 		smp-sram@0 {
91 			reg = <0x0 0x50>;
98 		reg = <0x10091000 0x200>,
99 		      <0x10090000 0x100>,
100 		      <0x10093000 0x100>,
101 		      <0x10098000 0x1100>,
102 		      <0x10094000 0x100>,
103 		      <0x1009A000 0x1100>,
104 		      <0x10095000 0x100>,
105 		      <0x1009C000 0x1100>,
106 		      <0x10096000 0x100>,
107 		      <0x1009E000 0x1100>,
108 		      <0x10097000 0x100>;
174 		reg = <0x1010c000 0x19c>;
189 			#size-cells = <0>;
191 			vop0_out_hdmi: endpoint@0 {
192 				reg = <0>;
200 		reg = <0x1010e000 0x19c>;
215 			#size-cells = <0>;
217 			vop1_out_hdmi: endpoint@0 {
218 				reg = <0>;
226 		reg = <0x10116000 0x2000>;
231 		pinctrl-0 = <&hdmii2c_xfer>, <&hdmi_hpd>;
238 			#size-cells = <0>;
240 			hdmi_in: port@0 {
241 				reg = <0>;
243 				#size-cells = <0>;
245 				hdmi_in_vop0: endpoint@0 {
246 					reg = <0>;
264 		reg = <0x10118000 0x2000>;
267 		pinctrl-0 = <&i2s0_bus>;
276 		#sound-dai-cells = <0>;
282 		reg = <0x1011a000 0x2000>;
285 		pinctrl-0 = <&i2s1_bus>;
294 		#sound-dai-cells = <0>;
300 		reg = <0x1011c000 0x2000>;
303 		pinctrl-0 = <&i2s2_bus>;
312 		#sound-dai-cells = <0>;
318 		reg = <0x20000000 0x1000>;
340 		reg = <0x2000e000 0x100>;
348 		reg = <0x20010000 0x4000>;
355 			reg = <0x17 0x1>;
361 		reg = <0x20038000 0x100>;
369 		reg = <0x2003a000 0x100>;
377 		reg = <0x20060000 0x100>;
391 		#size-cells = <0>;
395 			#phy-cells = <0>;
396 			reg = <0x17c>;
399 			#clock-cells = <0>;
403 			#phy-cells = <0>;
404 			reg = <0x188>;
407 			#clock-cells = <0>;
420 			reg = <0x20034000 0x100>;
434 			reg = <0x2003c000 0x100>;
448 			reg = <0x2003e000 0x100>;
462 			reg = <0x20080000 0x100>;
476 			reg = <0x20084000 0x100>;
490 			reg = <0x2000a000 0x100>;
551 				rockchip,pins = <0 RK_PA0 1 &pcfg_pull_default>;
555 				rockchip,pins = <0 RK_PA1 1 &pcfg_pull_none>,
556 						<0 RK_PA2 1 &pcfg_pull_none>;
597 				rockchip,pins = <0 RK_PA3 1 &pcfg_pull_none>;
603 				rockchip,pins = <0 RK_PA4 1 &pcfg_pull_none>;
609 				rockchip,pins = <0 RK_PD6 1 &pcfg_pull_none>;
615 				rockchip,pins = <0 RK_PD7 1 &pcfg_pull_none>;
768 				rockchip,pins = <0 RK_PA7 1 &pcfg_pull_default>,
769 						<0 RK_PB0 1 &pcfg_pull_default>,
770 						<0 RK_PB1 1 &pcfg_pull_default>,
771 						<0 RK_PB2 1 &pcfg_pull_default>,
772 						<0 RK_PB3 1 &pcfg_pull_default>,
773 						<0 RK_PB4 1 &pcfg_pull_default>,
774 						<0 RK_PB5 1 &pcfg_pull_default>,
775 						<0 RK_PB6 1 &pcfg_pull_default>,
776 						<0 RK_PB7 1 &pcfg_pull_default>;
782 				rockchip,pins = <0 RK_PC0 1 &pcfg_pull_default>,
783 						<0 RK_PC1 1 &pcfg_pull_default>,
784 						<0 RK_PC2 1 &pcfg_pull_default>,
785 						<0 RK_PC3 1 &pcfg_pull_default>,
786 						<0 RK_PC4 1 &pcfg_pull_default>,
787 						<0 RK_PC5 1 &pcfg_pull_default>;
793 				rockchip,pins = <0 RK_PD0 1 &pcfg_pull_default>,
794 						<0 RK_PD1 1 &pcfg_pull_default>,
795 						<0 RK_PD2 1 &pcfg_pull_default>,
796 						<0 RK_PD3 1 &pcfg_pull_default>,
797 						<0 RK_PD4 1 &pcfg_pull_default>,
798 						<0 RK_PD5 1 &pcfg_pull_default>;
831 	pinctrl-0 = <&i2c0_xfer>;
836 	pinctrl-0 = <&i2c1_xfer>;
841 	pinctrl-0 = <&i2c2_xfer>;
846 	pinctrl-0 = <&i2c3_xfer>;
851 	pinctrl-0 = <&i2c4_xfer>;
860 	pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_bus4>;
867 	pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_cd &sd1_bus4>;
880 		#size-cells = <0>;
928 	pinctrl-0 = <&pwm0_out>;
933 	pinctrl-0 = <&pwm1_out>;
938 	pinctrl-0 = <&pwm2_out>;
943 	pinctrl-0 = <&pwm3_out>;
948 	pinctrl-0 = <&spi0_clk &spi0_tx &spi0_rx &spi0_cs0>;
953 	pinctrl-0 = <&spi1_clk &spi1_tx &spi1_rx &spi1_cs0>;
958 	dmas = <&dmac1_s 0>, <&dmac1_s 1>;
961 	pinctrl-0 = <&uart0_xfer>;
969 	pinctrl-0 = <&uart1_xfer>;
977 	pinctrl-0 = <&uart2_xfer>;
985 	pinctrl-0 = <&uart3_xfer>;