bindings/phy/phy-rockchip-naneng-usb2.txt

1 ROCKCHIP USB2.0 PHY WITH NANENG IP BLOCK
3 Required properties (phy (parent) node):
4  - compatible : should be one of the listed compatibles:
5 	* "rockchip,rv1126-usb2phy"
6  - reg : the address offset of grf for usb-phy configuration.
7  - rockchip,grf : phandle to the syscon managing the "general register files"
8  - clocks : phandle + phy specifier pair, for the input clocks of phy.
9  - clock-names : input clocks name of phy.
10  - resets : phandle + reset specifier pairs.
11  - reset-names : reset names of phy.
12  - #clock-cells : should be 0.
13  - clock-output-names : specify the 480m output clock name.
16  - assigned-clocks : phandle of usb 480m clock.
17  - assigned-clock-parents : parent of usb 480m clock, select between
18 		 usb-phy output 480m and xin24m.
19 		 Refer to clk/clock-bindings.txt for generic clock
21  - vbus-supply : regulator phandle for vbus power source.
22  - wakeup-source : enable bvalid irq and linestate wakeup when suspend.
23 			only work when suspend wakeup-config is not work.
24  - vup-gpios : gpio phandle for pull-up resistor on DM. this property
29 Required nodes : a sub-node is required for each port the phy provides.
30 		 The sub-node name is used to identify host or otg port,
32 	* "otg-port" : the name of otg port.
33 	* "host-port" : the name of host port.
36  - #phy-cells : must be 0. See ./phy-bindings.txt for details.
37  - interrupts : specify an interrupt for each entry in interrupt-names.
38  - interrupt-names : a list which should be one of the following cases:
40 	* "otg-id" : for the otg id interrupt.
41 	* "otg-bvalid" : for the otg vbus interrupt.
46  - phy-supply : phandle to a regulator that provides power to VBUS.
47 		See ./phy-bindings.txt for details.
48  - rockchip,vbus-always-on: when set, indicates that the otg vbus
53 u2phy1: usb2-phy@ff4c8000 {
54 	compatible = "rockchip,rv1126-usb2phy";
58 	clock-names = "phyclk", "pclk";
59 	assigned-clocks = <&cru USB480M>;
60 	assigned-clock-parents = <&u2phy1>;
62 	reset-names = "u2phy", "u2phy-apb";
63 	#clock-cells = <0>;
64 	clock-output-names = "usb480m_phy";
67 	u2phy_host: host-port {
68 		#phy-cells = <0>;
71 		interrupt-names = "linestate", "disconnect";