Lines Matching +full:0 +full:xf0000
89 pMptCtx->backup0x52_RF_A = (u8)phy_query_rf_reg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0); in hal_mpt_SwitchRfSetting()
90 pMptCtx->backup0x52_RF_B = (u8)phy_query_rf_reg(pAdapter, RF_PATH_B, RF_0x52, 0x000F0); in hal_mpt_SwitchRfSetting()
92 if ((PlatformEFIORead4Byte(pAdapter, 0xF4) & BIT29) == BIT29) { in hal_mpt_SwitchRfSetting()
93 phy_set_rf_reg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0, 0xB); in hal_mpt_SwitchRfSetting()
94 phy_set_rf_reg(pAdapter, RF_PATH_B, RF_0x52, 0x000F0, 0xB); in hal_mpt_SwitchRfSetting()
96 phy_set_rf_reg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0, 0xD); in hal_mpt_SwitchRfSetting()
97 phy_set_rf_reg(pAdapter, RF_PATH_B, RF_0x52, 0x000F0, 0xD); in hal_mpt_SwitchRfSetting()
101 phy_set_rf_reg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0, 0xB); /*RF 0x52 = 0x0007E4BD*/ in hal_mpt_SwitchRfSetting()
102 phy_set_rf_reg(pAdapter, RF_PATH_B, RF_0x52, 0x000F0, 0xB); /*RF 0x52 = 0x0007E4BD*/ in hal_mpt_SwitchRfSetting()
104 phy_set_rf_reg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0, 0x9); /*RF 0x52 = 0x0007E49D*/ in hal_mpt_SwitchRfSetting()
105 phy_set_rf_reg(pAdapter, RF_PATH_B, RF_0x52, 0x000F0, 0x9); /*RF 0x52 = 0x0007E49D*/ in hal_mpt_SwitchRfSetting()
108 phy_set_rf_reg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0, pMptCtx->backup0x52_RF_A); in hal_mpt_SwitchRfSetting()
109 phy_set_rf_reg(pAdapter, RF_PATH_B, RF_0x52, 0x000F0, pMptCtx->backup0x52_RF_B); in hal_mpt_SwitchRfSetting()
146 u32 TempVal = 0, TempVal2 = 0, TempVal3 = 0; in hal_mpt_CCKTxPowerAdjust()
147 u32 CurrCCKSwingVal = 0, CCKSwingIndex = 12; in hal_mpt_CCKTxPowerAdjust()
153 u8 DataRate = 0xFF; in hal_mpt_CCKTxPowerAdjust()
169 /* Channel 14 in CCK, need to set 0xA26~0xA29 to 0 for 8703B */ in hal_mpt_CCKTxPowerAdjust()
170 phy_set_bb_reg(Adapter, rCCK0_TxFilter2, bMaskHWord, 0); in hal_mpt_CCKTxPowerAdjust()
171 phy_set_bb_reg(Adapter, rCCK0_DebugPort, bMaskLWord, 0); in hal_mpt_CCKTxPowerAdjust()
176 for (i = 0 ; i < 2 ; ++i) in hal_mpt_CCKTxPowerAdjust()
184 phy_set_bb_reg(Adapter, rCCK0_TxFilter2, bMaskDWord, 0x0000B81C); in hal_mpt_CCKTxPowerAdjust()
185 phy_set_bb_reg(Adapter, rCCK0_DebugPort, bMaskDWord, 0x00000000); in hal_mpt_CCKTxPowerAdjust()
186 phy_set_bb_reg(Adapter, 0xAAC, bMaskDWord, 0x00003667); in hal_mpt_CCKTxPowerAdjust()
188 for (i = 0 ; i < 3 ; ++i) { in hal_mpt_CCKTxPowerAdjust()
196 /* get current cck swing value and check 0xa22 & 0xa23 later to match the table.*/ in hal_mpt_CCKTxPowerAdjust()
203 for (i = 0; i < CCK_TABLE_SIZE_88F; i++) { in hal_mpt_CCKTxPowerAdjust()
204 if (((CurrCCKSwingVal & 0xff) == (u32)cck_swing_table_ch1_ch13_88f[i][0]) && in hal_mpt_CCKTxPowerAdjust()
205 (((CurrCCKSwingVal & 0xff00) >> 8) == (u32)cck_swing_table_ch1_ch13_88f[i][1])) { in hal_mpt_CCKTxPowerAdjust()
210 write_bbreg(Adapter, 0xa22, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][0]); in hal_mpt_CCKTxPowerAdjust()
211 write_bbreg(Adapter, 0xa23, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][1]); in hal_mpt_CCKTxPowerAdjust()
212 write_bbreg(Adapter, 0xa24, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][2]); in hal_mpt_CCKTxPowerAdjust()
213 write_bbreg(Adapter, 0xa25, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][3]); in hal_mpt_CCKTxPowerAdjust()
214 write_bbreg(Adapter, 0xa26, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][4]); in hal_mpt_CCKTxPowerAdjust()
215 write_bbreg(Adapter, 0xa27, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][5]); in hal_mpt_CCKTxPowerAdjust()
216 write_bbreg(Adapter, 0xa28, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][6]); in hal_mpt_CCKTxPowerAdjust()
217 write_bbreg(Adapter, 0xa29, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][7]); in hal_mpt_CCKTxPowerAdjust()
218 write_bbreg(Adapter, 0xa9a, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][8]); in hal_mpt_CCKTxPowerAdjust()
219 write_bbreg(Adapter, 0xa9b, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][9]); in hal_mpt_CCKTxPowerAdjust()
220 write_bbreg(Adapter, 0xa9c, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][10]); in hal_mpt_CCKTxPowerAdjust()
221 write_bbreg(Adapter, 0xa9d, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][11]); in hal_mpt_CCKTxPowerAdjust()
222 write_bbreg(Adapter, 0xaa0, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][12]); in hal_mpt_CCKTxPowerAdjust()
223 write_bbreg(Adapter, 0xaa1, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][13]); in hal_mpt_CCKTxPowerAdjust()
224 write_bbreg(Adapter, 0xaa2, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][14]); in hal_mpt_CCKTxPowerAdjust()
225 write_bbreg(Adapter, 0xaa3, bMaskByte0, cck_swing_table_ch1_ch13_88f[CCKSwingIndex][15]); in hal_mpt_CCKTxPowerAdjust()
228 for (i = 0; i < CCK_TABLE_SIZE_88F; i++) { in hal_mpt_CCKTxPowerAdjust()
229 if (((CurrCCKSwingVal & 0xff) == (u32)cck_swing_table_ch14_88f[i][0]) && in hal_mpt_CCKTxPowerAdjust()
230 (((CurrCCKSwingVal & 0xff00) >> 8) == (u32)cck_swing_table_ch14_88f[i][1])) { in hal_mpt_CCKTxPowerAdjust()
235 write_bbreg(Adapter, 0xa22, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][0]); in hal_mpt_CCKTxPowerAdjust()
236 write_bbreg(Adapter, 0xa23, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][1]); in hal_mpt_CCKTxPowerAdjust()
237 write_bbreg(Adapter, 0xa24, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][2]); in hal_mpt_CCKTxPowerAdjust()
238 write_bbreg(Adapter, 0xa25, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][3]); in hal_mpt_CCKTxPowerAdjust()
239 write_bbreg(Adapter, 0xa26, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][4]); in hal_mpt_CCKTxPowerAdjust()
240 write_bbreg(Adapter, 0xa27, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][5]); in hal_mpt_CCKTxPowerAdjust()
241 write_bbreg(Adapter, 0xa28, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][6]); in hal_mpt_CCKTxPowerAdjust()
242 write_bbreg(Adapter, 0xa29, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][7]); in hal_mpt_CCKTxPowerAdjust()
243 write_bbreg(Adapter, 0xa9a, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][8]); in hal_mpt_CCKTxPowerAdjust()
244 write_bbreg(Adapter, 0xa9b, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][9]); in hal_mpt_CCKTxPowerAdjust()
245 write_bbreg(Adapter, 0xa9c, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][10]); in hal_mpt_CCKTxPowerAdjust()
246 write_bbreg(Adapter, 0xa9d, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][11]); in hal_mpt_CCKTxPowerAdjust()
247 write_bbreg(Adapter, 0xaa0, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][12]); in hal_mpt_CCKTxPowerAdjust()
248 write_bbreg(Adapter, 0xaa1, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][13]); in hal_mpt_CCKTxPowerAdjust()
249 write_bbreg(Adapter, 0xaa2, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][14]); in hal_mpt_CCKTxPowerAdjust()
250 write_bbreg(Adapter, 0xaa3, bMaskByte0, cck_swing_table_ch14_88f[CCKSwingIndex][15]); in hal_mpt_CCKTxPowerAdjust()
255 /* get current cck swing value and check 0xa22 & 0xa23 later to match the table.*/ in hal_mpt_CCKTxPowerAdjust()
261 for (i = 0; i < CCK_TABLE_SIZE; i++) { in hal_mpt_CCKTxPowerAdjust()
262 if (((CurrCCKSwingVal & 0xff) == (u32)cck_swing_table_ch1_ch13[i][0]) && in hal_mpt_CCKTxPowerAdjust()
263 (((CurrCCKSwingVal & 0xff00) >> 8) == (u32)cck_swing_table_ch1_ch13[i][1])) { in hal_mpt_CCKTxPowerAdjust()
269 /*Write 0xa22 0xa23*/ in hal_mpt_CCKTxPowerAdjust()
270 TempVal = cck_swing_table_ch1_ch13[CCKSwingIndex][0] + in hal_mpt_CCKTxPowerAdjust()
274 /*Write 0xa24 ~ 0xa27*/ in hal_mpt_CCKTxPowerAdjust()
275 TempVal2 = 0; in hal_mpt_CCKTxPowerAdjust()
281 /*Write 0xa28 0xa29*/ in hal_mpt_CCKTxPowerAdjust()
282 TempVal3 = 0; in hal_mpt_CCKTxPowerAdjust()
286 for (i = 0; i < CCK_TABLE_SIZE; i++) { in hal_mpt_CCKTxPowerAdjust()
287 if (((CurrCCKSwingVal & 0xff) == (u32)cck_swing_table_ch14[i][0]) && in hal_mpt_CCKTxPowerAdjust()
288 (((CurrCCKSwingVal & 0xff00) >> 8) == (u32)cck_swing_table_ch14[i][1])) { in hal_mpt_CCKTxPowerAdjust()
294 /*Write 0xa22 0xa23*/ in hal_mpt_CCKTxPowerAdjust()
295 TempVal = cck_swing_table_ch14[CCKSwingIndex][0] + in hal_mpt_CCKTxPowerAdjust()
298 /*Write 0xa24 ~ 0xa27*/ in hal_mpt_CCKTxPowerAdjust()
299 TempVal2 = 0; in hal_mpt_CCKTxPowerAdjust()
305 /*Write 0xa28 0xa29*/ in hal_mpt_CCKTxPowerAdjust()
306 TempVal3 = 0; in hal_mpt_CCKTxPowerAdjust()
333 rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, HAL_PRIME_CHNL_OFFSET_UPPER, 0); in hal_mpt_SetChannel()
335 rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, pmp->prime_channel_offset, 0); in hal_mpt_SetChannel()
360 rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, HAL_PRIME_CHNL_OFFSET_UPPER, 0); in hal_mpt_SetBandwidth()
362 rtw_hal_set_chnl_bw(pAdapter, channel, bandwidth, pmp->prime_channel_offset, 0); in hal_mpt_SetBandwidth()
373 u32 TxAGC = 0, pwr = 0; in mpt_SetTxPower_Old()
376 if (pwr < 0x3f) { in mpt_SetTxPower_Old()
379 phy_set_bb_reg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, TxAGC); in mpt_SetTxPower_Old()
382 if (pwr < 0x3f) { in mpt_SetTxPower_Old()
385 phy_set_bb_reg(pAdapter, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, TxAGC); in mpt_SetTxPower_Old()
391 u32 TxAGC = 0; in mpt_SetTxPower_Old()
392 u8 pwr = 0; in mpt_SetTxPower_Old()
394 pwr = pTxPower[0]; in mpt_SetTxPower_Old()
395 if (pwr < 0x3f) { in mpt_SetTxPower_Old()
397 RTW_INFO("HT Tx-rf(A) Power = 0x%x\n", TxAGC); in mpt_SetTxPower_Old()
405 TxAGC = 0; in mpt_SetTxPower_Old()
407 if (pwr < 0x3f) { in mpt_SetTxPower_Old()
409 RTW_INFO("HT Tx-rf(B) Power = 0x%x\n", TxAGC); in mpt_SetTxPower_Old()
435 u8 path = 0 , i = 0, MaxRate = MGN_6M; in mpt_SetTxPower()
453 for (i = 0; i < sizeof(rate); ++i) in mpt_SetTxPower()
464 for (i = 0; i < sizeof(rate); ++i) in mpt_SetTxPower()
488 for (i = 0; i < sizeof(rate); ++i) { in mpt_SetTxPower()
517 for (i = 0; i < sizeof(rate); ++i) { in mpt_SetTxPower()
584 phy_set_rf_reg(pAdapter, RF_PATH_A, 0x51, 0xF, 0x6); in hal_mpt_SetDataRate()
586 phy_set_rf_reg(pAdapter, RF_PATH_A, 0x71, 0xF, 0x6); in hal_mpt_SetDataRate()
589 phy_set_rf_reg(pAdapter, RF_PATH_A, 0x51, 0xF, 0xE); in hal_mpt_SetDataRate()
591 phy_set_rf_reg(pAdapter, RF_PATH_A, 0x71, 0xF, 0xE); in hal_mpt_SetDataRate()
598 phy_set_rf_reg(pAdapter, RF_PATH_A, 0x51, 0xF, 0xE); in hal_mpt_SetDataRate()
600 phy_set_rf_reg(pAdapter, RF_PATH_A, 0x71, 0xF, 0xE); in hal_mpt_SetDataRate()
609 u32 pout = 0; in hal_mpt_tssi_turn_target_power()
638 u32 IGReg = rA_IGI_Jaguar, IGvalue = 0; in mpt_ToggleIG_8814A()
640 for (Path = 0; Path <= RF_PATH_D; Path++) { in mpt_ToggleIG_8814A()
683 /*pHalData->ValidTxPath = 0x0e;*/ in mpt_SetRFPath_8814A()
684 …phy_set_bb_reg(pAdapter, rTxAnt_23Nsts_Jaguar2, 0x0fff0000, 0x90e); /*/ 0x940[27:16]=12'b0010_0100… in mpt_SetRFPath_8814A()
690 /*pHalData->ValidTxPath = 0x0d;*/ in mpt_SetRFPath_8814A()
691 …phy_set_bb_reg(pAdapter, rTxAnt_23Nsts_Jaguar2, 0x0fff0000, 0x247); /*/ 0x940[27:16]=12'b0010_0100… in mpt_SetRFPath_8814A()
700 /*pHalData->ValidTxPath = 0x0e;*/ in mpt_SetRFPath_8814A()
701 phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0xf0000000, 0x7); in mpt_SetRFPath_8814A()
702 phy_set_bb_reg(pAdapter, rTxAnt_1Nsts_Jaguar2, 0x000f00000, 0xe); in mpt_SetRFPath_8814A()
703 phy_set_bb_reg(pAdapter, rTxPath_Jaguar, 0xf0, 0xe); in mpt_SetRFPath_8814A()
708 /*pHalData->ValidTxPath = 0x06;*/ in mpt_SetRFPath_8814A()
709 phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0xf0000000, 0x6); in mpt_SetRFPath_8814A()
710 phy_set_bb_reg(pAdapter, rTxAnt_1Nsts_Jaguar2, 0x000f00000, 0x6); in mpt_SetRFPath_8814A()
711 phy_set_bb_reg(pAdapter, rTxPath_Jaguar, 0xf0, 0x6); in mpt_SetRFPath_8814A()
715 /*pHalData->ValidTxPath = 0x02;*/ in mpt_SetRFPath_8814A()
716 phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0xf0000000, 0x4); /*/ 0xa07[7:4] = 4'b0100*/ in mpt_SetRFPath_8814A()
717 …phy_set_bb_reg(pAdapter, rTxAnt_1Nsts_Jaguar2, 0xfff00000, 0x002); /*/ 0x93C[31:20]=12'b0000_0000_… in mpt_SetRFPath_8814A()
718 phy_set_bb_reg(pAdapter, rTxPath_Jaguar, 0xf0, 0x2); /* 0x80C[7:4] = 4'b0010*/ in mpt_SetRFPath_8814A()
723 /*pHalData->ValidTxPath = 0x04;*/ in mpt_SetRFPath_8814A()
724 phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0xf0000000, 0x2); /*/ 0xa07[7:4] = 4'b0010*/ in mpt_SetRFPath_8814A()
725 …phy_set_bb_reg(pAdapter, rTxAnt_1Nsts_Jaguar2, 0xfff00000, 0x004); /*/ 0x93C[31:20]=12'b0000_0000_… in mpt_SetRFPath_8814A()
726 phy_set_bb_reg(pAdapter, rTxPath_Jaguar, 0xf0, 0x4); /*/ 0x80C[7:4] = 4'b0100*/ in mpt_SetRFPath_8814A()
731 /*pHalData->ValidTxPath = 0x08;*/ in mpt_SetRFPath_8814A()
732 phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0xf0000000, 0x1); /*/ 0xa07[7:4] = 4'b0001*/ in mpt_SetRFPath_8814A()
733 …phy_set_bb_reg(pAdapter, rTxAnt_1Nsts_Jaguar2, 0xfff00000, 0x008); /*/ 0x93C[31:20]=12'b0000_0000_… in mpt_SetRFPath_8814A()
734 phy_set_bb_reg(pAdapter, rTxPath_Jaguar, 0xf0, 0x8); /*/ 0x80C[7:4] = 4'b1000*/ in mpt_SetRFPath_8814A()
740 /*pHalData->ValidTxPath = 0x01;*/ in mpt_SetRFPath_8814A()
741 phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0xf0000000, 0x8); /*/ 0xa07[7:4] = 4'b1000*/ in mpt_SetRFPath_8814A()
742 …phy_set_bb_reg(pAdapter, rTxAnt_1Nsts_Jaguar2, 0xfff00000, 0x001); /*/ 0x93C[31:20]=12'b0000_0000_… in mpt_SetRFPath_8814A()
743 phy_set_bb_reg(pAdapter, rTxPath_Jaguar, 0xf0, 0x1); /*/ 0x80C[7:4] = 4'b0001*/ in mpt_SetRFPath_8814A()
750 /*pHalData->ValidRxPath = 0x01;*/ in mpt_SetRFPath_8814A()
751 phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x1); in mpt_SetRFPath_8814A()
752 phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x2); in mpt_SetRFPath_8814A()
753 phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x11); in mpt_SetRFPath_8814A()
754 phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x3); in mpt_SetRFPath_8814A()
755 phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x0); in mpt_SetRFPath_8814A()
756 phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0x0C000000, 0x0); in mpt_SetRFPath_8814A()
757 …phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_A_0x0[19:16] = 3, RX mode*/ in mpt_SetRFPath_8814A()
758 …phy_set_rf_reg(pAdapter, RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_B_0x0[19:16] = 1, Standby … in mpt_SetRFPath_8814A()
759 …phy_set_rf_reg(pAdapter, RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_C_0x0[19:16] = 1, Standby … in mpt_SetRFPath_8814A()
760 …phy_set_rf_reg(pAdapter, RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_D_0x0[19:16] = 1, Standby … in mpt_SetRFPath_8814A()
762 phy_set_bb_reg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x5); in mpt_SetRFPath_8814A()
763 phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0xA); in mpt_SetRFPath_8814A()
767 /*pHalData->ValidRxPath = 0x02;*/ in mpt_SetRFPath_8814A()
768 phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x1); in mpt_SetRFPath_8814A()
769 phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x2); in mpt_SetRFPath_8814A()
770 phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x22); in mpt_SetRFPath_8814A()
771 phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x3); in mpt_SetRFPath_8814A()
772 phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x0); in mpt_SetRFPath_8814A()
773 phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0x0C000000, 0x1); in mpt_SetRFPath_8814A()
774 …phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_A_0x0[19:16] = 1, Standby … in mpt_SetRFPath_8814A()
775 …phy_set_rf_reg(pAdapter, RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_B_0x0[19:16] = 3, RX mode*/ in mpt_SetRFPath_8814A()
776 …phy_set_rf_reg(pAdapter, RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_C_0x0[19:16] = 1, Standby … in mpt_SetRFPath_8814A()
777 …phy_set_rf_reg(pAdapter, RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_D_0x0[19:16] = 1, Standby … in mpt_SetRFPath_8814A()
779 phy_set_bb_reg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x5); in mpt_SetRFPath_8814A()
780 phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0xA); in mpt_SetRFPath_8814A()
784 /*pHalData->ValidRxPath = 0x04;*/ in mpt_SetRFPath_8814A()
785 phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x1); in mpt_SetRFPath_8814A()
786 phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x2); in mpt_SetRFPath_8814A()
787 phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x44); in mpt_SetRFPath_8814A()
788 phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x3); in mpt_SetRFPath_8814A()
789 phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x0); in mpt_SetRFPath_8814A()
790 phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0x0C000000, 0x2); in mpt_SetRFPath_8814A()
791 …phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_A_0x0[19:16] = 1, Standby … in mpt_SetRFPath_8814A()
792 …phy_set_rf_reg(pAdapter, RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_B_0x0[19:16] = 1, Standby … in mpt_SetRFPath_8814A()
793 …phy_set_rf_reg(pAdapter, RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_C_0x0[19:16] = 3, RX mode*/ in mpt_SetRFPath_8814A()
794 …phy_set_rf_reg(pAdapter, RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_D_0x0[19:16] = 1, Standby … in mpt_SetRFPath_8814A()
796 phy_set_bb_reg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x5); in mpt_SetRFPath_8814A()
797 phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0xA); in mpt_SetRFPath_8814A()
801 /*pHalData->ValidRxPath = 0x08;*/ in mpt_SetRFPath_8814A()
802 phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x1); in mpt_SetRFPath_8814A()
803 phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x2); in mpt_SetRFPath_8814A()
804 phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x88); in mpt_SetRFPath_8814A()
805 phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x3); in mpt_SetRFPath_8814A()
806 phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x0); in mpt_SetRFPath_8814A()
807 phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0x0C000000, 0x3); in mpt_SetRFPath_8814A()
808 …phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_A_0x0[19:16] = 1, Standby … in mpt_SetRFPath_8814A()
809 …phy_set_rf_reg(pAdapter, RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_B_0x0[19:16] = 1, Standby … in mpt_SetRFPath_8814A()
810 …phy_set_rf_reg(pAdapter, RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_C_0x0[19:16] = 1, Standby … in mpt_SetRFPath_8814A()
811 …phy_set_rf_reg(pAdapter, RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_D_0x0[19:16] = 3, RX mode*/ in mpt_SetRFPath_8814A()
813 phy_set_bb_reg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x5); in mpt_SetRFPath_8814A()
814 phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0xA); in mpt_SetRFPath_8814A()
818 /*pHalData->ValidRxPath = 0x06;*/ in mpt_SetRFPath_8814A()
819 phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x1); in mpt_SetRFPath_8814A()
820 phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x2); in mpt_SetRFPath_8814A()
821 phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x66); in mpt_SetRFPath_8814A()
822 phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x3); in mpt_SetRFPath_8814A()
823 phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x0); in mpt_SetRFPath_8814A()
824 phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0x0f000000, 0x6); in mpt_SetRFPath_8814A()
825 …phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_A_0x0[19:16] = 1, Standby … in mpt_SetRFPath_8814A()
826 …phy_set_rf_reg(pAdapter, RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_B_0x0[19:16] = 3, RX mode*/ in mpt_SetRFPath_8814A()
827 …phy_set_rf_reg(pAdapter, RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_C_0x0[19:16] = 3, Rx mode*/ in mpt_SetRFPath_8814A()
828 …phy_set_rf_reg(pAdapter, RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_D_0x0[19:16] = 1, Standby … in mpt_SetRFPath_8814A()
830 phy_set_bb_reg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x5); in mpt_SetRFPath_8814A()
831 phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0xA); in mpt_SetRFPath_8814A()
835 /*pHalData->ValidRxPath = 0x0C;*/ in mpt_SetRFPath_8814A()
836 phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x1); in mpt_SetRFPath_8814A()
837 phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x2); in mpt_SetRFPath_8814A()
838 phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0xcc); in mpt_SetRFPath_8814A()
839 phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x3); in mpt_SetRFPath_8814A()
840 phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x0); in mpt_SetRFPath_8814A()
841 phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0x0f000000, 0xB); in mpt_SetRFPath_8814A()
842 …phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_A_0x0[19:16] = 1, Standby … in mpt_SetRFPath_8814A()
843 …phy_set_rf_reg(pAdapter, RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_B_0x0[19:16] = 1, Standby … in mpt_SetRFPath_8814A()
844 …phy_set_rf_reg(pAdapter, RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_C_0x0[19:16] = 3, Rx mode*/ in mpt_SetRFPath_8814A()
845 …phy_set_rf_reg(pAdapter, RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_D_0x0[19:16] = 3, RX mode*/ in mpt_SetRFPath_8814A()
847 phy_set_bb_reg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x5); in mpt_SetRFPath_8814A()
848 phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0xA); in mpt_SetRFPath_8814A()
852 /*pHalData->ValidRxPath = 0x0e;*/ in mpt_SetRFPath_8814A()
853 phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x1); in mpt_SetRFPath_8814A()
854 phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x2); in mpt_SetRFPath_8814A()
855 phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0xee); in mpt_SetRFPath_8814A()
856 phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x3); in mpt_SetRFPath_8814A()
857 phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x0); in mpt_SetRFPath_8814A()
858 phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0x0f000000, 0x6); in mpt_SetRFPath_8814A()
859 …phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_A_0x0[19:16] = 1, Standby … in mpt_SetRFPath_8814A()
860 …phy_set_rf_reg(pAdapter, RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_B_0x0[19:16] = 3, RX mode*/ in mpt_SetRFPath_8814A()
861 …phy_set_rf_reg(pAdapter, RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_C_0x0[19:16] = 3, RX mode*/ in mpt_SetRFPath_8814A()
862 …phy_set_rf_reg(pAdapter, RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_D_0x0[19:16] = 3, Rx mode*/ in mpt_SetRFPath_8814A()
864 phy_set_bb_reg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x3); in mpt_SetRFPath_8814A()
865 phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0x8); in mpt_SetRFPath_8814A()
869 /*pHalData->ValidRxPath = 0x0f;*/ in mpt_SetRFPath_8814A()
870 phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x1); in mpt_SetRFPath_8814A()
871 phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x2); in mpt_SetRFPath_8814A()
872 phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0xff); in mpt_SetRFPath_8814A()
873 phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x3); in mpt_SetRFPath_8814A()
874 phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x0); in mpt_SetRFPath_8814A()
875 phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0x0f000000, 0x1); in mpt_SetRFPath_8814A()
876 …phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_A_0x0[19:16] = 3, RX mode*/ in mpt_SetRFPath_8814A()
877 …phy_set_rf_reg(pAdapter, RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_B_0x0[19:16] = 3, RX mode*/ in mpt_SetRFPath_8814A()
878 …phy_set_rf_reg(pAdapter, RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_C_0x0[19:16] = 3, RX mode*/ in mpt_SetRFPath_8814A()
879 …phy_set_rf_reg(pAdapter, RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_D_0x0[19:16] = 3, RX mode*/ in mpt_SetRFPath_8814A()
881 phy_set_bb_reg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x3); in mpt_SetRFPath_8814A()
882 phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0x8); in mpt_SetRFPath_8814A()
906 static u32 regIG0 = 0, regIG1 = 0, regIG2 = 0, regIG3 = 0; in mpt_SetSingleTone_8814A()
909 regIG0 = phy_query_bb_reg(pAdapter, rA_TxScale_Jaguar, bMaskDWord); /*/ 0xC1C[31:21]*/ in mpt_SetSingleTone_8814A()
910 regIG1 = phy_query_bb_reg(pAdapter, rB_TxScale_Jaguar, bMaskDWord); /*/ 0xE1C[31:21]*/ in mpt_SetSingleTone_8814A()
911 regIG2 = phy_query_bb_reg(pAdapter, rC_TxScale_Jaguar2, bMaskDWord); /*/ 0x181C[31:21]*/ in mpt_SetSingleTone_8814A()
912 regIG3 = phy_query_bb_reg(pAdapter, rD_TxScale_Jaguar2, bMaskDWord); /*/ 0x1A1C[31:21]*/ in mpt_SetSingleTone_8814A()
946 phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x1); /*/ Disable CCA*/ in mpt_SetSingleTone_8814A()
949 phy_set_rf_reg(pAdapter, path, RF_AC_Jaguar, 0xF0000, 0x2); /*/ Tx mode: RF0x00[19:16]=4'b0010 */ in mpt_SetSingleTone_8814A()
950 …phy_set_rf_reg(pAdapter, path, RF_AC_Jaguar, 0x1F, 0x0); /*/ Lowest RF gain index: RF_0x0[4:0] = 0… in mpt_SetSingleTone_8814A()
952 phy_set_rf_reg(pAdapter, path, lna_low_gain_3, BIT1, 0x1); /*/ RF LO enabled*/ in mpt_SetSingleTone_8814A()
955 phy_set_bb_reg(pAdapter, rA_TxScale_Jaguar, 0xFFE00000, 0); /*/ 0xC1C[31:21]*/ in mpt_SetSingleTone_8814A()
956 phy_set_bb_reg(pAdapter, rB_TxScale_Jaguar, 0xFFE00000, 0); /*/ 0xE1C[31:21]*/ in mpt_SetSingleTone_8814A()
957 phy_set_bb_reg(pAdapter, rC_TxScale_Jaguar2, 0xFFE00000, 0); /*/ 0x181C[31:21]*/ in mpt_SetSingleTone_8814A()
958 phy_set_bb_reg(pAdapter, rD_TxScale_Jaguar2, 0xFFE00000, 0); /*/ 0x1A1C[31:21]*/ in mpt_SetSingleTone_8814A()
987 phy_set_rf_reg(pAdapter, path, lna_low_gain_3, BIT1, 0x0); /* RF LO disabled */ in mpt_SetSingleTone_8814A()
989 phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x0); /* Enable CCA*/ in mpt_SetSingleTone_8814A()
1002 phy_set_bb_reg(pAdapter, rA_TxScale_Jaguar, bMaskDWord, regIG0); /* 0xC1C[31:21]*/ in mpt_SetSingleTone_8814A()
1003 phy_set_bb_reg(pAdapter, rB_TxScale_Jaguar, bMaskDWord, regIG1); /* 0xE1C[31:21]*/ in mpt_SetSingleTone_8814A()
1004 phy_set_bb_reg(pAdapter, rC_TxScale_Jaguar2, bMaskDWord, regIG2); /* 0x181C[31:21]*/ in mpt_SetSingleTone_8814A()
1005 phy_set_bb_reg(pAdapter, rD_TxScale_Jaguar2, bMaskDWord, regIG3); /* 0x1A1C[31:21]*/ in mpt_SetSingleTone_8814A()
1021 u32 reg0xC50 = 0; in mpt_SetRFPath_8812A()
1029 phy_set_bb_reg(pAdapter, rTxPath_Jaguar, bMaskLWord, 0x1111); in mpt_SetRFPath_8812A()
1031 phy_set_bb_reg(pAdapter, r_ANTSEL_SW_Jaguar, bMask_AntselPathFollow_Jaguar, 0x0); in mpt_SetRFPath_8812A()
1035 phy_set_bb_reg(pAdapter, rTxPath_Jaguar, bMaskLWord, 0x2222); in mpt_SetRFPath_8812A()
1037 phy_set_bb_reg(pAdapter, r_ANTSEL_SW_Jaguar, bMask_AntselPathFollow_Jaguar, 0x1); in mpt_SetRFPath_8812A()
1041 phy_set_bb_reg(pAdapter, rTxPath_Jaguar, bMaskLWord, 0x3333); in mpt_SetRFPath_8812A()
1043 phy_set_bb_reg(pAdapter, r_ANTSEL_SW_Jaguar, bMask_AntselPathFollow_Jaguar, 0x0); in mpt_SetRFPath_8812A()
1053 phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x11); in mpt_SetRFPath_8812A()
1054 …phy_set_rf_reg(pAdapter, RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_B_0x0[19:16] = 1, Standby … in mpt_SetRFPath_8812A()
1055 phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, bCCK_RX_Jaguar, 0x0); in mpt_SetRFPath_8812A()
1056 phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC_Jaguar, BIT19 | BIT18 | BIT17 | BIT16, 0x3); in mpt_SetRFPath_8812A()
1067 && eLNA_2g == 0) { in mpt_SetRFPath_8812A()
1068 /* 0x830[3:1]=3'b010 */ in mpt_SetRFPath_8812A()
1069 phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, BIT1 | BIT2 | BIT3, 0x02); in mpt_SetRFPath_8812A()
1071 /* 0x830[3:1]=3'b100 */ in mpt_SetRFPath_8812A()
1072 phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, BIT1 | BIT2 | BIT3, 0x04); in mpt_SetRFPath_8812A()
1074 /* 0x830[3:1]=3'b100 for 5G */ in mpt_SetRFPath_8812A()
1075 phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, BIT1 | BIT2 | BIT3, 0x04); in mpt_SetRFPath_8812A()
1079 phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x22); in mpt_SetRFPath_8812A()
1080 …phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1);/*/ RF_A_0x0[19:16] = 1, Standby m… in mpt_SetRFPath_8812A()
1081 phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, bCCK_RX_Jaguar, 0x1); in mpt_SetRFPath_8812A()
1082 phy_set_rf_reg(pAdapter, RF_PATH_B, RF_AC_Jaguar, BIT19 | BIT18 | BIT17 | BIT16, 0x3); in mpt_SetRFPath_8812A()
1093 && eLNA_2g == 0) { in mpt_SetRFPath_8812A()
1094 /* 0x830[3:1]=3'b010 */ in mpt_SetRFPath_8812A()
1095 phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, BIT1 | BIT2 | BIT3, 0x02); in mpt_SetRFPath_8812A()
1097 /* 0x830[3:1]=3'b100 */ in mpt_SetRFPath_8812A()
1098 phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, BIT1 | BIT2 | BIT3, 0x04); in mpt_SetRFPath_8812A()
1100 /* 0x830[3:1]=3'b100 for 5G */ in mpt_SetRFPath_8812A()
1101 phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, BIT1 | BIT2 | BIT3, 0x04); in mpt_SetRFPath_8812A()
1105 phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x33); in mpt_SetRFPath_8812A()
1106 …phy_set_rf_reg(pAdapter, RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_B_0x0[19:16] = 3, Rx mode*/ in mpt_SetRFPath_8812A()
1107 phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, bCCK_RX_Jaguar, 0x0); in mpt_SetRFPath_8812A()
1109 phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, BIT1 | BIT2 | BIT3, 0x04); in mpt_SetRFPath_8812A()
1119 phy_set_bb_reg(pAdapter, r_ANTSEL_SW_Jaguar, BIT(1) | BIT(0), 0x2); in mpt_SetRFPath_8812A()
1120 phy_set_bb_reg(pAdapter, r_ANTSEL_SW_Jaguar, BIT(9) | BIT(8), 0x3); in mpt_SetRFPath_8812A()
1123 phy_set_bb_reg(pAdapter, r_ANTSEL_SW_Jaguar, BIT(1) | BIT(0), 0x1); in mpt_SetRFPath_8812A()
1124 phy_set_bb_reg(pAdapter, r_ANTSEL_SW_Jaguar, BIT(9) | BIT(8), 0x3); in mpt_SetRFPath_8812A()
1151 phy_set_bb_reg(pAdapter, rS0S1_PathSwitch, BIT9 | BIT8 | BIT7, 0x0); in mpt_SetRFPath_8723B()
1152 phy_set_bb_reg(pAdapter, 0xB2C, BIT31, 0x0); /* AGC Table Sel*/ in mpt_SetRFPath_8723B()
1154 for (i = 0; i < 3; ++i) { in mpt_SetRFPath_8723B()
1155 u32 offset = pRFCalibrateInfo->tx_iqc_8723b[RF_PATH_A][i][0]; in mpt_SetRFPath_8723B()
1158 if (offset != 0) { in mpt_SetRFPath_8723B()
1160 RTW_INFO("Switch to S1 TxIQC(offset, data) = (0x%X, 0x%X)\n", offset, data); in mpt_SetRFPath_8723B()
1163 for (i = 0; i < 2; ++i) { in mpt_SetRFPath_8723B()
1164 u32 offset = pRFCalibrateInfo->rx_iqc_8723b[RF_PATH_A][i][0]; in mpt_SetRFPath_8723B()
1167 if (offset != 0) { in mpt_SetRFPath_8723B()
1169 RTW_INFO("Switch to S1 RxIQC (offset, data) = (0x%X, 0x%X)\n", offset, data); in mpt_SetRFPath_8723B()
1179 phy_set_bb_reg(pAdapter, rS0S1_PathSwitch, BIT9 | BIT8 | BIT7, 0x5); in mpt_SetRFPath_8723B()
1180 phy_set_bb_reg(pAdapter, 0xB2C, BIT31, 0x1); /*/ AGC Table Sel.*/ in mpt_SetRFPath_8723B()
1182 for (i = 0; i < 3; ++i) { in mpt_SetRFPath_8723B()
1184 offset = pRFCalibrateInfo->tx_iqc_8723b[RF_PATH_A][i][0]; in mpt_SetRFPath_8723B()
1186 if (pRFCalibrateInfo->tx_iqc_8723b[RF_PATH_B][i][0] != 0) { in mpt_SetRFPath_8723B()
1188 RTW_INFO("Switch to S0 TxIQC (offset, data) = (0x%X, 0x%X)\n", offset, data); in mpt_SetRFPath_8723B()
1192 for (i = 0; i < 2; ++i) { in mpt_SetRFPath_8723B()
1193 offset = pRFCalibrateInfo->rx_iqc_8723b[RF_PATH_A][i][0]; in mpt_SetRFPath_8723B()
1195 if (pRFCalibrateInfo->rx_iqc_8723b[RF_PATH_B][i][0] != 0) { in mpt_SetRFPath_8723B()
1197 RTW_INFO("Switch to S0 RxIQC (offset, data) = (0x%X, 0x%X)\n", offset, data); in mpt_SetRFPath_8723B()
1230 phy_set_bb_reg(pAdapter, rS0S1_PathSwitch, BIT9 | BIT8 | BIT7, 0x0); in mpt_SetRFPath_8703B()
1231 phy_set_bb_reg(pAdapter, 0xB2C, BIT31, 0x0); /* AGC Table Sel*/ in mpt_SetRFPath_8703B()
1233 for (i = 0; i < 3; ++i) { in mpt_SetRFPath_8703B()
1234 u32 offset = pRFCalibrateInfo->tx_iqc_8703b[i][0]; in mpt_SetRFPath_8703B()
1237 if (offset != 0) { in mpt_SetRFPath_8703B()
1239 RTW_INFO("Switch to S1 TxIQC(offset, data) = (0x%X, 0x%X)\n", offset, data); in mpt_SetRFPath_8703B()
1243 for (i = 0; i < 2; ++i) { in mpt_SetRFPath_8703B()
1244 u32 offset = pRFCalibrateInfo->rx_iqc_8703b[i][0]; in mpt_SetRFPath_8703B()
1247 if (offset != 0) { in mpt_SetRFPath_8703B()
1249 RTW_INFO("Switch to S1 RxIQC (offset, data) = (0x%X, 0x%X)\n", offset, data); in mpt_SetRFPath_8703B()
1256 phy_set_bb_reg(pAdapter, rS0S1_PathSwitch, BIT9 | BIT8 | BIT7, 0x5); in mpt_SetRFPath_8703B()
1257 phy_set_bb_reg(pAdapter, 0xB2C, BIT31, 0x1); /* AGC Table Sel */ in mpt_SetRFPath_8703B()
1259 for (i = 0; i < 3; ++i) { in mpt_SetRFPath_8703B()
1260 u32 offset = pRFCalibrateInfo->tx_iqc_8703b[i][0]; in mpt_SetRFPath_8703B()
1263 if (pRFCalibrateInfo->tx_iqc_8703b[i][0] != 0) { in mpt_SetRFPath_8703B()
1265 RTW_INFO("Switch to S0 TxIQC (offset, data) = (0x%X, 0x%X)\n", offset, data); in mpt_SetRFPath_8703B()
1268 for (i = 0; i < 2; ++i) { in mpt_SetRFPath_8703B()
1269 u32 offset = pRFCalibrateInfo->rx_iqc_8703b[i][0]; in mpt_SetRFPath_8703B()
1272 if (pRFCalibrateInfo->rx_iqc_8703b[i][0] != 0) { in mpt_SetRFPath_8703B()
1274 RTW_INFO("Switch to S0 RxIQC (offset, data) = (0x%X, 0x%X)\n", offset, data); in mpt_SetRFPath_8703B()
1291 u8 p = 0, i = 0; in mpt_SetRFPath_8723D()
1292 u32 ulAntennaTx, ulAntennaRx, offset = 0, data = 0, val32 = 0; in mpt_SetRFPath_8723D()
1309 phy_set_bb_reg(pAdapter, rS0S1_PathSwitch, BIT9|BIT8|BIT7|BIT6, 0); in mpt_SetRFPath_8723D()
1315 phy_set_bb_reg(pAdapter, rS0S1_PathSwitch, BIT9|BIT8|BIT7|BIT6, 0xA); in mpt_SetRFPath_8723D()
1333 u8 r_rx_antenna_ofdm = 0, r_ant_select_cck_val = 0; in mpt_SetRFPath_819X()
1334 u8 chgTx = 0, chgRx = 0; in mpt_SetRFPath_819X()
1335 u32 r_ant_sel_cck_val = 0, r_ant_select_ofdm_val = 0, r_ofdm_tx_en_val = 0; in mpt_SetRFPath_819X()
1343 p_ofdm_tx->r_ant_ht1 = 0x1; in mpt_SetRFPath_819X()
1344 p_ofdm_tx->r_ant_ht2 = 0x2;/*Second TX RF path is A*/ in mpt_SetRFPath_819X()
1345 p_ofdm_tx->r_ant_non_ht = 0x3;/*/ 0x1+0x2=0x3 */ in mpt_SetRFPath_819X()
1349 p_ofdm_tx->r_tx_antenna = 0x1; in mpt_SetRFPath_819X()
1350 r_ofdm_tx_en_val = 0x1; in mpt_SetRFPath_819X()
1351 p_ofdm_tx->r_ant_l = 0x1; in mpt_SetRFPath_819X()
1352 p_ofdm_tx->r_ant_ht_s1 = 0x1; in mpt_SetRFPath_819X()
1353 p_ofdm_tx->r_ant_non_ht_s1 = 0x1; in mpt_SetRFPath_819X()
1354 p_cck_txrx->r_ccktx_enable = 0x8; in mpt_SetRFPath_819X()
1359 phy_set_bb_reg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 2); in mpt_SetRFPath_819X()
1360 phy_set_bb_reg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 1); in mpt_SetRFPath_819X()
1361 r_ofdm_tx_en_val = 0x3; in mpt_SetRFPath_819X()
1363 /*/cosa r_ant_select_ofdm_val = 0x11111111;*/ in mpt_SetRFPath_819X()
1366 phy_set_bb_reg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0); in mpt_SetRFPath_819X()
1368 phy_set_bb_reg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0); in mpt_SetRFPath_819X()
1370 phy_set_bb_reg(pAdapter, rFPGA0_XAB_RFParameter, BIT17, 0); in mpt_SetRFPath_819X()
1376 p_ofdm_tx->r_tx_antenna = 0x2; in mpt_SetRFPath_819X()
1377 r_ofdm_tx_en_val = 0x2; in mpt_SetRFPath_819X()
1378 p_ofdm_tx->r_ant_l = 0x2; in mpt_SetRFPath_819X()
1379 p_ofdm_tx->r_ant_ht_s1 = 0x2; in mpt_SetRFPath_819X()
1380 p_ofdm_tx->r_ant_non_ht_s1 = 0x2; in mpt_SetRFPath_819X()
1381 p_cck_txrx->r_ccktx_enable = 0x4; in mpt_SetRFPath_819X()
1386 phy_set_bb_reg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 1); in mpt_SetRFPath_819X()
1387 phy_set_bb_reg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 2); in mpt_SetRFPath_819X()
1393 phy_set_bb_reg(pAdapter, rFPGA0_XA_RFInterfaceOE, BIT10, 0); in mpt_SetRFPath_819X()
1394 phy_set_bb_reg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0); in mpt_SetRFPath_819X()
1395 /*/phy_set_bb_reg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0);*/ in mpt_SetRFPath_819X()
1396 phy_set_bb_reg(pAdapter, rFPGA0_XAB_RFParameter, BIT1, 0); in mpt_SetRFPath_819X()
1403 p_ofdm_tx->r_tx_antenna = 0x3; in mpt_SetRFPath_819X()
1404 r_ofdm_tx_en_val = 0x3; in mpt_SetRFPath_819X()
1405 p_ofdm_tx->r_ant_l = 0x3; in mpt_SetRFPath_819X()
1406 p_ofdm_tx->r_ant_ht_s1 = 0x3; in mpt_SetRFPath_819X()
1407 p_ofdm_tx->r_ant_non_ht_s1 = 0x3; in mpt_SetRFPath_819X()
1408 p_cck_txrx->r_ccktx_enable = 0xC; in mpt_SetRFPath_819X()
1413 phy_set_bb_reg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 2); in mpt_SetRFPath_819X()
1414 phy_set_bb_reg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 2); in mpt_SetRFPath_819X()
1416 /*cosa r_ant_select_ofdm_val = 0x3321333;*/ in mpt_SetRFPath_819X()
1419 phy_set_bb_reg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0); in mpt_SetRFPath_819X()
1421 phy_set_bb_reg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0); in mpt_SetRFPath_819X()
1422 /*/phy_set_bb_reg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0);*/ in mpt_SetRFPath_819X()
1432 #if 0 in mpt_SetRFPath_819X()
1434 /* r_cckrx_enable : CCK default, 0=A, 1=B, 2=C, 3=D */ in mpt_SetRFPath_819X()
1435 /* r_cckrx_enable_2 : CCK option, 0=A, 1=B, 2=C, 3=D */ in mpt_SetRFPath_819X()
1439 r_rx_antenna_ofdm = 0x1; /* A*/ in mpt_SetRFPath_819X()
1440 p_cck_txrx->r_cckrx_enable = 0x0; /* default: A*/ in mpt_SetRFPath_819X()
1441 p_cck_txrx->r_cckrx_enable_2 = 0x0; /* option: A*/ in mpt_SetRFPath_819X()
1445 r_rx_antenna_ofdm = 0x2; /*/ B*/ in mpt_SetRFPath_819X()
1446 p_cck_txrx->r_cckrx_enable = 0x1; /*/ default: B*/ in mpt_SetRFPath_819X()
1447 p_cck_txrx->r_cckrx_enable_2 = 0x1; /*/ option: B*/ in mpt_SetRFPath_819X()
1451 r_rx_antenna_ofdm = 0x3;/*/ AB*/ in mpt_SetRFPath_819X()
1452 p_cck_txrx->r_cckrx_enable = 0x0;/*/ default:A*/ in mpt_SetRFPath_819X()
1453 p_cck_txrx->r_cckrx_enable_2 = 0x1;/*/ option:B*/ in mpt_SetRFPath_819X()
1467 phy_set_bb_reg(pAdapter, rFPGA1_TxInfo, 0x7fffffff, r_ant_select_ofdm_val); /*/OFDM Tx*/ in mpt_SetRFPath_819X()
1468 phy_set_bb_reg(pAdapter, rFPGA0_TxInfo, 0x0000000f, r_ofdm_tx_en_val); /*/OFDM Tx*/ in mpt_SetRFPath_819X()
1469 phy_set_bb_reg(pAdapter, rOFDM0_TRxPathEnable, 0x0000000f, r_rx_antenna_ofdm); /*/OFDM Rx*/ in mpt_SetRFPath_819X()
1470 phy_set_bb_reg(pAdapter, rOFDM1_TRxPathEnable, 0x0000000f, r_rx_antenna_ofdm); /*/OFDM Rx*/ in mpt_SetRFPath_819X()
1472 phy_set_bb_reg(pAdapter, rOFDM0_TRxPathEnable, 0x000000F0, r_rx_antenna_ofdm); /*/OFDM Rx*/ in mpt_SetRFPath_819X()
1473 phy_set_bb_reg(pAdapter, rOFDM1_TRxPathEnable, 0x000000F0, r_rx_antenna_ofdm); /*/OFDM Rx*/ in mpt_SetRFPath_819X()
1549 enum bb_path bb_tx = 0; in hal_mpt_SetAntenna()
1606 RTW_INFO("%s ,ant idx %d, tx path_num_nss = %d\n", __func__, anttx, hal->txpath_num_nss[0]); in hal_mpt_SetAntenna()
1702 target_ther &= 0xff; in hal_mpt_SetThermalMeter()
1713 phy_set_rf_reg(pAdapter, RF_PATH_A, 0x42, BIT19, 0x1); in hal_mpt_TriggerRFThermalMeter()
1714 phy_set_rf_reg(pAdapter, RF_PATH_A, 0x42, BIT19, 0x0); in hal_mpt_TriggerRFThermalMeter()
1715 phy_set_rf_reg(pAdapter, RF_PATH_A, 0x42, BIT19, 0x1); in hal_mpt_TriggerRFThermalMeter()
1717 phy_set_rf_reg(pAdapter, RF_PATH_A, 0x42, BIT17 | BIT16, 0x03); in hal_mpt_TriggerRFThermalMeter()
1727 u32 ThermalValue = 0; in hal_mpt_ReadRFThermalMeter()
1728 s32 thermal_value_temp = 0; in hal_mpt_ReadRFThermalMeter()
1729 s8 thermal_offset = 0; in hal_mpt_ReadRFThermalMeter()
1730 u32 thermal_reg_mask = 0; in hal_mpt_ReadRFThermalMeter()
1733 …thermal_reg_mask = 0x007e; /*0x42: RF Reg[6:1], 35332(themal K & bias k & power trim) & 35325(ts… in hal_mpt_ReadRFThermalMeter()
1735 thermal_reg_mask = 0xfc00; /*0x42: RF Reg[15:10]*/ in hal_mpt_ReadRFThermalMeter()
1737 ThermalValue = (u8)phy_query_rf_reg(pAdapter, rf_path, 0x42, thermal_reg_mask); in hal_mpt_ReadRFThermalMeter()
1745 else if (thermal_value_temp < 0) in hal_mpt_ReadRFThermalMeter()
1746 ThermalValue = 0; in hal_mpt_ReadRFThermalMeter()
1756 #if 0 in hal_mpt_GetThermalMeter()
1760 *value &= 0xFF; in hal_mpt_GetThermalMeter()
1783 phy_set_bb_reg(pAdapter, rCCK0_System, bCCKBBMode, 0); in hal_mpt_SetSingleCarrierTx()
1811 phy_set_bb_reg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); in hal_mpt_SetSingleCarrierTx()
1812 phy_set_bb_reg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); in hal_mpt_SetSingleCarrierTx()
1823 static u32 regRF = 0, regBB0 = 0, regBB1 = 0, regBB2 = 0, regBB3 = 0; in hal_mpt_SetSingleToneTx()
1832 config_phydm_write_rf_syn_8814b(pDM_Odm, RF_SYN0, RF_0x0, 0xF0000, 0x2); in hal_mpt_SetSingleToneTx()
1833 /* @Lowest RF gain index: RF_0x0[4:0] = 0*/ in hal_mpt_SetSingleToneTx()
1834 config_phydm_write_rf_syn_8814b(pDM_Odm, RF_SYN0, RF_0x0, 0x1F, 0x0); in hal_mpt_SetSingleToneTx()
1836 config_phydm_write_rf_syn_8814b(pDM_Odm, RF_SYN0, RF_0x58, BIT(1), 0x1); in hal_mpt_SetSingleToneTx()
1838 config_phydm_write_rf_syn_8814b(pDM_Odm, RF_SYN1, RF_0x0, 0xF0000, 0x2); in hal_mpt_SetSingleToneTx()
1839 config_phydm_write_rf_syn_8814b(pDM_Odm, RF_SYN1, RF_0x0, 0x1F, 0x0); in hal_mpt_SetSingleToneTx()
1840 config_phydm_write_rf_syn_8814b(pDM_Odm, RF_SYN1, RF_0x58, BIT(1), 0x1); in hal_mpt_SetSingleToneTx()
1870 phy_set_rf_reg(pAdapter, RF_PATH_A, lna_low_gain_3, BIT1, 0x1); /*/ RF LO enabled*/ in hal_mpt_SetSingleToneTx()
1871 phy_set_bb_reg(pAdapter, rFPGA0_RFMOD, bCCKEn, 0x0); in hal_mpt_SetSingleToneTx()
1872 phy_set_bb_reg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 0x0); in hal_mpt_SetSingleToneTx()
1875 phy_set_mac_reg(pAdapter, 0x88C, 0xF00000, 0xF); in hal_mpt_SetSingleToneTx()
1876 phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, lna_low_gain_3, BIT1, 0x1); /*/ RF LO disabled*/ in hal_mpt_SetSingleToneTx()
1877 phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, RF_AC, 0xF0000, 0x2); /*/ Tx mode*/ in hal_mpt_SetSingleToneTx()
1880 phy_set_mac_reg(pAdapter, REG_LEDCFG0_8192F, BIT23, 0x1); in hal_mpt_SetSingleToneTx()
1881 phy_set_mac_reg(pAdapter, REG_LEDCFG0_8192F, BIT26, 0x1); in hal_mpt_SetSingleToneTx()
1882 phy_set_mac_reg(pAdapter, REG_PAD_CTRL1_8192F, BIT7, 0x1); in hal_mpt_SetSingleToneTx()
1883 phy_set_mac_reg(pAdapter, REG_PAD_CTRL1_8192F, BIT1, 0x1); in hal_mpt_SetSingleToneTx()
1884 phy_set_mac_reg(pAdapter, REG_PAD_CTRL1_8192F, BIT0, 0x1); in hal_mpt_SetSingleToneTx()
1885 phy_set_mac_reg(pAdapter, REG_AFE_CTRL_4_8192F, BIT16, 0x1); in hal_mpt_SetSingleToneTx()
1886 phy_set_bb_reg(pAdapter, 0x88C, 0xF00000, 0xF); in hal_mpt_SetSingleToneTx()
1887 phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, 0x57, BIT1, 0x1); /* RF LO disabled*/ in hal_mpt_SetSingleToneTx()
1888 phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, RF_AC, 0xF0000, 0x2); /* Tx mode*/ in hal_mpt_SetSingleToneTx()
1892 phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC, 0xF0000, 0x2); /*/ Tx mode*/ in hal_mpt_SetSingleToneTx()
1893 phy_set_rf_reg(pAdapter, RF_PATH_A, 0x56, 0xF, 0x1); /*/ RF LO enabled*/ in hal_mpt_SetSingleToneTx()
1896 phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC, 0xF0000, 0x2); /*/ Tx mode*/ in hal_mpt_SetSingleToneTx()
1897 phy_set_rf_reg(pAdapter, RF_PATH_A, 0x76, 0xF, 0x1); /*/ RF LO enabled*/ in hal_mpt_SetSingleToneTx()
1901 phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC, 0xF0000, 0x2); /* Tx mode */ in hal_mpt_SetSingleToneTx()
1902 phy_set_rf_reg(pAdapter, RF_PATH_A, 0x53, 0xF000, 0x1); /* RF LO enabled */ in hal_mpt_SetSingleToneTx()
1906 phy_set_bb_reg(pAdapter, rFPGA0_AnalogParameter4, 0xF00000, 0xF); in hal_mpt_SetSingleToneTx()
1907 phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, lna_low_gain_3, BIT1, 0x1); in hal_mpt_SetSingleToneTx()
1908 phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, RF_AC, 0xF0000, 0x2); in hal_mpt_SetSingleToneTx()
1912 phy_set_bb_reg(pAdapter, rFPGA0_RFMOD, bCCKEn|bOFDMEn, 0); in hal_mpt_SetSingleToneTx()
1913 phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC, BIT16, 0x0); in hal_mpt_SetSingleToneTx()
1914 phy_set_rf_reg(pAdapter, RF_PATH_A, 0x53, BIT0, 0x1); in hal_mpt_SetSingleToneTx()
1916 phy_set_bb_reg(pAdapter, rFPGA0_RFMOD, bCCKEn|bOFDMEn, 0); in hal_mpt_SetSingleToneTx()
1917 phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC, BIT16, 0x0); in hal_mpt_SetSingleToneTx()
1918 phy_set_rf_reg(pAdapter, RF_PATH_A, 0x63, BIT0, 0x1); in hal_mpt_SetSingleToneTx()
1930 phy_set_bb_reg(pAdapter, rOFDMCCKEN_Jaguar, BIT29 | BIT28, 0x0); /*/ Disable CCK and OFDM*/ in hal_mpt_SetSingleToneTx()
1934 phy_set_rf_reg(pAdapter, p, RF_AC_Jaguar, 0xF0000, 0x2); /*/ Tx mode: RF0x00[19:16]=4'b0010 */ in hal_mpt_SetSingleToneTx()
1935 … phy_set_rf_reg(pAdapter, p, RF_AC_Jaguar, 0x1F, 0x0); /*/ Lowest RF gain index: RF_0x0[4:0] = 0*/ in hal_mpt_SetSingleToneTx()
1936 phy_set_rf_reg(pAdapter, p, lna_low_gain_3, BIT1, 0x1); /*/ RF LO enabled*/ in hal_mpt_SetSingleToneTx()
1939 …phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, RF_AC_Jaguar, 0xF0000, 0x2); /*/ Tx mode: RF0x00[19… in hal_mpt_SetSingleToneTx()
1940 …reg(pAdapter, pMptCtx->mpt_rf_path, RF_AC_Jaguar, 0x1F, 0x0); /*/ Lowest RF gain index: RF_0x0[4:0… in hal_mpt_SetSingleToneTx()
1943 phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, 0x75, BIT16, 0x1); /* RF LO (for BTG) enabled */ in hal_mpt_SetSingleToneTx()
1946 phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, lna_low_gain_3, BIT1, 0x1); /*/ RF LO enabled*/ in hal_mpt_SetSingleToneTx()
1949 phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar, bMaskDWord, 0x77777777); /* 0xCB0=0x77777777*/ in hal_mpt_SetSingleToneTx()
1950 phy_set_bb_reg(pAdapter, rB_RFE_Pinmux_Jaguar, bMaskDWord, 0x77777777); /* 0xEB0=0x77777777*/ in hal_mpt_SetSingleToneTx()
1951 … phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar + 4, bMaskLWord, 0x7777); /* 0xCB4[15:0] = 0x7777*/ in hal_mpt_SetSingleToneTx()
1952 … phy_set_bb_reg(pAdapter, rB_RFE_Pinmux_Jaguar + 4, bMaskLWord, 0x7777); /* 0xEB4[15:0] = 0x7777*/ in hal_mpt_SetSingleToneTx()
1953 phy_set_bb_reg(pAdapter, rA_RFE_Inverse_Jaguar, 0xFFF, 0xb); /* 0xCBC[23:16] = 0x12*/ in hal_mpt_SetSingleToneTx()
1954 phy_set_bb_reg(pAdapter, rB_RFE_Inverse_Jaguar, 0xFFF, 0x830); /* 0xEBC[23:16] = 0x12*/ in hal_mpt_SetSingleToneTx()
1956 phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar, 0xF0F0, 0x707); /* 0xCB0[[15:12, 7:4] = 0x707*/ in hal_mpt_SetSingleToneTx()
1960 phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar + 4, 0xA00000, 0x1); /* 0xCB4[23, 21] = 0x1*/ in hal_mpt_SetSingleToneTx()
1964 phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar + 4, 0xA00000, 0x1); /* 0xCB4[23, 21] = 0x1*/ in hal_mpt_SetSingleToneTx()
1967 …phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar, 0xFF00F0, 0x77007); /*/ 0xCB0[[23:16, 7:4] = 0x770… in hal_mpt_SetSingleToneTx()
1968 …phy_set_bb_reg(pAdapter, rB_RFE_Pinmux_Jaguar, 0xFF00F0, 0x77007); /*/ 0xCB0[[23:16, 7:4] = 0x770… in hal_mpt_SetSingleToneTx()
1971 phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar + 4, 0xFF00000, 0x12); /*/ 0xCB4[23:16] = 0x12*/ in hal_mpt_SetSingleToneTx()
1972 phy_set_bb_reg(pAdapter, rB_RFE_Pinmux_Jaguar + 4, 0xFF00000, 0x12); /*/ 0xEB4[23:16] = 0x12*/ in hal_mpt_SetSingleToneTx()
1974 phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar + 4, 0xFF00000, 0x11); /*/ 0xCB4[23:16] = 0x11*/ in hal_mpt_SetSingleToneTx()
1975 phy_set_bb_reg(pAdapter, rB_RFE_Pinmux_Jaguar + 4, 0xFF00000, 0x11); /*/ 0xEB4[23:16] = 0x11*/ in hal_mpt_SetSingleToneTx()
1987 write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); in hal_mpt_SetSingleToneTx()
1988 write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); in hal_mpt_SetSingleToneTx()
1994 phy_set_bb_reg(pAdapter, rFPGA0_RFMOD, bCCKEn, 0x1); in hal_mpt_SetSingleToneTx()
1995 phy_set_bb_reg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 0x1); in hal_mpt_SetSingleToneTx()
1997 phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, RF_AC, 0xF0000, 0x3);/*/ Tx mode*/ in hal_mpt_SetSingleToneTx()
1998 phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, lna_low_gain_3, BIT1, 0x0);/*/ RF LO disabled */ in hal_mpt_SetSingleToneTx()
2000 phy_set_mac_reg(pAdapter, 0x88C, 0xF00000, 0x0); in hal_mpt_SetSingleToneTx()
2003 phy_set_mac_reg(pAdapter, REG_LEDCFG0_8192F, BIT23, 0x0); in hal_mpt_SetSingleToneTx()
2004 phy_set_mac_reg(pAdapter, REG_LEDCFG0_8192F, BIT26, 0x0); in hal_mpt_SetSingleToneTx()
2005 phy_set_mac_reg(pAdapter, REG_PAD_CTRL1_8192F, BIT7, 0x0); in hal_mpt_SetSingleToneTx()
2006 phy_set_mac_reg(pAdapter, REG_PAD_CTRL1_8192F, BIT1, 0x0); in hal_mpt_SetSingleToneTx()
2007 phy_set_mac_reg(pAdapter, REG_PAD_CTRL1_8192F, BIT0, 0x0); in hal_mpt_SetSingleToneTx()
2008 phy_set_mac_reg(pAdapter, REG_AFE_CTRL_4_8192F, BIT16, 0x0); in hal_mpt_SetSingleToneTx()
2009 phy_set_bb_reg(pAdapter, 0x88C, 0xF00000, 0x0); in hal_mpt_SetSingleToneTx()
2010 phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, 0x57, BIT1, 0x0); /* RF LO disabled*/ in hal_mpt_SetSingleToneTx()
2011 phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, RF_AC, 0xF0000, 0x3); /* Rx mode*/ in hal_mpt_SetSingleToneTx()
2015 phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC, 0xF0000, 0x3); /*/ Rx mode*/ in hal_mpt_SetSingleToneTx()
2016 phy_set_rf_reg(pAdapter, RF_PATH_A, 0x56, 0xF, 0x0); /*/ RF LO disabled*/ in hal_mpt_SetSingleToneTx()
2019 phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC, 0xF0000, 0x3); /*/ Rx mode*/ in hal_mpt_SetSingleToneTx()
2020 phy_set_rf_reg(pAdapter, RF_PATH_A, 0x76, 0xF, 0x0); /*/ RF LO disabled*/ in hal_mpt_SetSingleToneTx()
2024 phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC, 0xF0000, 0x3); /* Rx mode */ in hal_mpt_SetSingleToneTx()
2025 phy_set_rf_reg(pAdapter, RF_PATH_A, 0x53, 0xF000, 0x0); /* RF LO disabled */ in hal_mpt_SetSingleToneTx()
2028 phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, RF_AC, 0xF0000, 0x3); /*Tx mode*/ in hal_mpt_SetSingleToneTx()
2029 phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, lna_low_gain_3, BIT1, 0x0); /*RF LO disabled*/ in hal_mpt_SetSingleToneTx()
2031 phy_set_bb_reg(pAdapter, rFPGA0_AnalogParameter4, 0xF00000, 0xc); in hal_mpt_SetSingleToneTx()
2034 phy_set_bb_reg(pAdapter, rFPGA0_RFMOD, bCCKEn|bOFDMEn, 0x3); in hal_mpt_SetSingleToneTx()
2035 phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC, BIT16, 0x1); in hal_mpt_SetSingleToneTx()
2036 phy_set_rf_reg(pAdapter, RF_PATH_A, 0x53, BIT0, 0x0); in hal_mpt_SetSingleToneTx()
2038 phy_set_bb_reg(pAdapter, rFPGA0_RFMOD, bCCKEn|bOFDMEn, 0x3); in hal_mpt_SetSingleToneTx()
2039 phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC, BIT16, 0x1); in hal_mpt_SetSingleToneTx()
2040 phy_set_rf_reg(pAdapter, RF_PATH_A, 0x63, BIT0, 0x0); in hal_mpt_SetSingleToneTx()
2046 phy_set_bb_reg(pAdapter, rOFDMCCKEN_Jaguar, BIT29 | BIT28, 0x3); /*/ Disable CCK and OFDM*/ in hal_mpt_SetSingleToneTx()
2051 phy_set_rf_reg(pAdapter, p, lna_low_gain_3, BIT1, 0x0); /*/ RF LO disabled*/ in hal_mpt_SetSingleToneTx()
2058 phy_set_rf_reg(pAdapter, p, 0x75, BIT16, 0x0); /* RF LO (for BTG) disabled */ in hal_mpt_SetSingleToneTx()
2060 phy_set_rf_reg(pAdapter, p, lna_low_gain_3, BIT1, 0x0); /*/ RF LO disabled*/ in hal_mpt_SetSingleToneTx()
2070 phy_set_bb_reg(pAdapter, rA_RFE_Inverse_Jaguar, 0xfff, 0x0); in hal_mpt_SetSingleToneTx()
2071 phy_set_bb_reg(pAdapter, rB_RFE_Inverse_Jaguar, 0xfff, 0x0); in hal_mpt_SetSingleToneTx()
2082 write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); in hal_mpt_SetSingleToneTx()
2083 write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); in hal_mpt_SetSingleToneTx()
2112 …phy_set_bb_reg(pAdapter, 0x914, BIT18 | BIT17 | BIT16, OFDM_ALL_OFF); /* rSingleTone_ContTx_Jaguar… in hal_mpt_SetCarrierSuppressionTx()
2116 write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x2); /*/transmit mode*/ in hal_mpt_SetCarrierSuppressionTx()
2117 write_bbreg(pAdapter, rCCK0_System, bCCKScramble, 0x0); /*/turn off scramble setting*/ in hal_mpt_SetCarrierSuppressionTx()
2120 write_bbreg(pAdapter, rCCK0_System, bCCKTxRate, 0x0); /*/Set FTxRate to 1Mbps*/ in hal_mpt_SetCarrierSuppressionTx()
2124 write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); in hal_mpt_SetCarrierSuppressionTx()
2125 write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); in hal_mpt_SetCarrierSuppressionTx()
2130 write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x0); /*normal mode*/ in hal_mpt_SetCarrierSuppressionTx()
2131 write_bbreg(pAdapter, rCCK0_System, bCCKScramble, 0x1); /*turn on scramble setting*/ in hal_mpt_SetCarrierSuppressionTx()
2134 write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); in hal_mpt_SetCarrierSuppressionTx()
2135 write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); in hal_mpt_SetCarrierSuppressionTx()
2138 write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); in hal_mpt_SetCarrierSuppressionTx()
2139 write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); in hal_mpt_SetCarrierSuppressionTx()
2149 u16 count = 0; in hal_mpt_query_phytxok()
2164 count = phy_query_bb_reg(pAdapter, 0xF50, bMaskLWord); /* [15:0]*/ in hal_mpt_query_phytxok()
2166 count = phy_query_bb_reg(pAdapter, 0xF50, bMaskHWord); /* [31:16]*/ in hal_mpt_query_phytxok()
2172 count = 0; in hal_mpt_query_phytxok()
2190 phy_set_bb_reg(pAdapter, rCCK0_System, bCCKBBMode, 0x0); /*normal mode*/ in mpt_StopCckContTx()
2191 phy_set_bb_reg(pAdapter, rCCK0_System, bCCKScramble, 0x1); /*turn on scramble setting*/ in mpt_StopCckContTx()
2194 phy_set_bb_reg(pAdapter, 0xa14, 0x300, 0x0); /* 0xa15[1:0] = 2b00*/ in mpt_StopCckContTx()
2195 phy_set_bb_reg(pAdapter, rOFDM0_TRMuxPar, 0x10000, 0x0); /* 0xc08[16] = 0*/ in mpt_StopCckContTx()
2197 phy_set_bb_reg(pAdapter, rFPGA0_XA_HSSIParameter2, BIT14, 0); in mpt_StopCckContTx()
2198 phy_set_bb_reg(pAdapter, rFPGA0_XB_HSSIParameter2, BIT14, 0); in mpt_StopCckContTx()
2199 phy_set_bb_reg(pAdapter, 0x0B34, BIT14, 0); in mpt_StopCckContTx()
2203 phy_set_bb_reg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); in mpt_StopCckContTx()
2204 phy_set_bb_reg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); in mpt_StopCckContTx()
2209 phy_set_bb_reg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); in mpt_StopCckContTx()
2210 phy_set_bb_reg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); in mpt_StopCckContTx()
2217 phy_set_bb_reg(pAdapter, 0xA70, BIT(14), bDisable);/* patch Count CCK adjust Rate*/ in mpt_StopCckContTx()
2236 phy_set_bb_reg(pAdapter, 0x914, BIT18 | BIT17 | BIT16, OFDM_ALL_OFF); in mpt_StopOfdmContTx()
2243 phy_set_bb_reg(pAdapter, 0xa14, 0x300, 0x0); /* 0xa15[1:0] = 0*/ in mpt_StopOfdmContTx()
2244 phy_set_bb_reg(pAdapter, rOFDM0_TRMuxPar, 0x10000, 0x0); /* 0xc08[16] = 0*/ in mpt_StopOfdmContTx()
2248 phy_set_bb_reg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); in mpt_StopOfdmContTx()
2249 phy_set_bb_reg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); in mpt_StopOfdmContTx()
2254 phy_set_bb_reg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); in mpt_StopOfdmContTx()
2255 phy_set_bb_reg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); in mpt_StopOfdmContTx()
2274 phy_set_bb_reg(pAdapter, 0x914, BIT18 | BIT17 | BIT16, OFDM_ALL_OFF); in mpt_StartCckContTx()
2282 phy_set_bb_reg(pAdapter, rCCK0_System, bCCKBBMode, 0x2); /*transmit mode*/ in mpt_StartCckContTx()
2283 phy_set_bb_reg(pAdapter, rCCK0_System, bCCKScramble, 0x1); /*turn on scramble setting*/ in mpt_StartCckContTx()
2286 phy_set_bb_reg(pAdapter, 0xa14, 0x300, 0x3); /* 0xa15[1:0] = 11 force cck rxiq = 0*/ in mpt_StartCckContTx()
2287 …phy_set_bb_reg(pAdapter, rOFDM0_TRMuxPar, 0x10000, 0x1); /* 0xc08[16] = 1 force ofdm rxiq = ofdm … in mpt_StartCckContTx()
2290 phy_set_bb_reg(pAdapter, 0x0B34, BIT14, 1); in mpt_StartCckContTx()
2296 phy_set_bb_reg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); in mpt_StartCckContTx()
2297 phy_set_bb_reg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); in mpt_StartCckContTx()
2305 phy_set_bb_reg(pAdapter, 0xA70, BIT(14), bDisable); in mpt_StartCckContTx()
2307 phy_set_bb_reg(pAdapter, 0xA70, BIT(14), bEnable); in mpt_StartCckContTx()
2328 phy_set_bb_reg(pAdapter, rCCK0_System, bCCKBBMode, 0); in mpt_StartOfdmContTx()
2334 phy_set_bb_reg(pAdapter, 0xa14, 0x300, 0x3); /* 0xa15[1:0] = 2b'11*/ in mpt_StartOfdmContTx()
2335 phy_set_bb_reg(pAdapter, rOFDM0_TRMuxPar, 0x10000, 0x1); /* 0xc08[16] = 1*/ in mpt_StartOfdmContTx()
2340 phy_set_bb_reg(pAdapter, 0x914, BIT18 | BIT17 | BIT16, OFDM_ContinuousTx); in mpt_StartOfdmContTx()
2347 phy_set_bb_reg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); in mpt_StartOfdmContTx()
2348 phy_set_bb_reg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); in mpt_StartOfdmContTx()
2379 phydmtxinfo->service_field_bit2= 0x1; in mpt_convert_phydm_txinfo_for_jaguar3()
2406 #if 0 in mpt_ProSetPMacTx()
2417 if (pmppriv->pktInterval != 0) in mpt_ProSetPMacTx()
2420 if (pmppriv->tx.count != 0) in mpt_ProSetPMacTx()
2480 phy_set_bb_reg(Adapter, 0xb04, 0xf, 2); /* TX Stop*/ in mpt_ProSetPMacTx()
2486 u4bTmp = phy_query_bb_reg(Adapter, 0xf50, bMaskLWord); in mpt_ProSetPMacTx()
2487 phy_set_bb_reg(Adapter, 0xb1c, bMaskLWord, u4bTmp + 50); in mpt_ProSetPMacTx()
2488 phy_set_bb_reg(Adapter, 0xb04, 0xf, 2); /*TX Stop*/ in mpt_ProSetPMacTx()
2490 phy_set_bb_reg(Adapter, 0xb04, 0xf, 2); /* TX Stop*/ in mpt_ProSetPMacTx()
2528 if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE) && PMacTxInfo.PacketCount == 0) in mpt_ProSetPMacTx()
2529 PMacTxInfo.PacketCount = 0xffff; in mpt_ProSetPMacTx()
2533 /* 0xb1c[0:15] TX packet count 0xb1C[31:16] SFD*/ in mpt_ProSetPMacTx()
2535 phy_set_bb_reg(Adapter, 0xb1c, bMaskDWord, u4bTmp); in mpt_ProSetPMacTx()
2536 /* 0xb40 7:0 SIGNAL 15:8 SERVICE 31:16 LENGTH*/ in mpt_ProSetPMacTx()
2538 phy_set_bb_reg(Adapter, 0xb40, bMaskDWord, u4bTmp); in mpt_ProSetPMacTx()
2539 u4bTmp = PMacTxInfo.CRC16[0] | (PMacTxInfo.CRC16[1] << 8); in mpt_ProSetPMacTx()
2540 phy_set_bb_reg(Adapter, 0xb44, bMaskLWord, u4bTmp); in mpt_ProSetPMacTx()
2543 phy_set_bb_reg(Adapter, 0xb0c, BIT27, 0); in mpt_ProSetPMacTx()
2545 phy_set_bb_reg(Adapter, 0xb0c, BIT27, 1); in mpt_ProSetPMacTx()
2547 phy_set_bb_reg(Adapter, 0xb18, 0xfffff, PMacTxInfo.PacketCount); in mpt_ProSetPMacTx()
2549 …u4bTmp = PMacTxInfo.LSIG[0] | ((PMacTxInfo.LSIG[1]) << 8) | ((PMacTxInfo.LSIG[2]) << 16) | ((PMacT… in mpt_ProSetPMacTx()
2550 …phy_set_bb_reg(Adapter, 0xb08, bMaskDWord, u4bTmp); /* Set 0xb08[23:0] = LSIG, 0xb08[31:24] = Dat… in mpt_ProSetPMacTx()
2552 if (PMacTxInfo.PacketPattern == 0x12) in mpt_ProSetPMacTx()
2553 u4bTmp = 0x3000000; in mpt_ProSetPMacTx()
2555 u4bTmp = 0; in mpt_ProSetPMacTx()
2559 u4bTmp |= PMacTxInfo.HT_SIG[0] | ((PMacTxInfo.HT_SIG[1]) << 8) | ((PMacTxInfo.HT_SIG[2]) << 16); in mpt_ProSetPMacTx()
2560 phy_set_bb_reg(Adapter, 0xb0c, bMaskDWord, u4bTmp); in mpt_ProSetPMacTx()
2562 phy_set_bb_reg(Adapter, 0xb10, 0xffffff, u4bTmp); in mpt_ProSetPMacTx()
2564 …u4bTmp |= PMacTxInfo.VHT_SIG_A[0] | ((PMacTxInfo.VHT_SIG_A[1]) << 8) | ((PMacTxInfo.VHT_SIG_A[2]) … in mpt_ProSetPMacTx()
2565 phy_set_bb_reg(Adapter, 0xb0c, bMaskDWord, u4bTmp); in mpt_ProSetPMacTx()
2567 phy_set_bb_reg(Adapter, 0xb10, 0xffffff, u4bTmp); in mpt_ProSetPMacTx()
2570 phy_set_bb_reg(Adapter, 0xb14, bMaskDWord, u4bTmp); in mpt_ProSetPMacTx()
2575 phy_set_bb_reg(Adapter, 0xb20, bMaskDWord, u4bTmp); in mpt_ProSetPMacTx()
2578 phy_set_bb_reg(Adapter, 0xb24, bMaskDWord, u4bTmp); in mpt_ProSetPMacTx()
2580 /* 0xb28 - 0xb34 24 byte Probe Request MAC Header*/ in mpt_ProSetPMacTx()
2582 phy_set_bb_reg(Adapter, 0xb28, bMaskDWord, 0x00000040); in mpt_ProSetPMacTx()
2584 /* Address1 [0:3]*/ in mpt_ProSetPMacTx()
2585 …u4bTmp = PMacTxInfo.MacAddress[0] | (PMacTxInfo.MacAddress[1] << 8) | (PMacTxInfo.MacAddress[2] <<… in mpt_ProSetPMacTx()
2586 phy_set_bb_reg(Adapter, 0xb2C, bMaskDWord, u4bTmp); in mpt_ProSetPMacTx()
2588 /* Address3 [3:0]*/ in mpt_ProSetPMacTx()
2589 phy_set_bb_reg(Adapter, 0xb38, bMaskDWord, u4bTmp); in mpt_ProSetPMacTx()
2591 /* Address2[0:1] & Address1 [5:4]*/ in mpt_ProSetPMacTx()
2592 …u4bTmp = PMacTxInfo.MacAddress[4] | (PMacTxInfo.MacAddress[5] << 8) | (Adapter->mac_addr[0] << 16)… in mpt_ProSetPMacTx()
2593 phy_set_bb_reg(Adapter, 0xb30, bMaskDWord, u4bTmp); in mpt_ProSetPMacTx()
2597 phy_set_bb_reg(Adapter, 0xb34, bMaskDWord, u4bTmp); in mpt_ProSetPMacTx()
2601 /*phy_set_bb_reg(Adapter, 0xb38, bMaskDWord, u4bTmp);*/ in mpt_ProSetPMacTx()
2603 phy_set_bb_reg(Adapter, 0xb20, bMaskDWord, PMacTxInfo.PacketPeriod); /* for TX interval*/ in mpt_ProSetPMacTx()
2605 phy_set_bb_reg(Adapter, 0xb24, bMaskDWord, 0x00000040); in mpt_ProSetPMacTx()
2607 /* 0xb24 - 0xb38 24 byte Probe Request MAC Header*/ in mpt_ProSetPMacTx()
2608 /* Address1 [0:3]*/ in mpt_ProSetPMacTx()
2609 …u4bTmp = PMacTxInfo.MacAddress[0] | (PMacTxInfo.MacAddress[1] << 8) | (PMacTxInfo.MacAddress[2] <<… in mpt_ProSetPMacTx()
2610 phy_set_bb_reg(Adapter, 0xb28, bMaskDWord, u4bTmp); in mpt_ProSetPMacTx()
2612 /* Address3 [3:0]*/ in mpt_ProSetPMacTx()
2613 phy_set_bb_reg(Adapter, 0xb34, bMaskDWord, u4bTmp); in mpt_ProSetPMacTx()
2615 /* Address2[0:1] & Address1 [5:4]*/ in mpt_ProSetPMacTx()
2616 …u4bTmp = PMacTxInfo.MacAddress[4] | (PMacTxInfo.MacAddress[5] << 8) | (Adapter->mac_addr[0] << 16)… in mpt_ProSetPMacTx()
2617 phy_set_bb_reg(Adapter, 0xb2c, bMaskDWord, u4bTmp); in mpt_ProSetPMacTx()
2621 phy_set_bb_reg(Adapter, 0xb30, bMaskDWord, u4bTmp); in mpt_ProSetPMacTx()
2625 phy_set_bb_reg(Adapter, 0xb38, bMaskDWord, u4bTmp); in mpt_ProSetPMacTx()
2628 phy_set_bb_reg(Adapter, 0xb48, bMaskByte3, PMacTxInfo.TX_RATE_HEX); in mpt_ProSetPMacTx()
2630 /* 0xb4c 3:0 TXSC 5:4 BW 7:6 m_STBC 8 NDP_Sound*/ in mpt_ProSetPMacTx()
2632 phy_set_bb_reg(Adapter, 0xb4c, 0x1ff, u4bTmp); in mpt_ProSetPMacTx()
2635 u32 offset = 0xb44; in mpt_ProSetPMacTx()
2638 phy_set_bb_reg(Adapter, offset, 0xc0000000, 0); in mpt_ProSetPMacTx()
2640 phy_set_bb_reg(Adapter, offset, 0xc0000000, 1); in mpt_ProSetPMacTx()
2642 phy_set_bb_reg(Adapter, offset, 0xc0000000, 2); in mpt_ProSetPMacTx()
2645 u32 offset = 0xb4c; in mpt_ProSetPMacTx()
2648 phy_set_bb_reg(Adapter, offset, 0xc0000000, 0); in mpt_ProSetPMacTx()
2650 phy_set_bb_reg(Adapter, offset, 0xc0000000, 1); in mpt_ProSetPMacTx()
2652 phy_set_bb_reg(Adapter, offset, 0xc0000000, 2); in mpt_ProSetPMacTx()
2655 phy_set_bb_reg(Adapter, 0xb00, BIT8, 1); /* Turn on PMAC*/ in mpt_ProSetPMacTx()
2656 /* phy_set_bb_reg(Adapter, 0xb04, 0xf, 2); */ /* TX Stop */ in mpt_ProSetPMacTx()
2658 phy_set_bb_reg(Adapter, 0xb04, 0xf, 8); /*TX CCK ON*/ in mpt_ProSetPMacTx()
2659 phy_set_bb_reg(Adapter, 0xA84, BIT31, 0); in mpt_ProSetPMacTx()
2661 phy_set_bb_reg(Adapter, 0xb04, 0xf, 4); /* TX Ofdm ON */ in mpt_ProSetPMacTx()