drivers/infineon/siutils_priv.h

241 extern void sb_scan(si_t *sih, volatile void *regs, uint devid);
242 extern uint sb_coreid(si_t *sih);
243 extern uint sb_intflag(si_t *sih);
244 extern uint sb_flag(si_t *sih);
245 extern void sb_setint(si_t *sih, int siflag);
246 extern uint sb_corevendor(si_t *sih);
247 extern uint sb_corerev(si_t *sih);
248 extern uint sb_corereg(si_t *sih, uint coreidx, uint regoff, uint mask, uint val);
249 extern volatile uint32 *sb_corereg_addr(si_t *sih, uint coreidx, uint regoff);
250 extern bool sb_iscoreup(si_t *sih);
251 extern volatile void *sb_setcoreidx(si_t *sih, uint coreidx);
252 extern uint32 sb_core_cflags(si_t *sih, uint32 mask, uint32 val);
253 extern void sb_core_cflags_wo(si_t *sih, uint32 mask, uint32 val);
254 extern uint32 sb_core_sflags(si_t *sih, uint32 mask, uint32 val);
255 extern void sb_commit(si_t *sih);
258 extern void sb_core_reset(si_t *sih, uint32 bits, uint32 resetbits);
259 extern void sb_core_disable(si_t *sih, uint32 bits);
260 extern uint32 sb_addrspace(si_t *sih, uint asidx);
261 extern uint32 sb_addrspacesize(si_t *sih, uint asidx);
262 extern int sb_numaddrspaces(si_t *sih);
264 extern uint32 sb_set_initiator_to(si_t *sih, uint32 to, uint idx);
266 extern bool sb_taclear(si_t *sih, bool details);
269 extern void sb_dumpregs(si_t *sih, struct bcmstrbuf *b);
273 extern bool sb_pci_pmecap(si_t *sih);
276 extern bool sb_pci_pmeclr(si_t *sih);
277 extern void sb_pci_pmeen(si_t *sih);
281 extern si_t *ai_attach(uint pcidev, osl_t *osh, void *regs, uint bustype,
283 extern si_t *ai_kattach(osl_t *osh);
284 extern void ai_scan(si_t *sih, void *regs, uint32 erombase, uint devid);
286 extern uint ai_flag(si_t *sih);
287 extern uint ai_flag_alt(si_t *sih);
288 extern void ai_setint(si_t *sih, int siflag);
289 extern uint ai_coreidx(si_t *sih);
290 extern uint ai_corevendor(si_t *sih);
291 extern uint ai_corerev(si_t *sih);
292 extern uint ai_corerev_minor(si_t *sih);
293 extern volatile uint32 *ai_corereg_addr(si_t *sih, uint coreidx, uint regoff);
294 extern bool ai_iscoreup(si_t *sih);
295 extern volatile void *ai_setcoreidx(si_t *sih, uint coreidx);
296 extern volatile void *ai_setcoreidx_2ndwrap(si_t *sih, uint coreidx);
297 extern volatile void *ai_setcoreidx_3rdwrap(si_t *sih, uint coreidx);
298 extern uint32 ai_core_cflags(si_t *sih, uint32 mask, uint32 val);
299 extern void ai_core_cflags_wo(si_t *sih, uint32 mask, uint32 val);
300 extern uint32 ai_core_sflags(si_t *sih, uint32 mask, uint32 val);
301 extern uint ai_corereg(si_t *sih, uint coreidx, uint regoff, uint mask, uint val);
302 extern uint ai_corereg_writeonly(si_t *sih, uint coreidx, uint regoff, uint mask, uint val);
303 extern void ai_core_reset(si_t *sih, uint32 bits, uint32 resetbits);
304 extern void ai_d11rsdb_core_reset(si_t *sih, uint32 bits,
306 extern void ai_core_disable(si_t *sih, uint32 bits);
309 extern int ai_numaddrspaces(si_t *sih);
310 extern uint32 ai_addrspace(si_t *sih, uint spidx, uint baidx);
311 extern uint32 ai_addrspacesize(si_t *sih, uint spidx, uint baidx);
312 extern void ai_coreaddrspaceX(si_t *sih, uint asidx, uint32 *addr, uint32 *size);
313 extern uint ai_wrap_reg(si_t *sih, uint32 offset, uint32 mask, uint32 val);
314 extern void ai_update_backplane_timeouts(si_t *sih, bool enable, uint32 timeout, uint32 cid);
315 extern uint32 ai_clear_backplane_to(si_t *sih);
316 void ai_force_clocks(si_t *sih, uint clock_state);
317 extern uint ai_num_slaveports(si_t *sih, uint coreidx);
320 uint32 ai_clear_backplane_to_fast(si_t *sih, void * addr);
324 extern uint32 ai_clear_backplane_to_per_core(si_t *sih, uint coreid, uint coreunit, void * wrap);
328 extern void ai_dumpregs(si_t *sih, struct bcmstrbuf *b);
331 extern uint32 ai_wrapper_dump_buf_size(si_t *sih);
332 extern uint32 ai_wrapper_dump_binary(si_t *sih, uchar *p);
333 extern bool ai_check_enable_backplane_log(si_t *sih);
334 extern uint32 ai_wrapper_dump_last_timeout(si_t *sih, uint32 *error, uint32 *core, uint32 *ba,