Lines Matching refs:uint16
51 uint16 len; /* Length of data excluding this header */
146 uint16 xtag;
147 uint16 version; /* version of the information following this */
154 uint16 i16_0x1a8; /* gated clock en */
155 uint16 i16_0x406; /* Rcv Fifo Ctrl */
156 uint16 i16_0x408; /* Rx ctrl 1 */
157 uint16 i16_0x41a; /* Rxe Status 1 */
158 uint16 i16_0x41c; /* Rxe Status 2 */
159 uint16 i16_0x424; /* rcv wrd count 0 */
160 uint16 i16_0x426; /* rcv wrd count 1 */
161 uint16 i16_0x456; /* RCV_LFIFO_STS */
162 uint16 i16_0x480; /* PSM_SLP_TMR */
163 uint16 i16_0x490; /* PSM BRC */
164 uint16 i16_0x500; /* TXE CTRL */
165 uint16 i16_0x50e; /* TXE Status */
166 uint16 i16_0x55e; /* TXE_xmtdmabusy */
167 uint16 i16_0x566; /* TXE_XMTfifosuspflush */
168 uint16 i16_0x690; /* IFS Stat */
169 uint16 i16_0x692; /* IFS_MEDBUSY_CTR */
170 uint16 i16_0x694; /* IFS_TX_DUR */
171 uint16 i16_0x6a0; /* SLow_CTL */
172 uint16 i16_0x838; /* TXE_AQM fifo Ready */
173 uint16 i16_0x8c0; /* Dagg ctrl */
174 uint16 shm_prewds_cnt;
175 uint16 shm_txtplufl_cnt;
176 uint16 shm_txphyerr_cnt;
177 uint16 pad;
181 uint16 xtag;
182 uint16 version; /* version of the information following this */
189 uint16 i16_0x4b8; /* psm_brwk_0 */
190 uint16 i16_0x4ba; /* psm_brwk_1 */
191 uint16 i16_0x4bc; /* psm_brwk_2 */
192 uint16 i16_0x4be; /* psm_brwk_2 */
193 uint16 i16_0x1a8; /* gated clock en */
194 uint16 i16_0x406; /* Rcv Fifo Ctrl */
195 uint16 i16_0x408; /* Rx ctrl 1 */
196 uint16 i16_0x41a; /* Rxe Status 1 */
197 uint16 i16_0x41c; /* Rxe Status 2 */
198 uint16 i16_0x424; /* rcv wrd count 0 */
199 uint16 i16_0x426; /* rcv wrd count 1 */
200 uint16 i16_0x456; /* RCV_LFIFO_STS */
201 uint16 i16_0x480; /* PSM_SLP_TMR */
202 uint16 i16_0x500; /* TXE CTRL */
203 uint16 i16_0x50e; /* TXE Status */
204 uint16 i16_0x55e; /* TXE_xmtdmabusy */
205 uint16 i16_0x566; /* TXE_XMTfifosuspflush */
206 uint16 i16_0x690; /* IFS Stat */
207 uint16 i16_0x692; /* IFS_MEDBUSY_CTR */
208 uint16 i16_0x694; /* IFS_TX_DUR */
209 uint16 i16_0x6a0; /* SLow_CTL */
210 uint16 i16_0x490; /* psm_brc */
211 uint16 i16_0x4da; /* psm_brc_1 */
212 uint16 i16_0x838; /* TXE_AQM fifo Ready */
213 uint16 i16_0x8c0; /* Dagg ctrl */
214 uint16 shm_prewds_cnt;
215 uint16 shm_txtplufl_cnt;
216 uint16 shm_txphyerr_cnt;
239 uint16 heap_histogm[HEAP_HISTOGRAM_DUMP_LEN * 2]; /* size/number */
240 uint16 max_sz_free_blk[HEAP_MAX_SZ_BLKS_LEN];
254 uint16 txqueue_len[MEM_TRAP_NUM_WLC_TX_QUEUES];
258 uint16 version;
259 uint16 pad;
264 uint16 txqueue_len[MEM_TRAP_NUM_WLC_TX_QUEUES];
276 uint16 txqueue_len[MEM_TRAP_NUM_WLC_TX_QUEUES];
280 uint16 d2h_queue_len;
281 uint16 d2h_req_queue_len;
303 uint16 index; /* Index of the DMA channel in system */
307 uint16 din; /* rxin / txin */
308 uint16 dout; /* rxout / txout */
315 uint16 length; /* length of whole structure */
327 uint16 xtag;
335 uint16 i16_0x41a; /* Rxe Status 1 */
336 uint16 i16_0x41c; /* Rxe Status 2 */
337 uint16 i16_0x490; /* PSM BRC */
338 uint16 i16_0x50e; /* TXE Status */
339 uint16 i16_0x55e; /* TXE_xmtdmabusy */
340 uint16 i16_0x566; /* TXE_XMTfifosuspflush */
341 uint16 i16_0x690; /* IFS Stat */
342 uint16 i16_0x692; /* IFS_MEDBUSY_CTR */
343 uint16 i16_0x694; /* IFS_TX_DUR */
344 uint16 i16_0x7c0; /* WEP CTL */
345 uint16 i16_0x838; /* TXE_AQM fifo Ready */
346 uint16 i16_0x880; /* MHP_status */
347 uint16 shm_prewds_cnt;
348 uint16 shm_ucode_dbgst;
353 uint16 xtag;
362 uint16 i16_0x1a8; /* gated clock en */
363 uint16 i16_0x480; /* PSM_SLP_TMR */
364 uint16 i16_0x490; /* PSM BRC */
365 uint16 i16_0x600; /* TSF CTL */
366 uint16 i16_0x690; /* IFS Stat */
367 uint16 i16_0x692; /* IFS_MEDBUSY_CTR */
368 uint16 i16_0x6a0; /* SLow_CTL */
369 uint16 i16_0x6a6; /* SLow_FRAC */
370 uint16 i16_0x6a8; /* fast power up delay */
371 uint16 i16_0x6aa; /* SLow_PER */
372 uint16 shm_ucode_dbgst;
373 uint16 PAD;
378 uint16 err;
379 uint16 RxFeStatus;
380 uint16 TxFIFOStatus0;
381 uint16 TxFIFOStatus1;
382 uint16 RfseqMode;
383 uint16 RfseqStatus0;
384 uint16 RfseqStatus1;
385 uint16 RfseqStatus_Ocl;
386 uint16 RfseqStatus_Ocl1;
387 uint16 OCLControl1;
388 uint16 TxError;
389 uint16 bphyTxError;
390 uint16 TxCCKError;
391 uint16 TxCtrlWrd0;
392 uint16 TxCtrlWrd1;
393 uint16 TxCtrlWrd2;
394 uint16 TxLsig0;
395 uint16 TxLsig1;
396 uint16 TxVhtSigA10;
397 uint16 TxVhtSigA11;
398 uint16 TxVhtSigA20;
399 uint16 TxVhtSigA21;
400 uint16 txPktLength;
401 uint16 txPsdulengthCtr;
402 uint16 gpioClkControl;
403 uint16 gpioSel;
404 uint16 pktprocdebug;
405 uint16 PAD;
417 uint16 reg_offset;
418 uint16 core_mask;
425 uint16 err;
426 uint16 RxFeStatus;
427 uint16 TxFIFOStatus0;
428 uint16 TxFIFOStatus1;
429 uint16 RfseqMode;
430 uint16 RfseqStatus0;
431 uint16 RfseqStatus1;
432 uint16 RfseqStatus_Ocl;
433 uint16 RfseqStatus_Ocl1;
434 uint16 OCLControl1;
435 uint16 TxError;
436 uint16 bphyTxError;
437 uint16 TxCCKError;
438 uint16 TxCtrlWrd0;
439 uint16 TxCtrlWrd1;
440 uint16 TxCtrlWrd2;
441 uint16 TxLsig0;
442 uint16 TxLsig1;
443 uint16 TxVhtSigA10;
444 uint16 TxVhtSigA11;
445 uint16 TxVhtSigA20;
446 uint16 TxVhtSigA21;
447 uint16 txPktLength;
448 uint16 txPsdulengthCtr;
449 uint16 gpioClkControl;
450 uint16 gpioSel;
451 uint16 pktprocdebug;
460 uint16 err;
461 uint16 RxFeStatus;
462 uint16 TxFIFOStatus0;
463 uint16 TxFIFOStatus1;
464 uint16 RfseqMode;
465 uint16 RfseqStatus0;
466 uint16 RfseqStatus1;
467 uint16 RfseqStatus_Ocl;
468 uint16 RfseqStatus_Ocl1;
469 uint16 OCLControl1;
470 uint16 TxError;
471 uint16 bphyTxError;
472 uint16 TxCCKError;
473 uint16 TxCtrlWrd0;
474 uint16 TxCtrlWrd1;
475 uint16 TxCtrlWrd2;
476 uint16 TxLsig0;
477 uint16 TxLsig1;
478 uint16 TxVhtSigA10;
479 uint16 TxVhtSigA11;
480 uint16 TxVhtSigA20;
481 uint16 TxVhtSigA21;
482 uint16 txPktLength;
483 uint16 txPsdulengthCtr;
484 uint16 gpioClkControl;
485 uint16 gpioSel;
486 uint16 pktprocdebug;
488 uint16 HESigURateFlagStatus;
489 uint16 HESigUsRateFlagStatus;
499 uint16 i16_0x63E; /* tsf_tmr_rx_ts */
500 uint16 i16_0x640; /* tsf_tmr_tx_ts */
501 uint16 i16_0x642; /* tsf_tmr_rx_end_ts */
502 uint16 i16_0x846; /* TDC_FrmLen0 */
503 uint16 i16_0x848; /* TDC_FrmLen1 */
504 uint16 i16_0x84a; /* TDC_Txtime */
505 uint16 i16_0xa5a; /* TXE_BytCntInTxFrmLo */
506 uint16 i16_0xa5c; /* TXE_BytCntInTxFrmHi */
507 uint16 i16_0x856; /* TDC_VhtPsduLen0 */
508 uint16 i16_0x858; /* TDC_VhtPsduLen1 */
509 uint16 i16_0x490; /* psm_brc */
510 uint16 i16_0x4d8; /* psm_brc_1 */
511 uint16 shm_txerr_reason;
512 uint16 shm_pctl0;
513 uint16 shm_pctl1;
514 uint16 shm_pctl2;
515 uint16 shm_lsig0;
516 uint16 shm_lsig1;
517 uint16 shm_plcp0;
518 uint16 shm_plcp1;
519 uint16 shm_plcp2;
520 uint16 shm_vht_sigb0;
521 uint16 shm_vht_sigb1;
522 uint16 shm_tx_tst;
523 uint16 shm_txerr_tm;
524 uint16 shm_curchannel;
525 uint16 shm_crx_rxtsf_pos;
526 uint16 shm_lasttx_tsf;
527 uint16 shm_s_rxtsftmrval;
528 uint16 i16_0x29; /* Phy indirect address */
529 uint16 i16_0x2a; /* Phy indirect address */
535 uint16 i16_0x63E; /* tsf_tmr_rx_ts */
536 uint16 i16_0x640; /* tsf_tmr_tx_ts */
537 uint16 i16_0x642; /* tsf_tmr_rx_end_ts */
538 uint16 i16_0x846; /* TDC_FrmLen0 */
539 uint16 i16_0x848; /* TDC_FrmLen1 */
540 uint16 i16_0x84a; /* TDC_Txtime */
541 uint16 i16_0xa5a; /* TXE_BytCntInTxFrmLo */
542 uint16 i16_0xa5c; /* TXE_BytCntInTxFrmHi */
543 uint16 i16_0x856; /* TDC_VhtPsduLen0 */
544 uint16 i16_0x858; /* TDC_VhtPsduLen1 */
545 uint16 i16_0x490; /* psm_brc */
546 uint16 i16_0x4d8; /* psm_brc_1 */
547 uint16 shm_txerr_reason;
548 uint16 shm_pctl0;
549 uint16 shm_pctl1;
550 uint16 shm_pctl2;
551 uint16 shm_lsig0;
552 uint16 shm_lsig1;
553 uint16 shm_plcp0;
554 uint16 shm_plcp1;
555 uint16 shm_plcp2;
556 uint16 shm_vht_sigb0;
557 uint16 shm_vht_sigb1;
558 uint16 shm_tx_tst;
559 uint16 shm_txerr_tm;
560 uint16 shm_curchannel;
561 uint16 shm_crx_rxtsf_pos;
562 uint16 shm_lasttx_tsf;
563 uint16 shm_s_rxtsftmrval;
564 uint16 i16_0x29; /* Phy indirect address */
565 uint16 i16_0x2a; /* Phy indirect address */
568 uint16 pad;
602 uint16 version;
603 uint16 reserved;