Lines Matching +full:0 +full:x50
42 @@ -0,0 +1,494 @@
67 + memory@0 {
69 + reg = <0x0 0x80000000 0x0 0x40000000>;
93 + #clock-cells = <0>;
99 + #clock-cells = <0>;
105 + #clock-cells = <0>;
149 + reg = <0x58>;
151 + &dra7_pmx_core 0x418>;
360 + reg = <0x50>;
392 + <&dra7_pmx_core 0x3e0>;
398 + <&dra7_pmx_core 0x3f8>;
432 + pinctrl-0 = <&mmc1_pins_default>;
453 + pinctrl-0 = <&mmc2_pins_default>;
505 + hysteresis = <0>; /* millicelsius */
582 #define TPS65903X_PRIMARY_SECONDARY_PAD2 0xFB
583 #define TPS65903X_PAD2_POWERHOLD_MASK 0x20
586 +#define CAPE_EEPROM_ADDR0 0x54
587 +#define CAPE_EEPROM_ADDR3 0x57
589 +#define CAPE_EEPROM_ADDR_LEN 0x10
595 .is_ma_present = 0x1
600 + .dmm_lisa_map_3 = 0x80640100,
601 + .is_ma_present = 0x1
605 .dmm_lisa_map_3 = 0x80640100,
606 .is_ma_present = 0x1
635 + cc &= 0xf;
640 + cc = i & 0xf;
666 + cc &= 0xf;
671 + cc = i & 0xf;
709 + puts("BeagleBone: cape eeprom: i2c_probe: 0x"); write_hex(addr); puts(":\n");
712 + printf("failed to get device for EEPROM at address 0x%x\n",
736 + /* Since full production should switch to SR2.0 */
779 + puts("BeagleBone: cape eeprom: i2c_probe: 0x"); write_hex(addr); puts(":\n");
782 + printf("failed to get device for EEPROM at address 0x%x\n",
796 return 0;
799 + return 0;
801 return 0;
1099 {0x0CEC, 2739, 0}, /* CFG_VOUT1_VSYNC_OUT */
1103 + {0x0114, 2519, 702}, /* CFG_GPMC_A0_IN */
1104 + {0x0120, 2435, 411}, /* CFG_GPMC_A10_IN */
1105 + {0x012C, 2379, 755}, /* CFG_GPMC_A11_IN */
1106 + {0x0198, 2384, 778}, /* CFG_GPMC_A1_IN */
1107 + {0x0204, 2499, 1127}, /* CFG_GPMC_A2_IN */
1108 + {0x0210, 2455, 1181}, /* CFG_GPMC_A3_IN */
1109 + {0x021C, 2486, 1039}, /* CFG_GPMC_A4_IN */
1110 + {0x0228, 2456, 938}, /* CFG_GPMC_A5_IN */
1111 + {0x0234, 2463, 573}, /* CFG_GPMC_A6_IN */
1112 + {0x0240, 2608, 783}, /* CFG_GPMC_A7_IN */
1113 + {0x024C, 2430, 656}, /* CFG_GPMC_A8_IN */
1114 + {0x0258, 2465, 850}, /* CFG_GPMC_A9_IN */
1115 + {0x0264, 2316, 301}, /* CFG_GPMC_AD0_IN */
1116 + {0x0270, 2324, 406}, /* CFG_GPMC_AD10_IN */
1117 + {0x027C, 2278, 352}, /* CFG_GPMC_AD11_IN */
1118 + {0x0288, 2297, 160}, /* CFG_GPMC_AD12_IN */
1119 + {0x0294, 2278, 108}, /* CFG_GPMC_AD13_IN */
1120 + {0x02A0, 2035, 0}, /* CFG_GPMC_AD14_IN */
1121 + {0x02AC, 2279, 378}, /* CFG_GPMC_AD15_IN */
1122 + {0x02B8, 2440, 70}, /* CFG_GPMC_AD1_IN */
1123 + {0x02C4, 2404, 446}, /* CFG_GPMC_AD2_IN */
1124 + {0x02D0, 2343, 212}, /* CFG_GPMC_AD3_IN */
1125 + {0x02DC, 2355, 322}, /* CFG_GPMC_AD4_IN */
1126 + {0x02E8, 2337, 192}, /* CFG_GPMC_AD5_IN */
1127 + {0x02F4, 2270, 314}, /* CFG_GPMC_AD6_IN */
1128 + {0x0300, 2339, 259}, /* CFG_GPMC_AD7_IN */
1129 + {0x030C, 2308, 577}, /* CFG_GPMC_AD8_IN */
1130 + {0x0318, 2334, 166}, /* CFG_GPMC_AD9_IN */
1131 + {0x0378, 0, 0}, /* CFG_GPMC_CS3_IN */
1132 + {0x0678, 0, 386}, /* CFG_MMC3_CLK_IN */
1133 + {0x0680, 605, 0}, /* CFG_MMC3_CLK_OUT */
1134 + {0x0684, 0, 0}, /* CFG_MMC3_CMD_IN */
1135 + {0x0688, 0, 0}, /* CFG_MMC3_CMD_OEN */
1136 + {0x068C, 0, 0}, /* CFG_MMC3_CMD_OUT */
1137 + {0x0690, 171, 0}, /* CFG_MMC3_DAT0_IN */
1138 + {0x0694, 0, 0}, /* CFG_MMC3_DAT0_OEN */
1139 + {0x0698, 0, 0}, /* CFG_MMC3_DAT0_OUT */
1140 + {0x069C, 221, 0}, /* CFG_MMC3_DAT1_IN */
1141 + {0x06A0, 0, 0}, /* CFG_MMC3_DAT1_OEN */
1142 + {0x06A4, 0, 0}, /* CFG_MMC3_DAT1_OUT */
1143 + {0x06A8, 0, 0}, /* CFG_MMC3_DAT2_IN */
1144 + {0x06AC, 0, 0}, /* CFG_MMC3_DAT2_OEN */
1145 + {0x06B0, 0, 0}, /* CFG_MMC3_DAT2_OUT */
1146 + {0x06B4, 474, 0}, /* CFG_MMC3_DAT3_IN */
1147 + {0x06B8, 0, 0}, /* CFG_MMC3_DAT3_OEN */
1148 + {0x06BC, 0, 0}, /* CFG_MMC3_DAT3_OUT */
1149 + {0x06C0, 792, 0}, /* CFG_MMC3_DAT4_IN */
1150 + {0x06C4, 0, 0}, /* CFG_MMC3_DAT4_OEN */
1151 + {0x06C8, 0, 0}, /* CFG_MMC3_DAT4_OUT */
1152 + {0x06CC, 782, 0}, /* CFG_MMC3_DAT5_IN */
1153 + {0x06D0, 0, 0}, /* CFG_MMC3_DAT5_OEN */
1154 + {0x06D4, 0, 0}, /* CFG_MMC3_DAT5_OUT */
1155 + {0x06D8, 942, 0}, /* CFG_MMC3_DAT6_IN */
1156 + {0x06DC, 0, 0}, /* CFG_MMC3_DAT6_OEN */
1157 + {0x06E0, 0, 0}, /* CFG_MMC3_DAT6_OUT */
1158 + {0x06E4, 636, 0}, /* CFG_MMC3_DAT7_IN */
1159 + {0x06E8, 0, 0}, /* CFG_MMC3_DAT7_OEN */
1160 + {0x06EC, 0, 0}, /* CFG_MMC3_DAT7_OUT */
1161 + {0x06F0, 260, 0}, /* CFG_RGMII0_RXC_IN */
1162 + {0x06FC, 0, 1412}, /* CFG_RGMII0_RXCTL_IN */
1163 + {0x0708, 123, 1047}, /* CFG_RGMII0_RXD0_IN */
1164 + {0x0714, 139, 1081}, /* CFG_RGMII0_RXD1_IN */
1165 + {0x0720, 195, 1100}, /* CFG_RGMII0_RXD2_IN */
1166 + {0x072C, 239, 1216}, /* CFG_RGMII0_RXD3_IN */
1167 + {0x0740, 89, 0}, /* CFG_RGMII0_TXC_OUT */
1168 + {0x074C, 15, 125}, /* CFG_RGMII0_TXCTL_OUT */
1169 + {0x0758, 339, 162}, /* CFG_RGMII0_TXD0_OUT */
1170 + {0x0764, 146, 94}, /* CFG_RGMII0_TXD1_OUT */
1171 + {0x0770, 0, 27}, /* CFG_RGMII0_TXD2_OUT */
1172 + {0x077C, 291, 205}, /* CFG_RGMII0_TXD3_OUT */
1173 + {0x0A70, 0, 0}, /* CFG_VIN2A_D12_OUT */
1174 + {0x0A7C, 219, 101}, /* CFG_VIN2A_D13_OUT */
1175 + {0x0A88, 92, 58}, /* CFG_VIN2A_D14_OUT */
1176 + {0x0A94, 135, 100}, /* CFG_VIN2A_D15_OUT */
1177 + {0x0AA0, 154, 101}, /* CFG_VIN2A_D16_OUT */
1178 + {0x0AAC, 78, 27}, /* CFG_VIN2A_D17_OUT */
1179 + {0x0AB0, 411, 0}, /* CFG_VIN2A_D18_IN */
1180 + {0x0ABC, 0, 382}, /* CFG_VIN2A_D19_IN */
1181 + {0x0AD4, 320, 750}, /* CFG_VIN2A_D20_IN */
1182 + {0x0AE0, 192, 836}, /* CFG_VIN2A_D21_IN */
1183 + {0x0AEC, 294, 669}, /* CFG_VIN2A_D22_IN */
1184 + {0x0AF8, 50, 700}, /* CFG_VIN2A_D23_IN */
1185 + {0x0B9C, 0, 706}, /* CFG_VOUT1_CLK_OUT */
1186 + {0x0BA8, 2313, 0}, /* CFG_VOUT1_D0_OUT */
1187 + {0x0BB4, 2199, 0}, /* CFG_VOUT1_D10_OUT */
1188 + {0x0BC0, 2266, 0}, /* CFG_VOUT1_D11_OUT */
1189 + {0x0BCC, 3159, 0}, /* CFG_VOUT1_D12_OUT */
1190 + {0x0BD8, 2100, 0}, /* CFG_VOUT1_D13_OUT */
1191 + {0x0BE4, 2229, 0}, /* CFG_VOUT1_D14_OUT */
1192 + {0x0BF0, 2202, 0}, /* CFG_VOUT1_D15_OUT */
1193 + {0x0BFC, 2084, 0}, /* CFG_VOUT1_D16_OUT */
1194 + {0x0C08, 2195, 0}, /* CFG_VOUT1_D17_OUT */
1195 + {0x0C14, 2342, 0}, /* CFG_VOUT1_D18_OUT */
1196 + {0x0C20, 2463, 0}, /* CFG_VOUT1_D19_OUT */
1197 + {0x0C2C, 2439, 0}, /* CFG_VOUT1_D1_OUT */
1198 + {0x0C38, 2304, 0}, /* CFG_VOUT1_D20_OUT */
1199 + {0x0C44, 2103, 0}, /* CFG_VOUT1_D21_OUT */
1200 + {0x0C50, 2145, 0}, /* CFG_VOUT1_D22_OUT */
1201 + {0x0C5C, 1932, 0}, /* CFG_VOUT1_D23_OUT */
1202 + {0x0C68, 2200, 0}, /* CFG_VOUT1_D2_OUT */
1203 + {0x0C74, 2355, 0}, /* CFG_VOUT1_D3_OUT */
1204 + {0x0C80, 3215, 0}, /* CFG_VOUT1_D4_OUT */
1205 + {0x0C8C, 2314, 0}, /* CFG_VOUT1_D5_OUT */
1206 + {0x0C98, 2238, 0}, /* CFG_VOUT1_D6_OUT */
1207 + {0x0CA4, 2381, 0}, /* CFG_VOUT1_D7_OUT */
1208 + {0x0CB0, 2138, 0}, /* CFG_VOUT1_D8_OUT */
1209 + {0x0CBC, 2383, 0}, /* CFG_VOUT1_D9_OUT */
1210 + {0x0CC8, 1984, 0}, /* CFG_VOUT1_DE_OUT */
1211 + {0x0CE0, 1947, 0}, /* CFG_VOUT1_HSYNC_OUT */
1212 + {0x0CEC, 2739, 0}, /* CFG_VOUT1_VSYNC_OUT */
1216 {0x0114, 2199, 621}, /* CFG_GPMC_A0_IN */
1217 {0x0120, 0, 0}, /* CFG_GPMC_A10_IN */
1267 + "eeprom_dump=i2c dev 0; " \
1268 + "i2c md 0x50 0x00.2 20; " \
1269 + "\0" \
1270 + "eeprom_blank=i2c dev 0; " \
1271 + "i2c mw 0x50 0x00.2 ff; " \
1272 + "i2c mw 0x50 0x01.2 ff; " \
1273 + "i2c mw 0x50 0x02.2 ff; " \
1274 + "i2c mw 0x50 0x03.2 ff; " \
1275 + "i2c mw 0x50 0x04.2 ff; " \
1276 + "i2c mw 0x50 0x05.2 ff; " \
1277 + "i2c mw 0x50 0x06.2 ff; " \
1278 + "i2c mw 0x50 0x07.2 ff; " \
1279 + "i2c mw 0x50 0x08.2 ff; " \
1280 + "i2c mw 0x50 0x09.2 ff; " \
1281 + "i2c mw 0x50 0x0a.2 ff; " \
1282 + "i2c mw 0x50 0x0b.2 ff; " \
1283 + "i2c mw 0x50 0x0c.2 ff; " \
1284 + "i2c mw 0x50 0x0d.2 ff; " \
1285 + "i2c mw 0x50 0x0e.2 ff; " \
1286 + "i2c mw 0x50 0x0f.2 ff; " \
1287 + "i2c mw 0x50 0x10.2 ff; " \
1288 + "i2c mw 0x50 0x11.2 ff; " \
1289 + "i2c mw 0x50 0x12.2 ff; " \
1290 + "i2c mw 0x50 0x13.2 ff; " \
1291 + "i2c mw 0x50 0x14.2 ff; " \
1292 + "i2c mw 0x50 0x15.2 ff; " \
1293 + "i2c mw 0x50 0x16.2 ff; " \
1294 + "i2c mw 0x50 0x17.2 ff; " \
1295 + "i2c mw 0x50 0x18.2 ff; " \
1296 + "i2c mw 0x50 0x19.2 ff; " \
1297 + "i2c mw 0x50 0x1a.2 ff; " \
1298 + "i2c mw 0x50 0x1b.2 ff; " \
1299 + "i2c mw 0x50 0x1c.2 ff; " \
1300 + "i2c mw 0x50 0x1d.2 ff; " \
1301 + "i2c mw 0x50 0x1e.2 ff; " \
1302 + "i2c mw 0x50 0x1f.2 ff; " \
1303 + "i2c md 0x50 0x00.2 20; " \
1304 + "\0" \
1305 + "eeprom_x15_b1=i2c dev 0; " \
1306 + "i2c mw 0x50 0x00.2 aa; " \
1307 + "i2c mw 0x50 0x01.2 55; " \
1308 + "i2c mw 0x50 0x02.2 33; " \
1309 + "i2c mw 0x50 0x03.2 ee; " \
1310 + "i2c mw 0x50 0x04.2 42; " \
1311 + "i2c mw 0x50 0x05.2 42; " \
1312 + "i2c mw 0x50 0x06.2 52; " \
1313 + "i2c mw 0x50 0x07.2 44; " \
1314 + "i2c mw 0x50 0x08.2 58; " \
1315 + "i2c mw 0x50 0x09.2 31; " \
1316 + "i2c mw 0x50 0x0a.2 35; " \
1317 + "i2c mw 0x50 0x0b.2 5f; " \
1318 + "i2c mw 0x50 0x0c.2 42; " \
1319 + "i2c mw 0x50 0x0d.2 2e; " \
1320 + "i2c mw 0x50 0x0e.2 31; " \
1321 + "i2c mw 0x50 0x0f.2 30; " \
1322 + "i2c mw 0x50 0x10.2 57; " \
1323 + "i2c mw 0x50 0x11.2 57; " \
1324 + "i2c mw 0x50 0x12.2 59; " \
1325 + "i2c mw 0x50 0x13.2 59; " \
1326 + "i2c mw 0x50 0x14.2 34; " \
1327 + "i2c mw 0x50 0x15.2 50; " \
1328 + "i2c mw 0x50 0x16.2 35; " \
1329 + "i2c mw 0x50 0x17.2 35; " \
1330 + "i2c mw 0x50 0x18.2 30; " \
1331 + "i2c mw 0x50 0x19.2 30; " \
1332 + "i2c mw 0x50 0x1a.2 30; " \
1333 + "i2c mw 0x50 0x1b.2 30; " \
1334 + "i2c mw 0x50 0x1c.2 ff; " \
1335 + "i2c mw 0x50 0x1d.2 ff; " \
1336 + "i2c mw 0x50 0x1e.2 ff; " \
1337 + "i2c mw 0x50 0x1f.2 ff; " \
1338 + "i2c md 0x50 0x00.2 20; " \
1339 + "\0" \
1340 + "eeprom_x15_c=i2c dev 0; " \
1341 + "i2c mw 0x50 0x00.2 aa; " \
1342 + "i2c mw 0x50 0x01.2 55; " \
1343 + "i2c mw 0x50 0x02.2 33; " \
1344 + "i2c mw 0x50 0x03.2 ee; " \
1345 + "i2c mw 0x50 0x04.2 42; " \
1346 + "i2c mw 0x50 0x05.2 42; " \
1347 + "i2c mw 0x50 0x06.2 52; " \
1348 + "i2c mw 0x50 0x07.2 44; " \
1349 + "i2c mw 0x50 0x08.2 58; " \
1350 + "i2c mw 0x50 0x09.2 31; " \
1351 + "i2c mw 0x50 0x0a.2 35; " \
1352 + "i2c mw 0x50 0x0b.2 5f; " \
1353 + "i2c mw 0x50 0x0c.2 43; " \
1354 + "i2c mw 0x50 0x0d.2 2e; " \
1355 + "i2c mw 0x50 0x0e.2 30; " \
1356 + "i2c mw 0x50 0x0f.2 30; " \
1357 + "i2c mw 0x50 0x10.2 79; " \
1358 + "i2c mw 0x50 0x11.2 79; " \
1359 + "i2c mw 0x50 0x12.2 77; " \
1360 + "i2c mw 0x50 0x13.2 77; " \
1361 + "i2c mw 0x50 0x14.2 50; " \
1362 + "i2c mw 0x50 0x15.2 58; " \
1363 + "i2c mw 0x50 0x16.2 31; " \
1364 + "i2c mw 0x50 0x17.2 35; " \
1365 + "i2c mw 0x50 0x18.2 6e; " \
1366 + "i2c mw 0x50 0x19.2 6e; " \
1367 + "i2c mw 0x50 0x1a.2 6e; " \
1368 + "i2c mw 0x50 0x1b.2 6e; " \
1369 + "i2c mw 0x50 0x1c.2 ff; " \
1370 + "i2c mw 0x50 0x1d.2 ff; " \
1371 + "i2c mw 0x50 0x1e.2 ff; " \
1372 + "i2c mw 0x50 0x1f.2 ff; " \
1373 + "i2c md 0x50 0x00.2 20; " \
1374 + "\0" \
1412 + "fi;\0" \
1450 + "fi;\0" \
1488 + "fi;\0" \
1538 + "setenv fdt_buffer 0x60000;" \
1621 + "fi;\0" \
1647 "bootpart=0:2\0" \
1648 "bootdir=/boot\0" \
1649 "bootfile=zImage\0" \
1650 + "board_eeprom_header=undefined\0" \
1651 "usbtty=cdc_acm\0" \
1652 "vram=16M\0" \
1654 "partitions=" PARTS_DEFAULT "\0" \
1655 "optargs=\0" \
1656 "dofastboot=0\0" \
1662 - "run mmcboot;\0" \
1676 - "bootm ${loadaddr}#${fdtfile};\0 "
1681 + "run eeprom_dump; run eeprom_x15_c; reset; fi; \0 "
1686 "echo WARNING: Could not determine device tree to use; fi; \0"
1691 - "setenv dofastboot 0; saveenv;" \
1704 + "setenv mmcdev 0; " \
1722 "mmcdev=0\0" \
1723 "mmcrootfstype=ext4 rootwait\0" \
1724 - "finduuid=part uuid mmc ${bootpart} uuid\0" \
1725 + "finduuid=part uuid ${devtype} ${bootpart} uuid\0" \
1729 - "rootfstype=${mmcrootfstype}\0" \
1732 + "${cmdline}\0" \
1737 + "${cmdline}\0" \
1742 + "${cmdline}\0" \
1747 + "${musb} ${cmdline}\0" \
1753 + "${cmdline}\0" \
1754 "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
1756 "source ${loadaddr}\0" \
1758 "env import -t ${loadaddr} ${filesize}\0" \
1759 "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenvfile}\0" \
1760 "loadimage=load ${devtype} ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
1761 - "loadfdt=load ${devtype} ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \
1762 + "loadrd=load ${devtype} ${bootpart} ${rdaddr} ${bootdir}/${rdfile}; setenv rdsize ${filesize}\0" \
1763 … loading ${fdtdir}/${fdtfile} ...; load ${devtype} ${bootpart} ${fdtaddr} ${fdtdir}/${fdtfile}\0" \
1767 + "fdt apply ${rdaddr}; fdt resize ${fdt_buffer};\0" \
1772 + "fi;\0" \
1777 + "fi;\0" \