Lines Matching +full:little +full:- +full:endian
25 bool "ARC (little endian)"
29 32-bit CPUs that can be used from deeply embedded to high
30 performance host applications. Little endian.
33 bool "ARC (big endian)"
37 32-bit CPUs that can be used from deeply embedded to high
38 performance host applications. Big endian.
41 bool "ARM (little endian)"
44 ARM is a 32-bit reduced instruction set computer (RISC)
46 Little endian.
51 bool "ARM (big endian)"
54 ARM is a 32-bit reduced instruction set computer (RISC)
56 Big endian.
61 bool "AArch64 (little endian)"
65 Aarch64 is a 64-bit architecture developed by ARM Holdings.
66 http://www.arm.com/products/processors/instruction-set-architectures/armv8-architecture.php
70 bool "AArch64 (big endian)"
74 Aarch64 is a 64-bit architecture developed by ARM Holdings.
75 http://www.arm.com/products/processors/instruction-set-architectures/armv8-architecture.php
85 http://www.c-sky.com/
86 http://www.github.com/c-sky
103 bool "Microblaze AXI (little endian)"
107 bus based architecture (little endian)
112 bool "Microblaze non-AXI (big endian)"
116 bus based architecture (non-AXI, big endian)
121 bool "MIPS (big endian)"
125 endian.
130 bool "MIPS (little endian)"
133 MIPS is a RISC microprocessor from MIPS Technologies. Little
134 endian.
139 bool "MIPS64 (big endian)"
144 endian.
149 bool "MIPS64 (little endian)"
153 MIPS is a RISC microprocessor from MIPS Technologies. Little
154 endian.
163 nds32 is a 32-bit architecture developed by Andes Technology.
185 PowerPC is a RISC architecture created by Apple-IBM-Motorola
186 alliance. Big endian.
191 bool "PowerPC64 (big endian)"
195 PowerPC is a RISC architecture created by Apple-IBM-Motorola
196 alliance. Big endian.
201 bool "PowerPC64 (little endian)"
205 PowerPC is a RISC architecture created by Apple-IBM-Motorola
206 alliance. Little endian.
214 RISC-V is an open, free Instruction Set Architecture created
216 and promoted by RISC-V Foundation.
218 https://en.wikipedia.org/wiki/RISC-V
225 s390x is a big-endian architecture made by IBM.
233 SuperH (or SH) is a 32-bit reduced instruction set computer
265 x86-64 is an extension of the x86 instruction set (Intel i386
352 # The value of this option will be passed as --with-fpu=<value> when
353 # building gcc (internal backend) or -mfpu=<value> in the toolchain
358 # The value of this option will be passed as --with-float=<value> when
359 # building gcc (internal backend) or -mfloat-abi=<value> in the toolchain
364 # The value of this option will be passed as --with-mode=<value> when
365 # building gcc (internal backend) or -m<value> in the toolchain
423 # Although this adds -static to the compilation, that's not a problem
424 # because the -mid-shared-library option overrides it.