Lines Matching +full:axi +full:- +full:config
3 config BR2_ARCH_IS_64
6 config BR2_KERNEL_64_USERLAND_32
9 config BR2_SOFT_FLOAT
12 config BR2_ARCH_HAS_MMU_MANDATORY
15 config BR2_ARCH_HAS_MMU_OPTIONAL
24 config BR2_arcle
29 32-bit CPUs that can be used from deeply embedded to high
32 config BR2_arceb
37 32-bit CPUs that can be used from deeply embedded to high
40 config BR2_arm
42 # MMU support is set by the subarchitecture file, arch/Config.in.arm
44 ARM is a 32-bit reduced instruction set computer (RISC)
50 config BR2_armeb
52 # MMU support is set by the subarchitecture file, arch/Config.in.arm
54 ARM is a 32-bit reduced instruction set computer (RISC)
60 config BR2_aarch64
65 Aarch64 is a 64-bit architecture developed by ARM Holdings.
66 http://www.arm.com/products/processors/instruction-set-architectures/armv8-architecture.php
69 config BR2_aarch64_be
74 Aarch64 is a 64-bit architecture developed by ARM Holdings.
75 http://www.arm.com/products/processors/instruction-set-architectures/armv8-architecture.php
78 config BR2_csky
85 http://www.c-sky.com/
86 http://www.github.com/c-sky
88 config BR2_i386
95 config BR2_m68k
97 # MMU support is set by the subarchitecture file, arch/Config.in.m68k
102 config BR2_microblazeel
103 bool "Microblaze AXI (little endian)"
106 Soft processor core designed for Xilinx FPGAs from Xilinx. AXI
111 config BR2_microblazebe
112 bool "Microblaze non-AXI (big endian)"
116 bus based architecture (non-AXI, big endian)
120 config BR2_mips
129 config BR2_mipsel
138 config BR2_mips64
148 config BR2_mips64el
158 config BR2_nds32
163 nds32 is a 32-bit architecture developed by Andes Technology.
166 config BR2_nios2
174 config BR2_or1k
181 config BR2_powerpc
185 PowerPC is a RISC architecture created by Apple-IBM-Motorola
190 config BR2_powerpc64
195 PowerPC is a RISC architecture created by Apple-IBM-Motorola
200 config BR2_powerpc64le
205 PowerPC is a RISC architecture created by Apple-IBM-Motorola
210 config BR2_riscv
214 RISC-V is an open, free Instruction Set Architecture created
216 and promoted by RISC-V Foundation.
218 https://en.wikipedia.org/wiki/RISC-V
220 config BR2_s390x
225 s390x is a big-endian architecture made by IBM.
229 config BR2_sh
233 SuperH (or SH) is a 32-bit reduced instruction set computer
239 config BR2_sparc
249 config BR2_sparc64
260 config BR2_x86_64
265 x86-64 is an extension of the x86 instruction set (Intel i386
269 config BR2_xtensa
271 # MMU support is set by the subarchitecture file, arch/Config.in.xtensa
282 config BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
285 config BR2_ARCH_HAS_TOOLCHAIN_BUILDROOT
290 # Config.in.$ARCH files
291 config BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
294 config BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
298 config BR2_ARCH_NEEDS_GCC_AT_LEAST_5
302 config BR2_ARCH_NEEDS_GCC_AT_LEAST_6
306 config BR2_ARCH_NEEDS_GCC_AT_LEAST_7
310 config BR2_ARCH_NEEDS_GCC_AT_LEAST_8
314 config BR2_ARCH_NEEDS_GCC_AT_LEAST_9
318 config BR2_ARCH_NEEDS_GCC_AT_LEAST_10
322 config BR2_ARCH_NEEDS_GCC_AT_LEAST_11
327 # Config.in.$ARCH files
328 config BR2_ARCH
331 config BR2_NORMALIZED_ARCH
334 config BR2_ENDIAN
337 config BR2_GCC_TARGET_ARCH
340 config BR2_GCC_TARGET_ABI
343 config BR2_GCC_TARGET_NAN
346 config BR2_GCC_TARGET_FP32_MODE
349 config BR2_GCC_TARGET_CPU
352 # The value of this option will be passed as --with-fpu=<value> when
353 # building gcc (internal backend) or -mfpu=<value> in the toolchain
355 config BR2_GCC_TARGET_FPU
358 # The value of this option will be passed as --with-float=<value> when
359 # building gcc (internal backend) or -mfloat-abi=<value> in the toolchain
361 config BR2_GCC_TARGET_FLOAT_ABI
364 # The value of this option will be passed as --with-mode=<value> when
365 # building gcc (internal backend) or -m<value> in the toolchain
367 config BR2_GCC_TARGET_MODE
371 config BR2_BINFMT_SUPPORTS_SHARED
377 config BR2_READELF_ARCH_NAME
386 config BR2_BINFMT_ELF
395 config BR2_BINFMT_FLAT
411 config BR2_BINFMT_FLAT_ONE
416 config BR2_BINFMT_FLAT_SHARED
423 # Although this adds -static to the compilation, that's not a problem
424 # because the -mid-shared-library option overrides it.
431 source "arch/Config.in.arc"
435 source "arch/Config.in.arm"
439 source "arch/Config.in.csky"
443 source "arch/Config.in.m68k"
447 source "arch/Config.in.microblaze"
451 source "arch/Config.in.mips"
455 source "arch/Config.in.nds32"
459 source "arch/Config.in.nios2"
463 source "arch/Config.in.or1k"
467 source "arch/Config.in.powerpc"
471 source "arch/Config.in.riscv"
475 source "arch/Config.in.s390x"
479 source "arch/Config.in.sh"
483 source "arch/Config.in.sparc"
487 source "arch/Config.in.x86"
491 source "arch/Config.in.xtensa"