History log of /rkbin/RKBOOT/RV1103BMINIALL_UART0M2_SPI_NOR_SPI_NAND.ini (Results 1 – 4 of 4)
Revision Date Author Comments
# a1154497 29-Sep-2024 YouMin Chen <cym@rock-chips.com>

rv1103b: ddr: update ddrbin to v1.05

build from:
a0d2414c29 dram_init: rv1103b: update ddrbin to v1.05

update feature:
1. Retry read gate training if result error.

Signed-off-by: YouMin Ch

rv1103b: ddr: update ddrbin to v1.05

build from:
a0d2414c29 dram_init: rv1103b: update ddrbin to v1.05

update feature:
1. Retry read gate training if result error.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Change-Id: I463903a3ab4dd80a449222fcead924d71393bc4a

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# 50942f0b 30-Aug-2024 YouMin Chen <cym@rock-chips.com>

rv1103b: ddr: update ddrbin to v1.04

build from:
ccb664bdcf dram_init: rv1103b: update ddrbin to v1.04

update feature:
1. Improve DDR stability.

Signed-off-by: YouMin Chen <cym@rock-chips.

rv1103b: ddr: update ddrbin to v1.04

build from:
ccb664bdcf dram_init: rv1103b: update ddrbin to v1.04

update feature:
1. Improve DDR stability.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Change-Id: Id682e3ea962b0896f3e9bfb9de1f37c80bdc99a9

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# 1c50c038 26-Aug-2024 YouMin Chen <cym@rock-chips.com>

rv1103b: ddr: update ddrbin to v1.03

build from:
b991ae72ff dram_init: rv1103b: update ddrbin to v1.03

update feature:
1. set DQS_GATE_TRAIN_CTRL.dll_start_point to 0x8
2. fix isp mipi

rv1103b: ddr: update ddrbin to v1.03

build from:
b991ae72ff dram_init: rv1103b: update ddrbin to v1.03

update feature:
1. set DQS_GATE_TRAIN_CTRL.dll_start_point to 0x8
2. fix isp mipi drop when 4M 60fps
3. setting for DDR power-saving

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Change-Id: I57a5f0ab23aee0ca9fafb87356b09ddf64a081db

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# a8c5eaeb 01-Aug-2024 Jkand Huang <jkand.huang@rock-chips.com>

rv1103B: RKBOOT: add RV1103BMINIALL_UART0M2_SPI_NOR_SPI_NAND.ini

Signed-off-by: Jkand Huang <jkand.huang@rock-chips.com>
Change-Id: Id61fb6b411fc8bd26089c45ce3dde6719e37bb66