| #
21759a0f |
| 08-Jan-2025 |
Xuhui Lin <xuhui.lin@rock-chips.com> |
rk3562: spl: Update version to v1.07
Build from:
3aa32998d6d mmc: dw_mmc: synchronize upstream code to calculate data transmission timeout
Build command:
./make.sh rk3562 --spl-new --spl-fwver v1
rk3562: spl: Update version to v1.07
Build from:
3aa32998d6d mmc: dw_mmc: synchronize upstream code to calculate data transmission timeout
Build command:
./make.sh rk3562 --spl-new --spl-fwver v1.07
Main update feature:
SPL supports dynamically booting either 32-bit or 64-bit U-Boot.
Change-Id: I338f92f8429f000dfb116ea808e58f3e94222b90
Signed-off-by: Xuhui Lin <xuhui.lin@rock-chips.com>
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|
| #
167d3771 |
| 23-Sep-2024 |
Tang Yun ping <typ@rock-chips.com> |
rk3562: ddr: update ddrbin to v1.07
build from:
6e9ae14bbb rk3562: ddr: update ddrbin to v1.07
update feature:
1. fix ddr4 cap detect fail bug.
2. Added ddr type detection order configurable thr
rk3562: ddr: update ddrbin to v1.07
build from:
6e9ae14bbb rk3562: ddr: update ddrbin to v1.07
update feature:
1. fix ddr4 cap detect fail bug.
2. Added ddr type detection order configurable through ddrbin
tool.
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: Ia59c492317dcebc5bdef8b077d111c6eb6b91858
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|
| #
bed33878 |
| 21-Jun-2024 |
Tang Yun ping <typ@rock-chips.com> |
rk3562: ddr: update ddrbin to v1.06
build from:
a2efbe6ac4 dram: adjust version format
build command:
./make.sh rk3562
update feature:
1. fix probabilistic read/write training failures under DD
rk3562: ddr: update ddrbin to v1.06
build from:
a2efbe6ac4 dram: adjust version format
build command:
./make.sh rk3562
update feature:
1. fix probabilistic read/write training failures under DDR4 2cs
introduced in ddrbin v1.06
2. Undo vref training below 600MHz
3. The CLK/DQS slew rate supports different values at high and low frequencies.
4. Added DRAM Manufacturer ID printing.
5. DDR4 enable LPASR to reduce DDR4 self-refresh power.
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: I405a7505d81df18baea2abf8abcd8d2d9ce5785a
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|
| #
83f2f3d5 |
| 22-Jan-2024 |
Tang Yun ping <typ@rock-chips.com> |
rk3562: ddr: update ddrbin to v1.05
build from:
93e4a1020c rk3562: ddr: update ddrbin to v1.05
build command:
./make.sh rk3562
update feature:
1. LPDDR4/4X enable 780MHz read odt。
2. Eanble re
rk3562: ddr: update ddrbin to v1.05
build from:
93e4a1020c rk3562: ddr: update ddrbin to v1.05
build command:
./make.sh rk3562
update feature:
1. LPDDR4/4X enable 780MHz read odt。
2. Eanble read/write vref training to improve
compatibility.(can be disable using ddrbin_tool).
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: I2edba3995f39f1d8e3d14214e342ece92df17712
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|
| #
28231bfc |
| 23-Oct-2023 |
Xuhui Lin <xuhui.lin@rock-chips.com> |
rk3562: spl: update version to v1.06
Build from:
9db02423188 rockchip: rk3562: decrease PCIe shaping
Build command:
./make.sh rk3562 --spl-new --spl-fwver v1.06
Update features:
Fix PCIE causes
rk3562: spl: update version to v1.06
Build from:
9db02423188 rockchip: rk3562: decrease PCIe shaping
Build command:
./make.sh rk3562 --spl-new --spl-fwver v1.06
Update features:
Fix PCIE causes VOP splash screen issue.
Signed-off-by: Xuhui Lin <xuhui.lin@rock-chips.com>
Change-Id: I5d8452f293879ac21513a488b9636fbbcfc9a2ab
show more ...
|
| #
795f60d2 |
| 17-Oct-2023 |
Joseph Chen <chenjh@rock-chips.com> |
rk3562: amp cpu3: Fix spl binary name
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I29c16705777a4cf2a698a7c001e9cb2ff048156f
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| #
886b4405 |
| 11-Oct-2023 |
Zain Wang <wzz@rock-chips.com> |
RKBOOT: add RK3562MINIALL_AMP_CPU3.ini
[BOOT1_PARAM]
WORD_2=0x3 assign CPU 0x3 to boot AMP system.
Signed-off-by: Zain Wang <wzz@rock-chips.com>
Change-Id: Id29203355a329167369fd4e59c3ab3e03913e284
|