| #
e1cc4d31 |
| 24-Feb-2015 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge remote-tracking branch 'u-boot/master' into 'u-boot-arm/master'
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| #
e72d3443 |
| 13-Feb-2015 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
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| #
db7a7dee |
| 10-Feb-2015 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-x86
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| #
250e039d |
| 28-Jan-2015 |
Simon Glass <sjg@chromium.org> |
pci: Add a function to find a device by class
There is an existing function prototype in the header file but it is not implemented. Implement something similar.
Signed-off-by: Simon Glass <sjg@chro
pci: Add a function to find a device by class
There is an existing function prototype in the header file but it is not implemented. Implement something similar.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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ab92da9f |
| 26-Jan-2015 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-x86
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| #
4a2708a0 |
| 15-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: Access the VGA ROM when needed
Add code to the generic pci_rom file to access the VGA ROM in PCI space when needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
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| #
d622ac39 |
| 15-Dec-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
powerpc: mpc824x: remove MPC824X cpu support
All the MPC824X boards are still non-generic boards: A3000, CPC45, CU824, eXalion, MVBLUE, MUSENKI, Sandpoint824x, utx8245
Signed-off-by: Masahiro Yamad
powerpc: mpc824x: remove MPC824X cpu support
All the MPC824X boards are still non-generic boards: A3000, CPC45, CU824, eXalion, MVBLUE, MUSENKI, Sandpoint824x, utx8245
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Josef Wagner <Wagner@Microsys.de> Cc: Torsten Demke <torsten.demke@fci.com> Cc: Jim Thompson <jim@musenki.com> Cc: Greg Allen <gallen@arlut.utexas.edu>
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| #
f4e7e2d1 |
| 01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
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| #
e8a552eb |
| 15-Nov-2014 |
Simon Glass <sjg@chromium.org> |
pci: Add functions to read and write a BAR address
Some PCI functions cannot be auto-configured. Add a function to set up a fixed BAR which can be used in these situations. Also add a function to re
pci: Add functions to read and write a BAR address
Some PCI functions cannot be auto-configured. Add a function to set up a fixed BAR which can be used in these situations. Also add a function to read the current address of a BAR.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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| #
4efe52bf |
| 13-Nov-2014 |
Thierry Reding <treding@nvidia.com> |
pci: Honour pci_skip_dev()
When enumerating devices, honour the pci_skip_dev() function. This can be used by PCI controller drivers to restrict which devices will be probed.
This is required by the
pci: Honour pci_skip_dev()
When enumerating devices, honour the pci_skip_dev() function. This can be used by PCI controller drivers to restrict which devices will be probed.
This is required by the NVIDIA Tegra PCIe controller driver, which will fail with a data abort exception if an access is attempted to a device number larger than 0 outside of bus 0. pci_skip_dev() is therefore implemented to prevent any such accesses.
Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org>
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3cc83f9d |
| 07-Oct-2014 |
Minkyu Kang <mk7.kang@samsung.com> |
Merge branch 'uboot'
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e38b15b0 |
| 17-Sep-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
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| #
c292adae |
| 17-Sep-2014 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
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| #
0991866c |
| 08-Aug-2014 |
Tim Harvey <tharvey@gateworks.com> |
pci: add support for board_pci_fixup_dev function
Some board-level drivers may wish to have per-device fixup functions for PCI devices.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
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f15ea6e1 |
| 10-Dec-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master'
Conflicts: arch/arm/cpu/armv7/rmobile/Makefile doc/README.scrapyard
Needed manual fix: arch/arm/cpu/armv7/omap-common/Makefile board/compul
Merge branch 'u-boot/master' into 'u-boot-arm/master'
Conflicts: arch/arm/cpu/armv7/rmobile/Makefile doc/README.scrapyard
Needed manual fix: arch/arm/cpu/armv7/omap-common/Makefile board/compulab/cm_t335/u-boot.lds
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60390d70 |
| 11-Nov-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-mips
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| #
fa5cec03 |
| 08-Nov-2013 |
Paul Burton <paul.burton@imgtec.com> |
pci.h: allow inclusion in assembly source
This patch simply #ifdef's out the C-specific parts of pci.h when it is included by an assembly file. This will allow the macros it contains to be used from
pci.h: allow inclusion in assembly source
This patch simply #ifdef's out the C-specific parts of pci.h when it is included by an assembly file. This will allow the macros it contains to be used from assembly source as will be done in a followup commit adding support for more modern MIPS Malta boards.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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287df01e |
| 12-Oct-2013 |
Zhao Qiang <B45475@freescale.com> |
PCIe:change the method to get the address of a requested capability in configuration space.
Previously, the address of a requested capability is define like that "#define PCI_DCR 0x78" But, the add
PCIe:change the method to get the address of a requested capability in configuration space.
Previously, the address of a requested capability is define like that "#define PCI_DCR 0x78" But, the addresses of capabilities is different with regard to PCIe revs. So this method is not flexible.
Now a function to get the address of a requested capability is added and used. It can get the address dynamically by capability ID. The step of this function: 1. Read Status register in PCIe configuration space to confirm that Capabilities List is valid. 2. Find the address of Capabilities Pointer Register. 3. Find the address of requested capability from the first capability.
Signed-off-by: Zhao Qiang <B45475@freescale.com>
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b98d9341 |
| 13-Aug-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
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7b4e5844 |
| 03-Jul-2013 |
Zang Roy-R61911 <tie-fei.zang@freescale.com> |
powerpc/pcie: add PCIe version 3.x support
T4240 PCIe IP is version 3.0 and has some update comparing previous QorIQ products.
1. Move Freescale specific register define to arch/powerpc/include/as
powerpc/pcie: add PCIe version 3.x support
T4240 PCIe IP is version 3.0 and has some update comparing previous QorIQ products.
1. Move Freescale specific register define to arch/powerpc/include/asm/fsl_pci.h and update the register offset define for T4240.
2. add the status/control register define use status/control register to judge the link status
3. The original code uses 'Programming Interface' field to judge if PCIE is EP or RC mode, however, T4240 does not support this functionality. According to PCIE specification, 'Header Type' offset 0x0e is used to indicate header type, so for PCIE controller, the patch changes code to use 'Header Type' field to identify if the PCIE is RC or EP mode.
This patch fixes the PCIe card link up issue on T4240QDS.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
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| #
326ea986 |
| 31-Jul-2013 |
Stefano Babic <sbabic@denx.de> |
Merge git://git.denx.de/u-boot-arm
Conflicts: board/freescale/mx6qsabrelite/Makefile board/freescale/mx6qsabrelite/mx6qsabrelite.c include/configs/mx6qsabrelite.h
Signed-off-by: Stefano Babic <s
Merge git://git.denx.de/u-boot-arm
Conflicts: board/freescale/mx6qsabrelite/Makefile board/freescale/mx6qsabrelite/mx6qsabrelite.c include/configs/mx6qsabrelite.h
Signed-off-by: Stefano Babic <sbabic@denx.de>
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| #
8b485ba1 |
| 25-Jul-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into u-boot-arm/master
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| #
1a459660 |
| 08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
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| #
bc3442aa |
| 11-Jun-2013 |
Simon Glass <sjg@chromium.org> |
pci: Convert extern inline functions to static inline
I am not sure of the meaning of extern inline, but this gives errors when building with function instrumenting enabled. Change these functions t
pci: Convert extern inline functions to static inline
I am not sure of the meaning of extern inline, but this gives errors when building with function instrumenting enabled. Change these functions to static inline.
Signed-off-by: Simon Glass <sjg@chromium.org>
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| #
842033e6 |
| 30-May-2013 |
Gabor Juhos <juhosg@openwrt.org> |
pci: introduce CONFIG_PCI_INDIRECT_BRIDGE option
The pci_indirect.c file is always compiled when CONFIG_PCI is defined although the indirect PCI bridge support is not needed by every board.
Introdu
pci: introduce CONFIG_PCI_INDIRECT_BRIDGE option
The pci_indirect.c file is always compiled when CONFIG_PCI is defined although the indirect PCI bridge support is not needed by every board.
Introduce a new CONFIG_PCI_INDIRECT_BRIDGE config option and only compile indirect PCI bridge support if this options is enabled.
Also add the new option into the configuration files of the boards which needs that.
Compile tested for powerpc, x86, arm and nds32. MAKEALL results:
powerpc: --------------------- SUMMARY ---------------------------- Boards compiled: 641 Boards with warnings but no errors: 2 ( ELPPC MPC8323ERDB ) ---------------------------------------------------------- Note: the warnings for ELPPC and MPC8323ERDB are present even without the actual patch.
x86: --------------------- SUMMARY ---------------------------- Boards compiled: 1 ----------------------------------------------------------
arm: --------------------- SUMMARY ---------------------------- Boards compiled: 311 ----------------------------------------------------------
nds32: --------------------- SUMMARY ---------------------------- Boards compiled: 3 ----------------------------------------------------------
Cc: Tom Rini <trini@ti.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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