UPSTREAM: mtd: cfi: Add support for status register polling

The status register is optional in the AMD command sets, but it's
presence can be checked by reading out CFI table entry 0xc bit 0.
If the

UPSTREAM: mtd: cfi: Add support for status register polling

The status register is optional in the AMD command sets, but it's
presence can be checked by reading out CFI table entry 0xc bit 0.
If the register is present, prefer using it's bit 7 to determine
if the flash is busy over reading the flash ; this is needed ie.
on Hyperflash memories.

Change-Id: If82e42e5320123ef0cf5b436e4f6f0d68393f2b3
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 72443c7f7d2174903e73ee88dcb4364e0387bbb2)

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Merge git://www.denx.de/git/u-boot-cfi-flash

mtd: cfi: staticize functions

Staticize a few functions and variables which are no longer exposed.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Stefan Roese <sr@denx.de>
Signed-of

mtd: cfi: staticize functions

Staticize a few functions and variables which are no longer exposed.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>

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Merge branch 'master' of git://git.denx.de/u-boot

Merge git://www.denx.de/git/u-boot-cfi-flash

cfi_flash: use specific width types for cword

This patch changes the cword union to use specific length types that are
architecture indepented.

This patch also renames the members of the cword unio

cfi_flash: use specific width types for cword

This patch changes the cword union to use specific length types that are
architecture indepented.

This patch also renames the members of the cword union to represent
their usage, i.e.:

c -> w8
s -> w16
l -> w32
ll -> w64

Where "w" stands for "width" in bits.

I discovered this problem when enabling CFI flash on vexpress64.
cword.l was an unsigned long int, but it was intended to be 32 bits wide.
Unfortunately, it's 64-bits wide on a 64-bit system, meaning that a
64-bit system fails when attempting to use 32-bit wide CFI flash parts.

Similar problems also existed with the other cword sizes.

Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Stefan Roese <sr@denx.de>

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Merge git://git.denx.de/u-boot-arm

Conflicts:
board/freescale/mx6qsabrelite/Makefile
board/freescale/mx6qsabrelite/mx6qsabrelite.c
include/configs/mx6qsabrelite.h

Signed-off-by: Stefano Babic <s

Merge git://git.denx.de/u-boot-arm

Conflicts:
board/freescale/mx6qsabrelite/Makefile
board/freescale/mx6qsabrelite/mx6qsabrelite.c
include/configs/mx6qsabrelite.h

Signed-off-by: Stefano Babic <sbabic@denx.de>

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cfi_flash: Add prototypes of overridable functions

This commit adds some prototypes into include/mtd/cfi_flash.h.
These functions are defined with a weak attribute in
drivers/mtd/cfi_flash.c.
This m

cfi_flash: Add prototypes of overridable functions

This commit adds some prototypes into include/mtd/cfi_flash.h.
These functions are defined with a weak attribute in
drivers/mtd/cfi_flash.c.
This means they can be overrided by board-specific ones
if necessary.

When defining such functions under board/ directory or
somewhere, cfi_flash.h should be included.
This makes sure that board-specfic cfi functions
are defined in a correct prototype.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Stefan Roese <sr@denx.de>

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Merge branch 'u-boot/master' into u-boot-arm/master

Add GPL-2.0+ SPDX-License-Identifier to source files

Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>

Merge branch 'u-boot/master' into 'u-boot-arm/master'

Conflicts:
common/cmd_fpga.c
drivers/usb/host/ohci-at91.c

cfi_flash: Fix unaligned accesses to cfi_qry structure

Packed structure cfi_qry contains unaligned 16- and 32-bits members,
accessing which causes problems when cfi_flash driver is compiled with
-mu

cfi_flash: Fix unaligned accesses to cfi_qry structure

Packed structure cfi_qry contains unaligned 16- and 32-bits members,
accessing which causes problems when cfi_flash driver is compiled with
-munaligned-access option: flash initialization hangs, probably
due to data error.

Since the structure is supposed to replicate the actual data layout
in CFI Flash chips, the alignment issue can't be fixed in the structure.
So, unaligned fields need using of explicit unaligned access macros.

Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
Reviewed-By: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Stefan Roese <sr@denx.de>

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Merge branch 'u-boot/master' into 'u-boot-arm/master'

Conflicts:
drivers/video/exynos_fb.c

Revert "mtd: cfi_flash: Fix CFI flash driver for 8-bit bus support"

This reverts commit 239cb9d904cfa8ab50d840a47b3306189d695c75.

Signed-off-by: Stefan Roese <sr@denx.de>

Merge branch 'master' of git://www.denx.de/git/u-boot-cfi-flash

mtd: cfi_flash: Fix CFI flash driver for 8-bit bus support

This commit is based on that patch from aaron.williams@caviumnetworks.com
with same commit title. pulled the same code changes into current

mtd: cfi_flash: Fix CFI flash driver for 8-bit bus support

This commit is based on that patch from aaron.williams@caviumnetworks.com
with same commit title. pulled the same code changes into current u-boot tree.

http://patchwork.ozlabs.org/patch/140863/
http://lists.denx.de/pipermail/u-boot/2011-April/089606.html

This patch corrects the addresses used when working with Spansion/AMD FLASH chips.
Addressing for 8 and 16 bits is almost identical except in the 16-bit case the
LSB of the address is always 0. The confusion arose because the addresses
in the datasheet for 16-bit mode are word addresses but this code assumed it was
byte addresses.

I have only been able to test this on our Octeon boards which use either an 8-bit
or 16-bit bus. I have not tested the case where there's an 8-bit part on a 16-bit
bus.

This patch also adds some delays as suggested by Spansion.

If a part can be both 8 and 16-bits, it forces it to work in 8-bit mode if an
8-bit bus is detected.

Apart from the pulled changes, fixed few minor code cleanups and tested
on 256M29EW, 512M29EW flashes.

Before this fix:
---------------
Bank # 1: CFI conformant flash (8 x 8) Size: 64 MB in 512 Sectors
AMD Standard command set, Manufacturer ID: 0xFF, Device ID: 0xFF
Erase timeout: 4096 ms, write timeout: 2 ms
Buffer write timeout: 5 ms, buffer size: 1024 bytes

After this fix:
--------------
Bank # 1: CFI conformant flash (8 x 8) Size: 64 MB in 512 Sectors
AMD Standard command set, Manufacturer ID: 0x89, Device ID: 0x7E2301
Erase timeout: 4096 ms, write timeout: 2 ms
Buffer write timeout: 5 ms, buffer size: 1024 bytes

Signed-off-by: Aaron Williams <aaron.williams@caviumnetworks.com>
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Tested-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>

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cfi_flash: add support for Spansion flash PPB sector protection

Erasing flash sectors protected with persistent protection bit (PPB)
mechanism on Spansion flash chips doesn't work. Add sector protec

cfi_flash: add support for Spansion flash PPB sector protection

Erasing flash sectors protected with persistent protection bit (PPB)
mechanism on Spansion flash chips doesn't work. Add sector protection
status checking and sector lock and unlock commands to fix this.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>

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Merge branch 'next' of ../next

Merge branch 'next' of git://www.denx.de/git/u-boot-cfi-flash into next

cfi_flash: Add optional config register write to cfi-detection

This patch adds the possibility to (optinally) write to the
flash configuration register. The Intel style CFI chips support
such a regi

cfi_flash: Add optional config register write to cfi-detection

This patch adds the possibility to (optinally) write to the
flash configuration register. The Intel style CFI chips support
such a register that can be used to configure the operation
mode to a non-default value.

This method will be used by the t3corp board, which needs to
configure the DS617 Xilinx flash for async read mode.

Signed-off-by: Stefan Roese <sr@denx.de>

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Merge branch 'next' of /home/wd/git/u-boot/next

Conflicts:
include/ppc4xx.h

Signed-off-by: Wolfgang Denk <wd@denx.de>

Merge branch 'next' of ../custodians into next

cfi_flash: Simplify dynamic flash bank number detection

This patch simplifies the use of CONFIG_SYS_MAX_FLASH_BANKS_DETECT. By
moving these optional variables and defines into the common code, board

cfi_flash: Simplify dynamic flash bank number detection

This patch simplifies the use of CONFIG_SYS_MAX_FLASH_BANKS_DETECT. By
moving these optional variables and defines into the common code, board
specific code is minimized. Currently only the following board use
this feature:

APC405, IDS8247, TQM834x

And IDS8247 doesn't seem to really need this feature, since its not
updating the bank number variable at all. So this patch removes the
definition of CONFIG_SYS_MAX_FLASH_BANKS_DETECT from this board port.

This new framework will be used by the upcoming lwmon5 update as well.

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
Cc: Matthias Fuchs <matthias.fuchs@esd.eu>

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Merge branch 'master' of git://git.denx.de/u-boot-arm

Merge branch 'master' of git://git.denx.de/u-boot-cfi-flash