Merge branch 'master' of git://git.denx.de/u-boot-usb

Signed-off-by: Tom Rini <trini@konsulko.com>

Conflicts:
include/configs/dra7xx_evm.h

drivers: usb: xhci-fsl: Implement Erratum A-010151 for FSL USB3 controller

Currently the controller by default enables the Receive Detect feature in P3
mode in USB 3.0 PHY. However, USB 3.0 PHY does

drivers: usb: xhci-fsl: Implement Erratum A-010151 for FSL USB3 controller

Currently the controller by default enables the Receive Detect feature in P3
mode in USB 3.0 PHY. However, USB 3.0 PHY does not reliably support receive
detection in P3 mode.
Enabling the USB3 controller to configure USB in P2 mode whenever the Receive
Detect feature is required.

Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>

show more ...

Merge git://git.denx.de/u-boot-rockchip

usb: xhci-rockchip: add rockchip dwc3 controller driver

This patch add support for rockchip dwc3 controller, which corresponding
to the two type-C port on rk3399 evb.
Only support usb2.0 currently f

usb: xhci-rockchip: add rockchip dwc3 controller driver

This patch add support for rockchip dwc3 controller, which corresponding
to the two type-C port on rk3399 evb.
Only support usb2.0 currently for we have not enable the usb3.0 phy
driver and PD(fusb302) driver.

Signed-off-by: MengDongyang <daniel.meng@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

show more ...

Merge git://git.denx.de/u-boot-usb

usb: xhci: zynqmp: Removing unused function usb_phy_reset

This patch removes unsued function usb_phy_reset, rather common function
dwc3_phy_reset is used.

Signed-off-by: Marek Vasut <marex@denx.de>

Merge git://git.denx.de/u-boot-usb

drivers: usb: fsl: Implement Erratum A-009116 for XHCI controller

This adjusts (micro)frame length to appropriate value thus
avoiding USB devices to time out over a longer run

Signed-off-by: Nikhil

drivers: usb: fsl: Implement Erratum A-009116 for XHCI controller

This adjusts (micro)frame length to appropriate value thus
avoiding USB devices to time out over a longer run

Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>

show more ...

usb: dwc3: Add DWC3 controller driver support

Add support for DWC3 XHCI controller driver

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>

Merge branch 'master' of git://git.denx.de/u-boot-ti

keystone: usb: add support of usb xhci

Add support of usb xhci. xHCI controls all USB speeds of the Host
mode, that is, the SS through the SS PHY, as well as the HS, FS, and
LS through the USB2 PHY.

keystone: usb: add support of usb xhci

Add support of usb xhci. xHCI controls all USB speeds of the Host
mode, that is, the SS through the SS PHY, as well as the HS, FS, and
LS through the USB2 PHY. xHCI replaces and supersedes all previous
host HCIs (HS-only EHCI, FS/LS OHCI and UHCI), and is therefore not
backwards compatible with any of them. The USB3SS’s USB Controller is
fully compliant with xHC.

Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: WingMan Kwok <w-kwok2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>

show more ...

Merge branch 'master' of git://git.denx.de/u-boot-usb

USB: XHCI: Add xHCI host controller support for Exynos5

This adds driver layer for xHCI controller in Samsung's
exynos5 soc. This interacts with xHCI host controller stack.

Signed-off-by: Vikas C S

USB: XHCI: Add xHCI host controller support for Exynos5

This adds driver layer for xHCI controller in Samsung's
exynos5 soc. This interacts with xHCI host controller stack.

Signed-off-by: Vikas C Sajjan <vikas.sajjan@samsung.com>
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Cc: Julius Werner <jwerner@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Dan Murphy <dmurphy@ti.com>
Cc: Marek Vasut <marex@denx.de>

show more ...