| #
157f8461 |
| 16-Oct-2017 |
Adam Ford <aford173@gmail.com> |
UPSTREAM: Convert CONFIG_NAND_OMAP_GPMC et al and CONFIG_NAND_MXC to Kconfig
This converts the following to Kconfig: CONFIG_NAND_MXC CONFIG_NAND_OMAP_GPMC CONFIG_NAND_OMAP_GPMC_PREFETCH
UPSTREAM: Convert CONFIG_NAND_OMAP_GPMC et al and CONFIG_NAND_MXC to Kconfig
This converts the following to Kconfig: CONFIG_NAND_MXC CONFIG_NAND_OMAP_GPMC CONFIG_NAND_OMAP_GPMC_PREFETCH CONFIG_NAND_OMAP_ELM CONFIG_SPL_NAND_AM33XX_BCH CONFIG_SPL_NAND_SIMPLE CONFIG_SYS_NAND_BUSWIDTH_16BIT
Change-Id: Ic2238bb7ba18d9ae37dfef7ac7593fd42e34ef7d Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de> [trini: Finish migration of CONFIG_SPL_NAND_SIMPLE, fix some build issues, add CONFIG_NAND_MXC so we can do CONFIG_SYS_NAND_BUSWIDTH_16BIT] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> (cherry picked from commit 0a9ef45158d586017839d4b6fccd7f8f16672156)
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| #
c1b62ba9 |
| 14-Aug-2017 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-rockchip
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| #
0ee89f2d |
| 04-Aug-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
spl: moveconfig: remove SPL_LDSCRIPT definitions for header-files
With the hierarchical defaults set up, we remove these from the header files. To do so, I've run moveconfig on SPL_LDSCRIPT and thi
spl: moveconfig: remove SPL_LDSCRIPT definitions for header-files
With the hierarchical defaults set up, we remove these from the header files. To do so, I've run moveconfig on SPL_LDSCRIPT and this commits the changes.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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| #
05b8dc5c |
| 26-Apr-2017 |
Adam Ford <aford173@gmail.com> |
power: twl4030: Remove CONFIG_TWL4030_POWER from include/configs
With the addition of Kconfig now having CONFIG_TWL4030_POWER and with that being the default when OMAP34XX is selected, this is no lo
power: twl4030: Remove CONFIG_TWL4030_POWER from include/configs
With the addition of Kconfig now having CONFIG_TWL4030_POWER and with that being the default when OMAP34XX is selected, this is no longer needed in include/configs and can be removed from the whitelist.
This has only been tested on logic PD DM3730 using ti_omap3_common.h
Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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| #
8dda2e2f |
| 07-Mar-2017 |
Tom Rini <trini@konsulko.com> |
ARM: Migrate errata to Kconfig
This moves all of the current ARM errata from various header files and in to Kconfig. This allows for a minor amount of cleanup as we had some instances where both a
ARM: Migrate errata to Kconfig
This moves all of the current ARM errata from various header files and in to Kconfig. This allows for a minor amount of cleanup as we had some instances where both a general common header file was enabling errata as well as the board config. We now just select these once at the higher level in Kconfig
Signed-off-by: Tom Rini <trini@konsulko.com>
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| #
2d221489 |
| 29-Nov-2016 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
Signed-off-by: Stefano Babic <sbabic@denx.de>
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| #
983e3700 |
| 08-Nov-2016 |
Tom Rini <trini@konsulko.com> |
arm: Introduce arch/arm/mach-omap2 for OMAP2 derivative platforms
This moves what was in arch/arm/cpu/armv7/omap-common in to arch/arm/mach-omap2 and moves arch/arm/cpu/armv7/{am33xx,omap3,omap4,oma
arm: Introduce arch/arm/mach-omap2 for OMAP2 derivative platforms
This moves what was in arch/arm/cpu/armv7/omap-common in to arch/arm/mach-omap2 and moves arch/arm/cpu/armv7/{am33xx,omap3,omap4,omap5} in to arch/arm/mach-omap2 as subdirectories. All refernces to the former locations are updated to the current locations. For the logic to decide what our outputs are, consolidate the tests into a single config.mk rather than including 4.
Signed-off-by: Tom Rini <trini@konsulko.com>
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| #
2253797d |
| 13-Sep-2016 |
Simon Glass <sjg@chromium.org> |
Convert CONFIG_SPL_POWER_SUPPORT to Kconfig
Move this option to Kconfig and tidy up existing uses.
Signed-off-by: Simon Glass <sjg@chromium.org>
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| #
fa2f81b0 |
| 26-Aug-2016 |
Tom Rini <trini@konsulko.com> |
TI: Rework SRAM definitions and maximums
On all TI platforms the ROM defines a "downloaded image" area at or near the start of SRAM which is followed by a reserved area. As it is at best bad form a
TI: Rework SRAM definitions and maximums
On all TI platforms the ROM defines a "downloaded image" area at or near the start of SRAM which is followed by a reserved area. As it is at best bad form and at worst possibly harmful in corner cases to write in this reserved area, we stop doing that by adding in the define NON_SECURE_SRAM_IMG_END to say where the end of the downloaded image area is and make SRAM_SCRATCH_SPACE_ADDR be one kilobyte before this. At current we define the end of scratch space at 0x228 bytes past the start of scratch space this this gives us a lot of room to grow. As these scratch uses are non-optional today, all targets are modified to respect this boundary.
Tested on OMAP4 Pandaboard, OMAP3 Beagle xM
Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Nagendra T S <nagendra@mistralsolutions.com> Cc: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Felipe Balbi <balbi@ti.com> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Paul Kocialkowski <contact@paulk.fr> Cc: Enric Balletbo i Serra <eballetbo@gmail.com> Cc: Adam Ford <aford173@gmail.com> Cc: Steve Sakoman <sakoman@gmail.com> Cc: Stefan Roese <sr@denx.de> Cc: Thomas Weber <weber@corscience.de> Cc: Hannes Schmelzer <oe5hpm@oevsv.at> Cc: Thomas Chou <thomas@wytron.com.tw> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Simon Glass <sjg@chromium.org> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Sam Protsenko <semen.protsenko@linaro.org> Cc: Heiko Schocher <hs@denx.de> Cc: Samuel Egli <samuel.egli@siemens.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Cc: Ben Whitten <ben.whitten@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Sekhar Nori <nsekhar@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: "B, Ravi" <ravibabu@ti.com> Cc: "Matwey V. Kornilov" <matwey.kornilov@gmail.com> Cc: Ladislav Michl <ladis@linux-mips.org> Cc: Ash Charles <ashcharles@gmail.com> Cc: "Kipisz, Steven" <s-kipisz2@ti.com> Cc: Daniel Allred <d-allred@ti.com> Signed-off-by: Tom Rini <trini@konsulko.com> Tested-by: Lokesh Vutla <lokeshvutla@ti.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com> Tested-by: Ladislav Michl <ladis@linux-mips.org>
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| #
067716ba |
| 22-Aug-2016 |
Tom Rini <trini@konsulko.com> |
ARM: Move SYS_CACHELINE_SIZE over to Kconfig
This series moves the CONFIG_SYS_CACHELINE_SIZE. First, in nearly all cases we are mirroring the values used by the Linux Kernel here. Also, so long as
ARM: Move SYS_CACHELINE_SIZE over to Kconfig
This series moves the CONFIG_SYS_CACHELINE_SIZE. First, in nearly all cases we are mirroring the values used by the Linux Kernel here. Also, so long as (and in this case, it is true) we implement flushes in hunks that are no larger than the smallest implementation (and given that we mirror the Linux Kernel, again we are fine) it is OK to align higher. The biggest changes here are that we always use 64 bytes for CPU_V7 even if for example the underlying core is only 32 bytes (this mirrors Linux). Second, we say ARM64 uses 64 bytes not 128 (as found in the Linux Kernel) as we do not need multi-platform support (to this degree) and only the Cavium ThunderX 88xx series has a use for such large alignment.
Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Stefan Roese <sr@denx.de> Cc: Nagendra T S <nagendra@mistralsolutions.com> Cc: Vaibhav Hiremath <hvaibhav@ti.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com> Cc: Steve Rae <steve.rae@raedomain.com> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Stefan Agner <stefan.agner@toradex.com> Acked-by: Heiko Schocher <hs@denx.de> Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Cc: Peter Griffin <peter.griffin@linaro.org> Acked-by: Paul Kocialkowski <contact@paulk.fr> Cc: Anatolij Gustschin <agust@denx.de> Acked-by: "Pali Rohár" <pali.rohar@gmail.com> Cc: Adam Ford <aford173@gmail.com> Cc: Steve Sakoman <sakoman@gmail.com> Cc: Grazvydas Ignotas <notasas@gmail.com> Cc: Nishanth Menon <nm@ti.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Robert Baldyga <r.baldyga@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Thomas Weber <weber@corscience.de> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: David Feng <fenghua@phytium.com.cn> Cc: Alison Wang <b18965@freescale.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Simon Glass <sjg@chromium.org> Cc: York Sun <york.sun@nxp.com> Cc: Shengzhou Liu <Shengzhou.Liu@nxp.com> Cc: Mingkai Hu <mingkai.hu@nxp.com> Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Cc: Aneesh Bansal <aneesh.bansal@freescale.com> Cc: Saksham Jain <saksham.jain@nxp.com> Cc: Qianyu Gong <qianyu.gong@nxp.com> Cc: Wang Dongsheng <dongsheng.wang@nxp.com> Cc: Alex Porosanu <alexandru.porosanu@freescale.com> Cc: Hongbo Zhang <hongbo.zhang@nxp.com> Cc: tang yuantian <Yuantian.Tang@freescale.com> Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com> Cc: Josh Wu <josh.wu@atmel.com> Cc: Bo Shen <voice.shen@atmel.com> Cc: Viresh Kumar <viresh.kumar@linaro.org> Cc: Hannes Schmelzer <oe5hpm@oevsv.at> Cc: Thomas Chou <thomas@wytron.com.tw> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Sam Protsenko <semen.protsenko@linaro.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Christophe Ricard <christophe-h.ricard@st.com> Cc: Anand Moon <linux.amoon@gmail.com> Cc: Beniamino Galvani <b.galvani@gmail.com> Cc: Carlo Caione <carlo@endlessm.com> Cc: huang lin <hl@rock-chips.com> Cc: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Cc: Xu Ziyuan <xzy.xu@rock-chips.com> Cc: "jk.kernel@gmail.com" <jk.kernel@gmail.com> Cc: "Ariel D'Alessandro" <ariel@vanguardiasur.com.ar> Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Samuel Egli <samuel.egli@siemens.com> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Ian Campbell <ijc@hellion.org.uk> Cc: Siarhei Siamashka <siarhei.siamashka@gmail.com> Cc: Boris Brezillon <boris.brezillon@free-electrons.com> Cc: Andre Przywara <andre.przywara@arm.com> Cc: Bernhard Nortmann <bernhard.nortmann@web.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Ben Whitten <ben.whitten@gmail.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Alexander Graf <agraf@suse.de> Cc: Sekhar Nori <nsekhar@ti.com> Cc: Vitaly Andrianov <vitalya@ti.com> Cc: "Andrew F. Davis" <afd@ti.com> Cc: Murali Karicheri <m-karicheri2@ti.com> Cc: Carlos Hernandez <ceh@ti.com> Cc: Ladislav Michl <ladis@linux-mips.org> Cc: Ash Charles <ashcharles@gmail.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Daniel Allred <d-allred@ti.com> Cc: Gong Qianyu <Qianyu.Gong@freescale.com> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Chin Liang See <clsee@altera.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Paul Kocialkowski <contact@paulk.fr>
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| #
cb04db15 |
| 24-Apr-2016 |
Tom Rini <trini@konsulko.com> |
include/configs: Whitespace fixup
A number of moveconfig.py runs have left a instances of multiple empty lines in a row. Correct this to a single empty line.
Signed-off-by: Tom Rini <trini@konsulk
include/configs: Whitespace fixup
A number of moveconfig.py runs have left a instances of multiple empty lines in a row. Correct this to a single empty line.
Signed-off-by: Tom Rini <trini@konsulko.com>
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| #
3709844f |
| 27-Jan-2016 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
armv7: add cacheline sizes where missing
Some armv7 targets are missing a cache line size declaration. In preparation for "arm: cache: Implement cache range check for v7" patch, add these declaratio
armv7: add cacheline sizes where missing
Some armv7 targets are missing a cache line size declaration. In preparation for "arm: cache: Implement cache range check for v7" patch, add these declarations with the appropriate value for the target's SoC or CPU.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Reviewed-by: Tom Rini <trini@konsulko.com>
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| #
65c5c81f |
| 30-Dec-2015 |
Ladislav Michl <ladis@linux-mips.org> |
ti_omap3_common: Do not define CONFIG_SPL_NAND_SUPPORT
Symbol is already defined in ti_armv7_common.h which is included via ti_armv7_omap.h
Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Revi
ti_omap3_common: Do not define CONFIG_SPL_NAND_SUPPORT
Symbol is already defined in ti_armv7_common.h which is included via ti_armv7_omap.h
Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Reviewed-by: Tom Rini <trini@konsulko.com>
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| #
9e39003e |
| 19-Nov-2015 |
Thomas Chou <thomas@wytron.com.tw> |
ns16550: move CONFIG_SYS_NS16550 to Kconfig
Move CONFIG_SYS_NS16550 to Kconfig, and run moveconfig.py.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
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| #
4fb60552 |
| 19-Nov-2015 |
Thomas Chou <thomas@wytron.com.tw> |
ns16550: zap CONFIG_NS16550_SERIAL
Zap CONFIG_NS16550_SERIAL, as the unification of ns16550 drivers is completed.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Bin Meng <bmeng.cn@g
ns16550: zap CONFIG_NS16550_SERIAL
Zap CONFIG_NS16550_SERIAL, as the unification of ns16550 drivers is completed.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
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| #
c7b9686d |
| 19-Nov-2015 |
Thomas Chou <thomas@wytron.com.tw> |
ns16550: unify serial_omap
Unify serial_omap, and use the generic binding.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Simon Glass <sjg@ch
ns16550: unify serial_omap
Unify serial_omap, and use the generic binding.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Simon Glass <sjg@chromium.org>
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| #
f74dc51b |
| 15-Oct-2015 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
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| #
13a39725 |
| 14-Oct-2015 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge remote-tracking branch 'u-boot/master'
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| #
689821fd |
| 08-Oct-2015 |
Igor Grinberg <grinberg@compulab.co.il> |
ti: omap3: config: remove 1 from boolean define
CONFIG_TWL4030_POWER is a boolean define variable. It is either defined or not defined and should not have a value assigned to it. Remove the value.
ti: omap3: config: remove 1 from boolean define
CONFIG_TWL4030_POWER is a boolean define variable. It is either defined or not defined and should not have a value assigned to it. Remove the value.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
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| #
9a0f4004 |
| 22-Jul-2015 |
Nishanth Menon <nm@ti.com> |
configs: split ti_armv7_common into a omap generic header
TI armv7 based SoCs are based on two architectures - one based on OMAP generation architecture and others based on Keystone architecture.
M
configs: split ti_armv7_common into a omap generic header
TI armv7 based SoCs are based on two architectures - one based on OMAP generation architecture and others based on Keystone architecture.
Many of the options are architecture specific, however a lot are common with v7 architecture. So, step 1 will be to move out OMAP specific stuff from ti_armv7_common into a ti_armv7_omap.h header which is then used by all the relevant architecture headers.
Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Nishanth Menon <nm@ti.com>
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| #
c6f90e14 |
| 09-Mar-2015 |
Nishanth Menon <nm@ti.com> |
ARM: OMAP3: Enable workaround for ARM errata 454179, 430973, 621766
Enable the OMAP3 specific errata code for 454179, 430973, 621766 and while at it, remove legacy non-revision checked errata logic.
ARM: OMAP3: Enable workaround for ARM errata 454179, 430973, 621766
Enable the OMAP3 specific errata code for 454179, 430973, 621766 and while at it, remove legacy non-revision checked errata logic.
Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Matt Porter <mporter@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
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| #
987ec585 |
| 09-Mar-2015 |
Nishanth Menon <nm@ti.com> |
ARM: OMAP3: Rename omap3.h to omap.h to be generic as all SoCs
This is in preperation of using generic cross OMAP code.
Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Matt Porter <mporter@kon
ARM: OMAP3: Rename omap3.h to omap.h to be generic as all SoCs
This is in preperation of using generic cross OMAP code.
Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Matt Porter <mporter@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
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| #
b9cb6482 |
| 02-Mar-2015 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
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| #
e1cc4d31 |
| 24-Feb-2015 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge remote-tracking branch 'u-boot/master' into 'u-boot-arm/master'
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| #
757566d1 |
| 13-Feb-2015 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-dm
|