| #
8517e6f9 |
| 03-Apr-2018 |
Caesar <wxt@rock-chips.com> |
rockchip/rk3399: prevent to build error with SPL
As rk3399 enables the CONFIG_BOOTCOMMAN that will cause the build error with SPL enabled.
Change-Id: I8d2f680efd24e9ad528d06f363f646e6a7c7f0f0 Signe
rockchip/rk3399: prevent to build error with SPL
As rk3399 enables the CONFIG_BOOTCOMMAN that will cause the build error with SPL enabled.
Change-Id: I8d2f680efd24e9ad528d06f363f646e6a7c7f0f0 Signed-off-by: Caesar <wxt@rock-chips.com>
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| #
6b22cb8c |
| 31-Oct-2017 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove separate define for CONFIG_ENV_OFFSET
All Rockchip SoC use CONFIG_ENV_OFFSET defined in rockchip_common.h
Change-Id: I3bfcdb78df3ba487b1e99fba83343afd57be0755 Signed-off-by: Kever
rockchip: remove separate define for CONFIG_ENV_OFFSET
All Rockchip SoC use CONFIG_ENV_OFFSET defined in rockchip_common.h
Change-Id: I3bfcdb78df3ba487b1e99fba83343afd57be0755 Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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| #
19d1aa3c |
| 15-Sep-2017 |
Mark Yao <mark.yao@rock-chips.com> |
rockchip: rk3399: default enable bmp display
Change-Id: Ia8f2db14e4423407bfc267cb9d9080b05ca993da Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
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| #
4cfbff4d |
| 04-Sep-2017 |
Mark Yao <mark.yao@rock-chips.com> |
rockchip: rk3399: default enable vidconsole display
Change-Id: I934ed8c2fe579d800e0287ba680c2490641bf743 Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
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| #
44fe3794 |
| 27-Jul-2017 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: firefly-rk3399: enable EFUSE drive
Enable the EFUSE driver for get the cpuid and serial.
Change-Id: Ic347b9edbb06da784f0788fc29d61c3003e2b69b Signed-off-by: Kever Yang <kever.yang@rock-ch
rockchip: firefly-rk3399: enable EFUSE drive
Enable the EFUSE driver for get the cpuid and serial.
Change-Id: Ic347b9edbb06da784f0788fc29d61c3003e2b69b Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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| #
1eccadd2 |
| 19-Jul-2017 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3399: correct the env setting
The mmc0(emmc) is the default boot device, so let's use mmc device 0 as default env device. The SPL size in rk3399 is lager than other Rockchip SoC, we need
rockchip: rk3399: correct the env setting
The mmc0(emmc) is the default boot device, so let's use mmc device 0 as default env device. The SPL size in rk3399 is lager than other Rockchip SoC, we need to using a new offset and not to conflict with SPL memory space.
Change-Id: I2b2738afda4f6e9340691fef7abb197550ce6fba Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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| #
2be29653 |
| 24-Jul-2017 |
Simon Glass <sjg@chromium.org> |
Convert CONFIG_ENV_IS_IN_MMC/NAND/UBI and NOWHERE to Kconfig
This converts the following to Kconfig: CONFIG_ENV_IS_IN_MMC CONFIG_ENV_IS_IN_NAND CONFIG_ENV_IS_IN_UBI CONFIG_ENV_IS_NOWHERE
Convert CONFIG_ENV_IS_IN_MMC/NAND/UBI and NOWHERE to Kconfig
This converts the following to Kconfig: CONFIG_ENV_IS_IN_MMC CONFIG_ENV_IS_IN_NAND CONFIG_ENV_IS_IN_UBI CONFIG_ENV_IS_NOWHERE
In fact this already exists for sunxi as a 'choice' config. However not all the choices are available in Kconfig yet so we cannot use that. It would lead to more than one option being set.
In addition, one purpose of this series is to allow the environment to be stored in more than one place. So the existing choice is converted to a normal config allowing each option to be set independently.
There are not many opportunities for Kconfig updates to reduce the size of this patch. This was tested with
./tools/moveconfig.py -i CONFIG_ENV_IS_IN_MMC
And then manual updates. This is because for CHAIN_OF_TRUST boards they can only have ENV_IS_NOWHERE set, so we enforce that via Kconfig logic now.
Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
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| #
4f66e09b |
| 09-May-2017 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
Signed-off-by: Stefano Babic <sbabic@denx.de>
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| #
983b103f |
| 27-Apr-2017 |
Simon Glass <sjg@chromium.org> |
Convert CONFIG_SYS_WHITE_ON_BLACK to Kconfig
This converts the following to Kconfig: CONFIG_SYS_WHITE_ON_BLACK
Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Make this default y on variou
Convert CONFIG_SYS_WHITE_ON_BLACK to Kconfig
This converts the following to Kconfig: CONFIG_SYS_WHITE_ON_BLACK
Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Make this default y on various SoCs] Signed-off-by: Tom Rini <trini@konsulko.com>
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| #
7fd11738 |
| 02-Nov-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-rockchip
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| #
0717dde0 |
| 07-Oct-2016 |
Kever Yang <kever.yang@rock-chips.com> |
evb-rk3399: config: set emmc as default boot dev
rk3399 has two mmc dev controller: mmc 0: SD card; mmc 1: EMMC
U-Boot will scan the mmc boot device configured by CONFIG_SYS_MMC_ENV_DEV, since evb
evb-rk3399: config: set emmc as default boot dev
rk3399 has two mmc dev controller: mmc 0: SD card; mmc 1: EMMC
U-Boot will scan the mmc boot device configured by CONFIG_SYS_MMC_ENV_DEV, since evb has emmc on board, let's set the EMMC as default.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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| #
b87ca80b |
| 18-Oct-2016 |
Simon Glass <sjg@chromium.org> |
Convert CONFIG_CONSOLE_SCROLL_LINES to Kconfig
This converts the following to Kconfig: CONFIG_CONSOLE_SCROLL_LINES
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@kons
Convert CONFIG_CONSOLE_SCROLL_LINES to Kconfig
This converts the following to Kconfig: CONFIG_CONSOLE_SCROLL_LINES
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
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| #
a381bcf5 |
| 19-Jul-2016 |
Kever Yang <kever.yang@rock-chips.com> |
ARM64: rockchip: add support for rk3399 SoC based evb
RK3399 is a SoC from Rockchip with dual-core Cortex-A72 and quad-core Cortex-A53 CPU. It supports two USB3.0 type-C ports and two USB2.0 EHCI po
ARM64: rockchip: add support for rk3399 SoC based evb
RK3399 is a SoC from Rockchip with dual-core Cortex-A72 and quad-core Cortex-A53 CPU. It supports two USB3.0 type-C ports and two USB2.0 EHCI ports. Other interfaces are very much like RK3288, the DRAM are 32bit width address and support address from 0 to 4GB-128MB range.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
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